DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/08/2026 is being considered by the
examiner.
Response to Amendment
An amendment filed on 06/08/2026 in response to the Office Action mailed on 03/10/2026 is being acknowledged and entered into the record. The present Final rejection is made by taking into fully consideration all the amendments.
Response to Arguments
Applicant’s arguments, see pages 9-10 of the remarks, filed on 06/08/2026, with respect to the 112(b) rejection of Claim 5 have been fully considered and are persuasive. The rejection of Claim 5 has been withdrawn.
Applicant’s arguments, see pages 10-19 of the remarks, filed on 06/08/2026, with respect to the rejection of Claims 1-19 under 35 USC § 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground of 112(a) rejections are made in view of the newly added limitations as outlined in the rejection below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-19 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites the limitation “a first diffusion region and a second diffusion region, parallelly disposed in a first direction in a substrate, and partially overlapped with each other in a second direction” in lines 2-4. However, according to Fig. 1 of the instant application, the first diffusion region 132 and the second diffusion region 134 are parallelly disposed in a first direction D1 in a substrate 110 but are not partially overlapped with each other in a second direction D2. In fact, the first diffusion 132 region and the second diffusion region 134 only overlap in the first direction D1 and not in the second direction D2 (see also Fig. 2 of instant application).
Claims 2-8 are rejected due to their dependency on Claim 1.
Claim 9 recites the limitation “a first diffusion region and a second diffusion region, parallelly disposed in a first direction in a substrate, and partially overlapped with each other in a second direction” in lines 5-7. However, according to Fig. 1 of the instant application, the first diffusion region 132 and the second diffusion region 134 are parallelly disposed in a first direction D1 in a substrate 110 but are not partially overlapped with each other in a second direction D2. In fact, the first diffusion 132 region and the second diffusion region 134 only overlap in the first direction D1 and not in the second direction D2 (see also Fig. 2 of instant application).
Claims 10-19 are rejected due to their dependency on Claim 9.
Allowable Subject Matter
Claims 1-19 would be allowable if rewritten or amended to overcome the rejection under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), 1st paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
Note: Italicized claim limitations are limitations not explicitly disclosed in the primary
reference but disclosed either in the secondary references or encompass allowable subject matter.
Regarding Claim 1, Huang et al. (US 20130147510 A1) teaches a testkey structure, comprising:
a first diffusion region 44 and a second diffusion region 42, parallelly disposed in a first direction Y in a substrate, and partially overlapped with each other in a second direction X (See Annotated Fig. 2 of Huang et al.: 44, 42, Y, Fig. 4A: 42, 44, paragraph 0019)
a first gate 440 and a second gate 420, disposed on the substrate, across non-overlapping portions of the first diffusion region 44 and the second diffusion region 42 in the second direction X, respectively (see Annotated Fig. 2 of Huang et al.: 42, 44, 440, 420, Fig. 4A: 42, 44, Fig. 4C: 420, 440, Y, paragraph 0022);
Note that the first diffusion region 44 and the second diffusion region 42 do not overlap in the second direction X
a first epitaxial layer and a second epitaxial layer, disposed on the first diffusion region and the second diffusion region respectively, wherein the first epitaxial layer and the second epitaxial layer are separately disposed between the first gate and the second gate, each of the first epitaxial layer and the second epitaxial layer partially protrudes over a top surface of the substrate, and protruded portions of the first epitaxial layer and the second epitaxial layer are separated by a spacing in second direction;
and an input pad 251 and an output pad 254, electrically connected to the first epitaxial layer and the second epitaxial layer respectively (See Annotated Fig. 2 of Huang et al.: 251, 254, paragraph 0023)
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Annotated Fig. 2 of Huang et al. (US 20130147510 A1)
Chen et al. (US 20220415706 A1) teaches a semiconductor structure 900 A made of a plurality of MOSFETs, the semiconductor structure 900A comprising the following limitations not disclosed by Huang et al.:
a first epitaxial layer 950A and a second epitaxial layer 950B, disposed on the first diffusion region 901A and the second diffusion region 901B respectively, wherein the first epitaxial layer 950A and the second epitaxial layer 950B are separately disposed between the first gate 912A and the second gate 912B, and the first epitaxial layer 950A and the second epitaxial layer 950B are separated by a spacing T1 in the second direction SD (See annotated Fig. 9B of Chen et al.: 900A, 950A, 950B, 901A, 901B, 912A, 912B, SD, T1, paragraphs 0045 – 0047, 0031, 0032, 0034).
Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to combine the teachings of Chen et al. with the teachings of Huang et al. in order to have a first epitaxial layer and a second epitaxial layer, disposed on the first diffusion region and the second diffusion region respectively, wherein the first epitaxial layer and the second epitaxial layer are separately disposed between the first gate and the second gate, and the first epitaxial layer and the second epitaxial layer are separated by a spacing in the second direction. Doing so would alleviate leakage issues and enhance device performance in scaled device structures, as recognized by Chen et al. (paragraphs 0001 and 0002).
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Annotated Fig. 9B of Chen et al. (US 20220415706 A1)
Further, while the combination of Huang et al. and Chen et al. fails to explicitly teach that the input pad and output pad are electrically connected to the first epitaxial layer and the second epitaxial layer respectively, Huang et al. does disclose that the input pad 251 and output pad 254 are electrically connected to the first diffusion region 44 and the second diffusion region 43 respectively (see annotated Fig. 2 of Huang et al.).
Therefore, a person of ordinary skill in the art would have recognized that when the epitaxial layers of Chen et al. are disposed on the diffusion regions of Huang et al., the input pad and output pad of Huang et al. would be electrically connected to the first epitaxial layer and the second epitaxial layer respectively.
However, the prior art of record fails to teach, suggest or render obvious the limitation “the first diffusion region and the second diffusion region are partially overlapped with each other in a second direction, along with the remaining limitations of claim 1.
Claims 2-8 are allowable due to their dependency on Claim 1.
Regarding Claim 9, Huang et al. (US 20130147510 A1), discloses a monitoring method with a testkey structure, comprising: providing a testkey structure in a semiconductor device (Fig. 4A – 4G, paragraphs 0019 -0024), the testkey structure comprising:
a first diffusion region 44 and a second diffusion region 42, parallelly disposed in a first direction Y in a substrate and partially overlapped with each other in a second direction X (See Annotated Fig. 2 of Huang et al. above, Fig. 4A: 42, 44, Y, paragraph 0019)
a first gate 440 and a second gate 420, disposed on the substrate, across non-overlapping portions of the first diffusion region 44 and the second diffusion region 42, in the second direction X, respectively (See Annotated Fig. 2 of Huang et al. above, Fig. 4C: X, 420, 440, paragraph 0022)
a first epitaxial layer and a second epitaxial layer, disposed on the first diffusion region and the second diffusion region respectively, wherein the first epitaxial layer and the second epitaxial layer are separately disposed between the first gate and the second gate, each of the first epitaxial layer and the second epitaxial layer partially protrudes over a top surface of the substrate, and protruded portions of the first epitaxial layer and the second epitaxial layer are separated by a first spacing in the second direction;
and an input pad 251 and an output pad 254 (See Annotated Fig. 2 of Huang et al. above, Fig. 2: 251, 254, paragraph 0023), electrically connected to the first epitaxial layer and the second epitaxial layer respectively;
transmitting a first signal to the input pad;
and identifying leakage between the first epitaxial layer and the second epitaxial layer through receiving a first corresponding signal from the output pad Huang et al. fails to disclose providing:
Chen et al. discloses a method of forming a semiconductor structure 900 A, the semiconductor structure 900A comprising the following limitations not disclosed by Huang et al.:
a first epitaxial layer 950A and a second epitaxial layer 950B, disposed on the first diffusion region 901A and the second diffusion region 901B respectively, wherein the first epitaxial layer 950A and the second epitaxial layer 950B are separately disposed between the first gate 912A and the second gate 912B, and the first epitaxial layer 950A and the second epitaxial layer 950B are separated by a first spacing T1 in the second direction SD (See annotated Fig. 9B of Chen et al.: 900A, 950A, 950B, 901A, 901B, 912A, 912B, SD, T1, Fig. 8, paragraphs 0044 – 0047, 0031, 0032, 0034).
Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to combine the teachings of Chen et al. with the teachings of Huang et al. in order to have a first epitaxial layer and a second epitaxial layer, disposed on the first diffusion region and the second diffusion region respectively, wherein the first epitaxial layer and the second epitaxial layer are separately disposed between the first gate and the second gate, and the first epitaxial layer and the second epitaxial layer are separated by a spacing in the second direction. Doing so would alleviate leakage issues and enhance device performance in scaled device structures, as recognized by Chen et al. (paragraphs 0001 and 0002).
Furthermore, a person of ordinary skill in the art would have recognized that when the epitaxial layers of Chen et al. are disposed on the testkey structure of Huang et al., the input pad and output pad of Huang et al. would be electrically connected to the first epitaxial layer and the second epitaxial layer respectively.
Shiu et al. (US 20130270557 A1) discloses a monitoring method with a testkey structure 12, comprising transmitting a first signal to the input pad 20 and identifying leakage between the first diffusion region 14 and the second diffusion region 16 (Fig. 1: 14, 16, 20, paragraphs 0009, 0021).
The combination of Huang et al., Chen et al. and Shiu et al. fails to explicitly disclose identifying leakage between the first epitaxial layer and the second epitaxial layer through receiving a first corresponding signal from the output pad. However, a person of ordinary skill in the art, by combining the teachings of Shiu et al., Huang et al. and Chen et al., would have recognized that when the epitaxial layers of Chen et al. are disposed on the diffusion regions of Huang et al., the monitoring method of Shiu et al. can be implemented to identify leakage between the first epitaxial layer and the second epitaxial layer through receiving a first corresponding signal from the output pad of Huang et al. Doing so can allow the monitoring of each of the production wafers, as recognized by Shiu et al. (paragraph 0009).
However, the prior art of record fails to teach, suggest or render obvious the limitation “the first diffusion region and the second diffusion region are partially overlapped with each other in a second direction, along with the remaining limitations of claim 9.
Claims 10-19 are allowable due to their dependency on Claim 9.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAMNA F IQBAL whose telephone number is 571-272-1587. The examiner can normally be reached M-F: 8.30 am - 5.30 pm EST.
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/HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 06/25/2026
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817
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