DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Claims 1,3-12,14-17 and 19 are pending. Claims 1, 10 and 17 are currently amended.
Claim Objections
In claim 17, it appears that the term “about” was inadvertently omitted, consider --the vacuum chucking force is variable about an area of the substrate--.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 4, 7-12, 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyajima (JP H05251411 A), in view of Kajiwara (US 6540590 B1), Harada (JP 2001071255 A), Quek (US 6203408 B1), Baker (US 20030096507 A1), and Song (CN 108649021 A)
With respect to claim 1, Miyajima discloses:
A polishing method ([0001] – specifically semiconductors) comprising:
engaging a substrate with substrate carrier ([0008] – “a step of holding the substrate by vacuum suction so as to be in contact with the holding surface); further description is found in [0003] referencing a prior art apparatus with holding surface 1a of carrier 1; with the vacuum provided by a suction opening, the apparatus of Miyajima is a modified variation of the prior art apparatus as explained in [0018-0020]),
applying a vacuum chucking force to pull the substrate against a surface defined by the substrate carrier (as prev. explained using [0008] the engaging the substrate with a carrier step comprises contacting the substrate with a holding surface 1a),
polishing one or more materials on the substrate for a first period of time ([0022] explains that the substrate is vacuumed, and polished until a time “the polishing surface of the substrate W becomes familiar with the polishing pad 3”) while maintaining the chucking force on the substrate ([0014] describes how vacuum suction is applied at the start of polishing, see time chart in fig. 2, attached as NPL document dated 07/28/2023 and described in [0021-0022]);
disengaging the substrate from the surface ([0022] explains that the suction is turned off subsequent to the polishing for a first period of time; [0011] explains that in the conventional example, when the wafer is held by vacuum, projections guide the substrate such that substrate does not deviate from the holding surface; whereas in [0012], the position of the foreign matter
relative to the substrate moves fluidly due to the slippage of the substrate holding surface is distributed to the moving position to improve polishing uniformity evidencing that when the vacuum is released, the substrate is disengaged); and
polishing the one or more materials on the substrate for a second period of time ([0022] referring to fill scale polishing until polishing reaches a predetermined level).
However, Miyajima does not explicitly disclose:
engaging a substrate with a membrane of a substrate carrier, the membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring of the substrate carrier.
the vacuum chucking force is operable to pull the substrate against a substantially planar surface defined by the substrate carrier, wherein the vacuum chucking force reduces a bow in the substrate, and the vacuum chucking force is variable about an area of the substrate,
wherein the substrate comprises a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, the sacrificial laver imparting stress that reduces an existing bow of the substrate.
Kajiwara, in the same field of endeavor, referring to polishing teaches,
engaging a substrate with a membrane of a substrate carrier (col 8 line 47-col 9 line 7 referring to membrane 185 fig. 2, where the substrate 105 is received) and of vacuum chucking the substrate against a substantially planar surface (the surface defined by the raised lip of port 220, shown in fig. 2 and 8, explained in col 10 line 44 to col 11 line 9) defined by the substrate carrier, wherein the vacuum chucking force reduces a bow in the substrate (col 11 line 23-50 – “preventing excess bowing and further reducing the stresses on the substrate”).
Kajiwara teaches that the membrane provides the advantages of: “(i) the ability to reduce or eliminate the impact of particles or impurities caught between the receiving surface 190 and the substrate 105 on polishing uniformity by reducing the area in which such particles could be trapped; (ii) the ability to reduce or eliminate non-uniformities in polishing due to wrinkling of the substrate; and (iii) the ability to reduce or eliminate non-uniformities in polishing due to variation in thickness of the flexible member 185.”
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a membrane, on which the substrate is received, as taught by Kajiwara for the reasons given above.
Kajiwara further teaches that providing a flat surface (defined by the lip of port 220m providing a vacuum), provides the advantage of preventing excess stresses on the substrate compared to the prior art by enabling the port to be isolated (explained in col 10 line 44 to col 11 line 9)
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a substantially planar surface at a vacuum port (a lip, as taught by Kajiwara), on which the substrate is chucked against, as taught by Kajiwara for the purpose of preventing excess stresses on the substrate by enabling the vacuum part to be isolated.
Kajiwara further teaches that providing a raised portion defined by lands 250, fig. 9, provides the advantage of supporting the substrate when a vacuum is drawn, preventing excess bowing and further reducing the stresses on the substrate (col 11 line 23-50).
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a plurality of lands as taught by Kajiwara for the purpose of preventing excess stresses on the substrate.
Harada, in the same field of endeavor, as related to polishing teaches of providing a membrane (23, fig. 5; [0021]) clamped above to a base assembly (8, fig. 5; [0021]) and secured to the base assembly from below by an inner ring (20, fig. 5; [0021]) of the substrate carrier. Harada teaches that his arrangement provides a state of tension, making it unnecessary to make the membrane itself firm, providing for a simple shape without adverse effects on the membrane and increasing polishing accuracy ([0027]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring, as taught by Harada in order to provide a simple shape without adverse effects on the membrane and increasing polishing accuracy.
As for limitations regarding the vacuum chucking force is variable about the plurality of vacuum ports, Quek, in the same field of endeavor, relating to polishing teaches of providing a plurality of vacuum ports arranged at discrete locations of the substrate carrier (plurality of ports 75, fig. 5; col 4 lines 19-36, these openings apply vacuum as in col 2 lines 22-35, in addition to providing a positive pressure). Quek teaches that this arrangement can fine tune the polishing to produce a more uniform wafer (col 2 lines 24-35, col 4 lines 9-19).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a vacuum chucking force to the substrate via a plurality of vacuum ports arranged at discrete locations of the substrate carrier, the vacuum chucking force is variable about the plurality of vacuum ports, such that it results in a variable amount of suction force at different areas of the substrate as taught by Quek, for the purpose of fine tuning polishing to produce a more uniform wafer.
Regarding the limitation, wherein the substrate comprises a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, Baker, in the same field of endeavor, related to semiconductor processing ([0002]), including regarding the use of CMP ([0032-0035]), teaches of forming/depositing a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier (forming a sacrificial/protective layer on both the front and back [both sides] of the substate as in [0034], as shown in fig. 4b, examiner notes that the reference characters in the figures appears to be misnumbered, the front side appears to be 165 and back side 170; the removing the protective film from the front side using CMP, leaving the protective film 180, fig. 4c-4d to protect the back side of the wafer as in [0036]; because the front side of the wafer is the surface being subjected to CMP to remove the protective film, the back side, with the protective film is being held by the CMP carrier, see Miyajima, fig. 1, with wafer W and carrier 1a, as previously explained with respect to the step of engaging a substrate with a membrane of a substrate carrier). Baker, further provides that this protects the wafer from mechanical damage during processing ([0035-0037]), including contamination of the front side ([0002]) and the backside protective film can later be removed ([0021], see flow chart in fig. 1).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima, and have incorporated a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, using the teachings of Baker, for the purpose of providing a back side protective film to prevent mechanical damage to the wafer during further processing.
As for limitations regarding the sacrificial laver imparting stress that reduces an existing bow of the substrate, the examiner notes that Baker, as applied above, provides for the sacrificial layer [protective film] to be applied as an silicon oxide (Baker, [0034]).
Song, in the same field of endeavor, related to semiconductor processing, teaches that it during semiconductor processing, stresses are formed on the surface of the substrate, causing warpage ([0004]), and that to improve warpage, the back film of the wafer is asymmetrically patterned, but still has to be thick ([0005]; the film also being a silicon oxide film analogous to Baker as in Song, [0016,0050]). Song proposes instead etching a pattern on the back side of the wafer ([0018]), and filling a stress layer on the patterned surface ([0027,0056]). Song teaches that reducing warpage reduces breakage [fragmentation] due to the presence of an asymmetrical shape ([0004]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima, and have made the sacrificial laver imparting stress that reduces an existing bow of the substrate, to adjust the warpage of the wafer, using the teachings of Song, for the purpose of reducing wafer breakage.
With respect to claim 3, Miyajima, as modified, teaches the limitations of claim 1 above, and further teaches wherein the polishing for the first period of time, the polishing for the second period of time, or both comprises contacting the substrate with a polishing pad (Miyajima, [0022] provides that the “the polishing surface of the substrate W becomes familiar with the polishing pad 3” indicating that the substrate contacts the polishing pad; further evidence is found in Miyajima, [0006] which describes that polishing is done by sliding the substrate against the polishing pad and in Miyajima, [0003] which describes that polishing is done by pressing the substrate against the polishing pad).
With respect to claim 4, Miyajima, as modified, teaches the limitations of claim 1 above, however does not explicitly teach of providing a slurry solution to contact the substrate.
However, Miyajima, as modified, teaches of an abrasive supply system (Miyajima, 7, fig. 3) for supplying abrasive to a polishing cloth (Miyajima, [0003,0020]) and of providing a polishing agent during polishing (Miyajima, [0022]). Miyajima, as modified also teaches of a cleaning liquid supply system (Miyajima, 9, fig. 3, [0020] - that supplies cleaning liquid to the polishing pad 3) that is structurally analogous to the abrasive particle supply (Miyajima, fig. 3) However, this does not explicitly teach of providing a slurry solution to contact the substrate.
Kajiwara, also relating to polishing semiconductors (col 1 line 13-30), provides evidence that abrasives are ordinary supplied to polishing through the form of a slurry suspension (col 3 line 52-67) and dispensed between the pad and the substrate (col 6 line 49-col 7 line 7).
Thus, one of ordinary skill in the art, before the effective filing date of the claimed invention, would have understood, as evidenced by Kajiwara and the structure and operation of Miyajima that the slurry would have been dispensed to contact the substrate during a polishing operation, the slurry providing the abrasive particles in a suspension.
With respect to claim 7, Miyajima, as modified, teaches the limitations of claim 1 above, and further teaches wherein the membrane of the substrate carrier is a continuous material (the membrane provided by Kajiwara, is a continuous material, as membrane 185 fig. 2 is provided to receive the substrate and is provided across the surface of the carrier as in fig. 2 (i.e., it is not provided as a partial membrane made of two or more discontinuous segments))
With respect to claim 8, Miyajima, as modified, teaches the limitations of claim 1 above, and further teaches depositing the sacrificial layer on the surface of the substrate to be engaged by the substrate carrier prior to engaging the substrate (Baker, [0034], the protective film/sacrificial layer on both the back and front sides is formed by known oxidation/deposition methods, and is formed before front side CMP processing in [0035], which removes the front protective film, thus the layer is deposited before being engaged with the carrier during front side CMP).
With respect to claim 9, Miyajima, as modified, teaches the limitations of claim 8 above, and further teaches removing the sacrificial layer on the surface of the substrate after polishing for the second period of time (Baker, after the CMP [or as applied to Miyajima, after CMP is completed after the second period of polishing], the wafer is subjected to processing as in [0035], afterward the back side protective film can be removed, [0021], see flow chart in fig. 1 of Baker; claim does not exclude having intermediate steps between the conclusion of CMP after polishing for a second period of time and the removal of the sacrificial layer).
With respect to claim 10, Miyajima discloses:
A polishing method ([0001] – specifically semiconductors) comprising:
engaging a substrate with a substrate carrier of a chemical mechanical polishing apparatus ([0008] – “a step of holding the substrate by vacuum suction so as to be in contact with the holding surface); further description is found in [0003] referencing a prior art apparatus with holding surface 1a of carrier 1; with the vacuum provided by a suction opening, the apparatus of Miyajima is a modified variation of the prior art apparatus as explained in [0018-0020]),;
applying a vacuum chucking force to pull the substrate against a surface defined by the substrate carrier (as prev. explained using [0008] the engaging the substrate with a carrier step comprises contacting the substrate with a holding surface 1a),
contacting the substrate with a polishing pad in a polishing region of the chemical mechanical polishing apparatus ([0022] provides that the “the polishing surface of the substrate W becomes familiar with the polishing pad 3” indicating that the substrate contacts the polishing pad; further evidence is found in [0006] which describes that polishing is done by sliding the substrate against the polishing pad and in [0003] which describes that polishing is done by pressing the substrate against the polishing pad, the location of the polishing pad is a polishing region where polishing occurs)
polishing one or more materials on the substrate for a first period of time ([0022] explains that the substrate is vacuumed, and polished until a time “the polishing surface of the substrate W becomes familiar with the polishing pad 3”) while maintaining the vacuum chucking force on the substrate ([0014] describes how vacuum suction is applied at the start of polishing, see time chart in fig. 2, attached as NPL document dated 07/28/2023 and described in [0021-0022]);
disengaging the substrate from the substantially planar surface ([0022] explains that the suction is turned off subsequent to the polishing for a first period of time; [0011] explains that in the conventional example, when the wafer is held by vacuum, projections guide the substrate such that substrate does not deviate from the holding surface; whereas in [0012], the position of the foreign matter relative to the substrate moves fluidly due to the slippage of the substrate holding surface. Is distributed to the moving position to improve polishing uniformity evidencing that when the vacuum is released, the substrate is disengaged); and
polishing the one or more materials on the substrate for a second period of time ([0022] referring to fill scale polishing until polishing reaches a predetermined level).
However, Miyajima does not explicitly disclose:
the membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring of the substrate carrier,
the vacuum chucking force is operable to pull the substrate against a substantially planar surface defined by the substrate carrier, wherein the vacuum chucking force reduces a bow in the substrate
the vacuum chucking force is variable about an area of the substrate,
wherein the substrate comprises a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, the sacrificial laver imparting stress that reduces an existing bow of the substrate.
Kajiwara, in the same field of endeavor, referring to polishing teaches,
engaging a substrate with a membrane of a substrate carrier (col 8 line 47-col 9 line 7 referring to membrane 185 fig. 2, where the substrate 105 is received) and of vacuum chucking the substrate against a substantially planar surface (the surface defined by the raised lip of port 220, shown in fig. 2 and 8, explained in col 10 line 44 to col 11 line 9) defined by the substrate carrier, wherein the vacuum chucking force reduces a bow in the substrate (col 11 line 23-50 – “preventing excess bowing and further reducing the stresses on the substrate”).
Kajiwara teaches that the membrane provides the advantages of: “(i) the ability to reduce or eliminate the impact of particles or impurities caught between the receiving surface 190 and the substrate 105 on polishing uniformity by reducing the area in which such particles could be trapped; (ii) the ability to reduce or eliminate non-uniformities in polishing due to wrinkling of the substrate; and (iii) the ability to reduce or eliminate non-uniformities in polishing due to variation in thickness of the flexible member 185.”
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a membrane, on which the substrate is received, as taught by Kajiwara for the reasons given above.
Kajiwara further teaches that providing a flat surface (defined by the lip of port 220m providing a vacuum), provides the advantage of preventing excess stresses on the substrate compared to the prior art by enabling the port to be isolated (explained in col 10 line 44 to col 11 line 9)
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a substantially planar surface at a vacuum port (a lip, as taught by Kajiwara), on which the substrate is chucked against, as taught by Kajiwara for the purpose of preventing excess stresses on the substrate by enabling the vacuum part to be isolated.
Kajiwara further teaches that providing a raised portion defined by lands 250, fig. 9, provides the advantage of supporting the substrate when a vacuum is drawn, preventing excess bowing and further reducing the stresses on the substrate (col 11 line 23-50).
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a plurality of as taught by Kajiwara for the purpose of preventing excess stresses on the substrate.
Harada, in the same field of endeavor, as related to polishing teaches of providing a membrane (23, fig. 5; [0021]) clamped above to a base assembly (8, fig. 5; [0021]) and secured to the base assembly from below by an inner ring (20, fig. 5; [0021]) of the substrate carrier. Harada teaches that his arrangement provides a state of tension, making it unnecessary to make the membrane itself firm, providing for a simple shape without adverse effects on the membrane and increasing polishing accuracy ([0027]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring, as taught by Harada in order to provide a simple shape without adverse effects on the membrane and increasing polishing accuracy.
As for limitations regarding the vacuum chucking force is variable about an area of the substrate, Quek, in the same field of endeavor, relating to polishing teaches of providing a plurality of vacuum ports arranged at discrete locations of the substrate carrier (plurality of ports 75, fig. 5; col 4 lines 19-36, these openings apply vacuum as in col 2 lines 22-35, in addition to providing a positive pressure). Quek teaches that this arrangement can fine tune the polishing to produce a more uniform wafer (col 2 lines 24-35, col 4 lines 9-19).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a vacuum chucking force to the substrate via a plurality of vacuum ports arranged at discrete locations of the substrate carrier, the vacuum chucking force is variable about the plurality of vacuum ports, such that it results in a variable amount of suction force at different areas of the substrate as taught by Quek, for the purpose of fine tuning polishing to produce a more uniform wafer.
Regarding the limitation, wherein the substrate comprises a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, Baker, in the same field of endeavor, related to semiconductor processing ([0002]), including regarding the use of CMP ([0032-0035]), teaches of forming/depositing a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier (forming a sacrificial/protective layer on both the front and back [both sides] of the substate as in [0034], as shown in fig. 4b, examiner notes that the reference characters in the figures appears to be misnumbered, the front side appears to be 165 and back side 170; the removing the protective film from the front side using CMP, leaving the protective film 180, fig. 4c-4d to protect the back side of the wafer as in [0036]; because the front side of the wafer is the surface being subjected to CMP to remove the protective film, the back side, with the protective film is being held by the CMP carrier, see Miyajima, fig. 1, with wafer W and carrier 1a, as previously explained with respect to the step of engaging a substrate with a membrane of a substrate carrier). Baker, further provides that this protects the wafer from mechanical damage during processing ([0035-0037]), including contamination of the front side ([0002]) and the backside protective film can later be removed ([0021], see flow chart in fig. 1).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima, and have incorporated a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier, using the teachings of Baker, for the purpose of providing a back side protective film to prevent mechanical damage to the wafer during further processing.
As for limitations regarding the sacrificial laver imparting stress that reduces an existing bow of the substrate, the examiner notes that Baker, as applied above, provides for the sacrificial layer [protective film] to be applied as an silicon oxide (Baker, [0034]).
Song, in the same field of endeavor, related to semiconductor processing, teaches that it during semiconductor processing, stresses are formed on the surface of the substrate, causing warpage ([0004]), and that to improve warpage, the back film of the wafer is asymmetrically patterned, but still has to be thick ([0005]; the film also being a silicon oxide film analogous to Baker as in Song, [0016,0050]). Song proposes instead etching a pattern on the back side of the wafer ([0018]), and filling a stress layer on the patterned surface ([0027,0056]). Song teaches that reducing warpage reduces breakage [fragmentation] due to the presence of an asymmetrical shape ([0004]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima, and have made the sacrificial laver imparting stress that reduces an existing bow of the substrate, to adjust the warpage of the wafer, using the teachings of Song, for the purpose of reducing wafer breakage.
With respect to claim 11, Miyajima, as modified, teaches the limitations of claim 10 above, and further teaches wherein engaging the substrate with the substrate carrier comprises contacting the substrate with a membrane of the substrate carrier (Kajiwara, col 8 line 47-col 9 line 7 referring to membrane 185 fig. 2, where the substrate 105 is received).
With respect to claim 12, Miyajima, as modified, teaches the limitations of claim 11 above, and but however does not explicitly teach that the membrane comprises a plurality of openings.
However, Kajiwara, further teaches that providing holes additionally provide an “advantage of enabling vacuum to act directly on the substrate 105 and evacuate and eliminate any air pockets between the substrate and the receiving surface 190” (col 11 line 9-22).
Thus, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have further modified Miyajima and have provided a plurality of holes in the membrane, as taught by Kajiwara for the advantageous purpose of reducing air pockets between the membrane and the substrate.
With respect to claim 14, Miyajima, as modified, teaches the limitations of claim 10 above, and further teaches rotating the substrate carrier, the polishing pad, or both while polishing the one or more materials on the substrate during the first period of time, the second period of time, or both (Miyajima, [0008, 0010] provides that the substrate is pressed against the polishing pad/cloth on a rotating platen).
With respect to claim 15, Miyajima, as modified, teaches the limitations of claim 10 above, and further teaches applying a force to a surface of the substrate facing the substrate carrier during the second period of time (the substrate is pressed against the polishing pad during the polishing process, furthermore the rotation process with the substrate pressed is also further understood to provide a shear force against the polished surface which faces the polishing pad)
With respect to claim 16, Miyajima, as modified, teaches the limitations of claim 10 above, and further teaches wherein the membrane supports the substrate during the second period of time (Miyajima, fig. 8 of Kajiwara shows that the membrane 185 supports the substrate 105 when vacuumed and when not vacuumed, the figure shows the vacuumed state in a dashed line as the substrate is drawn towards the vacuum port, the figure is explained in explained in col 10 line 44 to col 11 line 9).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Miyajima (JP H05251411 A), in view of Kajiwara (US 6540590 B1), Harada (JP 2001071255 A), Quek (US 6203408 B1), Baker (US 20030096507 A1), and Song (CN 108649021 A) as applied to the rejection of claim 1 above, and as further evidenced by Spiegel (US Pub. 20130078812 A1)
With respect to claim 5, Miyajima, as modified, teaches the limitations of claim 1 above, and further teaches that the method is intended to provide for a more uniform polishing ([0007, 0013]), however does not explicitly disclose wherein removal of the one or more materials during the first period of time is substantially uniform across a surface of the substrate.
Spiegel, in the same field of endeavor, relating to polishing, provides that when a substrate or wafer is bowed, the “the bow and warp results in non-uniform polishing across the surface of the wafer” ([0005]).
As previously explained in the rejection of claim 1 above, Miyajima, as modified, provides for a reduction of bow (and wafer stress).
Thus, one of ordinary skill in the art, before the effective filing date of the claimed invention, would have understood, as evidenced by Spiegel that the removal of the one or more materials during the first period of time is substantially uniform across a surface of the substrate given that Spiegel evidenced that bow makes polishing/material removal non-uniform, so one would understand that a reduction of bow would make the material removal more or substantially uniform.
In addition, as evidenced by Miyajima ([0007,0013]), Spiegel ([0005,0006] and Kajiwara (col 1 line 13-41), polishing uniformity is a desirable quality in polishing, thus one skilled in the art would have adjusted the polishing parameters necessary to achieve a substantially uniform material removal rate.
Furthermore, one skilled in the art would understand the uniformity of material removal is a result dependent on the process, and thus it would have been expected for one skilled in the art to be able to achieve a substantially uniform material removal rate, by following the method of claim 1.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over over Miyajima (JP H05251411 A), in view of Kajiwara (US 6540590 B1), Harada (JP 2001071255 A), Quek (US 6203408 B1), Baker (US 20030096507 A1), and Song (CN 108649021 A) as applied to the rejection of claim 1 above and further in view of Shiratani (US Pub. 20080057837 A1)
With respect to claim 6, Miyajima, as modified, teaches the limitations of claim 1 above, and but however does not explicitly teach that the first period of time is greater than the second period of time. However, Miyajima, as modified, teaches “after an appropriate time has elapsed until the polishing surface of the substrate W becomes familiar with the polishing pad 3, the suction is turned off and the pressure is increased to proceed with full-scale polishing. […] Next, when the polishing reaches a predetermined level, the polishing agent is turned off and the cleaning solution is turned on to clean the substrate W.” ([0022], also see the translated fig. 2 showing when suction and polishing/grinding is occurring). Miyajima, as modified, further teaches that the pressure is increased in the second period of time to proceed with “full-scale” polishing ([0022]).
Shiratani, in the same field of endeavor, relating to polishing, teaches of a method, wherein there is an normal level of pressure ([0038-0039] – referring to the initial polishing step), and an increased level of pressure ([0040] – referring to the high-load polishing of the over-polishing step; the load related to the pressure in [0049]), wherein the high-load polishing time is between 1 and 15 seconds and the two parts of the initial polishing step (being tungsten and barrier, as shown in fig. 5 is between 20 and 50 seconds in [0043]). Shiratani further teaches that the amount of polishing related to pressure and time (fig. 6, [0052]). Shiratani describes the preference of making the high-load polishing short in time because it reduces incubation time, and thus “makes the surface shape after the polishing smoother and obtains the ideal shape.” ([0070-0072], described in [0011]).
Thus, one of ordinary skill in the art, before the effective filing date of the claimed invention, would have incorporated the teachings of Shiratani into Miyajima, as modified and have made the second “full-scale” polishing time shorter than the first (preceding) polishing time because thus makes the surface shape after the polishing smoother and obtains the ideal shape, as explained using Shiratani above.
In the alternative, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have selected for an appropriate first and second polishing time, including one wherein the first polishing time is longer than the second polishing time, as Shiratani teaches that the amount of polishing is related to pressure and time, and Miyajima teaches that polishing is continued until an appropriate time (for the first period of time) and that full-scale polishing (second period of time) is done “polishing reaches a predetermined level” one skilled in the art would have been able to select appropriate times based on the desired amount of polishing and the polishing pressure.
In another alternative, it would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to tried, from a finite number of choices (there are three choices – one may make both the first and second period of time the same, the first time longer than the second and the second time longer than the first), and have selected for a first period of time that is greater than the second period of time, with a reasonable expectation of success, in order to address the problem presented by Miyajima (to select for an appropriate first period of time to make “the polishing surface of the substrate become familiar with the polishing pad” and for a second period of time to reach a “a predetermined level” of polishing). The result would have been predictable to one skilled in the art.
Claim(s) 17, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kajiwara (US 6540590 B1) in view of Harada (JP 2001071255 A) Quek (US 6203408 B1), Baker (US 20030096507 A1) and Song (CN 108649021 A), or in the alternative, under 35 U.S.C. 103 as being unpatentable over Kajiwara (US 6540590 B1) in view of Miyajima (JP H05251411 A), Harada (JP 2001071255 A), Quek (US 6203408 B1), Baker (US 20030096507 A1), and Song (CN 108649021 A).
With respect to claim 17, Kajiwara discloses:
A semiconductor polishing system (fig. 1; col 6 line 10-32) comprising:
a substrate carrier (140, fig. 1 and 2; col 7 line 8-35) having a membrane (185, fig .2; col 8 line 47-col 9 line 7), wherein the membrane engages a substrate (col 8 line 47-col 9 line 7 – “flexible member 185 or membrane, having a receiving surface 190 on which the substrate 105 is received”), and the substrate carrier comprises a vacuum chucking source, the vacuum source operable to flatten a bowed substrate (port 225 is used to draw a vacuum in col 10 line 44 to column 11 line 9; the vacuum; col 11 line 38-40 describe how the lands 250, fig. 9 is used to reduce bowing when vacuumed);
a substrate (substrate 105, figs. 1-2, engaged by the carrier membrane as in col 8 line 47-col 9 line 7)
a polishing pad (polishing pad surface 125, fig. 1; explained in col 6 line 49 to col 7 line 7) ;
wherein the substrate carrier is operable to polish the substrate against the polishing pad while the chucking source applies a chucking force to the substrate (the substrate carrier is structurally capable of being operated with the vacuum applied to the substrate while polishing)
and
a slurry port coupled to a slurry source, wherein the slurry port is operable to provide a slurry to the polishing pad (325, figs 11,12; as explained as slurry port 325 in the polishing head in col 12 line 39 to col 13 line 15; slurry source is 335, figs. 11 and 12).
Kajiwara does not explicitly disclose
the membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring of the substrate carrier
the vacuum chucking force is variable about an area of the substrate
a substrate comprising a sacrificial layer on a surface of the substrate to be engaged by the substrate carrier, the sacrificial laver imparting stress that reduces an existing bow of the substrate;
Harada, in the same field of endeavor, as related to polishing teaches of providing a membrane (23, fig. 5; [0021]) clamped above to a base assembly (8, fig. 5; [0021]) and secured to the base assembly from below by an inner ring (20, fig. 5; [0021]) of the substrate carrier. Harada teaches that his arrangement provides a state of tension, making it unnecessary to make the membrane itself firm, providing for a simple shape without adverse effects on the membrane and increasing polishing accuracy ([0027]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Kajiwara and have incorporated a membrane clamped above to a base assembly and secured to the base assembly from below by an inner ring, as taught by Harada in order to provide a simple shape without adverse effects on the membrane and increasing polishing accuracy.
As for limitations regarding a vacuum chucking force to the substrate via a plurality of vacuum ports arranged at discrete locations of the substrate carrier, the vacuum chucking force is variable about the plurality of vacuum ports, Quek, in the same field of endeavor, relating to polishing teaches of providing a plurality of vacuum ports arranged at discrete locations of the substrate carrier (plurality of ports 75, fig. 5; col 4 lines 19-36, these openings apply vacuum as in col 2 lines 22-35, in addition to providing a positive pressure). Quek teaches that this arrangement can fine tune the polishing to produce a more uniform wafer (col 2 lines 24-35, col 4 lines 9-19).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Miyajima and have incorporated a vacuum chucking force to the substrate via a plurality of vacuum ports arranged at discrete locations of the substrate carrier, the vacuum chucking force is variable about the plurality of vacuum ports, such that it results in a variable amount of suction force at different areas of the substrate as taught by Quek, for the purpose of fine tuning polishing to produce a more uniform wafer.
Regarding the limitation, a substrate comprising a sacrificial layer on a surface of the substrate to be engaged by the substrate carrier, Baker, in the same field of endeavor, related to semiconductor processing ([0002]), including regarding the use of CMP ([0032-0035]), teaches of forming/depositing a sacrificial laver on a surface of the substrate to be engaged by the substrate carrier (forming a sacrificial/protective layer on both the front and back [both sides] of the substate as in [0034], as shown in fig. 4b, examiner notes that the reference characters in the figures appears to be misnumbered, the front side appears to be 165 and back side 170; the removing the protective film from the front side using CMP, leaving the protective film 180, fig. 4c-4d to protect the back side of the wafer as in [0036]; because the front side of the wafer is the surface being subjected to CMP to remove the protective film, the back side, with the protective film is being held by the CMP carrier, see in Kajiwara, fig. 1, how substrate carrier 140 engages substrate 105, figs. 1-2 ). Baker, further provides that this protects the wafer from mechanical damage during processing ([0035-0037]), including contamination of the front side ([0002]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Kajiwara, and have incorporated on the substrate, a sacrificial layer on a surface of the substrate to be engaged by the substrate carrier, for the purpose of preventing mechanical damage to the wafer during processing. Examiner notes that claim 17, being an apparatus claim does not require that the substrate actually be engaged with the carrier, the functional language only requires that it can be (“to be engaged”).
As for limitations regarding the sacrificial laver imparting stress that reduces an existing bow of the substrate, the examiner notes that Baker, as applied above, provides for the sacrificial layer [protective film] to be applied as an silicon oxide (Baker, [0034]).
Song, in the same field of endeavor, related to semiconductor processing, teaches that it during semiconductor processing, stresses are formed on the surface of the substrate, causing warpage ([0004]), and that to improve warpage, the back film of the wafer is asymmetrically patterned, but still has to be thick ([0005]; the film also being a silicon oxide film analogous to Baker as in Song, [0016,0050]). Song proposes instead etching a pattern on the back side of the wafer ([0018]), and filling a stress layer on the patterned surface ([0027,0056]). Song teaches that reducing warpage reduces breakage [fragmentation] due to the presence of an asymmetrical shape ([0004]).
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have modified Kajiwara, and have made the sacrificial laver imparting stress that reduces an existing bow of the substrate, to adjust the warpage of the wafer, using the teachings of Song, for the purpose of reducing wafer breakage.
The examiner submits that Kajiwara, as modified above, renders obvious claim 17, as rejected above, because Kajiwara, as modified, is structurally capable of performing the claimed functional language (of an apparatus claim) of “wherein the substrate carrier is operable to polish the substrate against the polishing pad while the chucking source applies a chucking force to the substrate”
In the alternative, Miyajima, in the same field of endeavor, as related to substrate polishing, teaches of applying vacuum force to chuck a substrate during an initial polishing stage ([0014], see also translation of fig. 2, attached as NPL document dated 07/28/2023). Miyajima teaches that the application of this technique would allow the chucking of the wafer to be verified, while also stabilizing polishing by allowing the substrate to conform to the polishing pad , thus avoiding local increase in the amount of polishing
It would have been obvious for one of ordinary skill in the art, before the effective filing date of the claimed invention, to have utilized the methods taught by Miyajima of vacuum chucking the substrate during polishing, with the apparatus of Kajiwara for the purpose of stabilizing polishing while allowing enabling the chucking of the wafer to be verified.
With respect to claim 19, Kajiwara, as modified, teaches the limitations of claim 17 above and further teaches: wherein the substrate carrier is rotatable, translatable, or both relative to the polishing pad (carousal 135, fig. 1 holds polishing carriers 140, fig. 1 and is rotatable relative to the polishing pad 120/125 as explained in col 7 line 8-35 to provide “carousel 135 can be moved to orbit about a fixed central axis of the polishing platen 115 to provide an orbital motion to the polishing heads.”)
Response to Arguments
Applicant's arguments filed 02/10/2026 have been fully considered but they are not persuasive.
Regarding the arguments directed (response page 6-7) towards the new limitation of the sacrificial layer imparting stress that reduces an existing bow of the substrate, the applicant argued that Baker does not teach this aspect. The examine respectfully submits that Song, applied together with Baker, teaches of a layer that reduces the bow on the substrate by applying stress, by providing that the substrate be etched before application of the layer, and that this arrangement reduces wafer breakage.
No specific arguments were directed towards the dependent claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/Steven Huang/Examiner, Art Unit 3723
/JOEL D CRANDALL/Examiner, Art Unit 3723