DETAILED ACTION
Examiner’s Note
The prior arts cited in PTO-892 but not used in the current rejection are related to the claimed novelty.
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Election/Restrictions
Applicant’s election without traverse of species A/fig. 1-5, reflected in claims 1-9 in the reply filed on 02/27/2026 is acknowledged. Claims 10-22 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 and 7-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sharma et al. (US 20200091156 A1, hereinafter Sharma‘156).
Regarding independent claim 1, Sharma‘156 teaches, “A semiconductor device (1-9; ¶ [0001] - ¶ [0176]) comprising a read transistor (220, fig. 4A-4B) and a write transistor (210) that are electrically connected to each other over a substrate (452, see annotated fig. 4A),
wherein the read transistor (220) comprises:
a read channel layer (402) disposed on a plane over the substrate (452);
a read gate dielectric layer (406) disposed over the read channel layer (402); and
a read gate electrode layer (413) disposed over the read gate dielectric layer (406), and
wherein the write transistor (210) comprises:
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a write channel layer (402) disposed over a portion of the read gate electrode layer (413);
a write bit line (WBL) disposed on an upper surface of the write channel layer (402);
a write gate dielectric layer (406) disposed on a side surface of the write channel layer (402); and
a write word line (413, WWL) disposed to be adjacent to the write gate dielectric layer (406)”.
Regarding claim 2, Sharma‘156 further teaches, “The semiconductor device of claim 1, wherein the read channel layer (220/402), the read gate dielectric layer (220/406), and the read gate electrode layer (220/413) are disposed on a plane that is substantially parallel to a surface of the substrate (see annotation)”.
Regarding claim 4, Sharma‘156 further teaches, “The semiconductor device of claim 1, wherein the read gate electrode layer (220/413), the read gate dielectric layer (220/406), and the read channel layer (220/402) are disposed to overlap with each other in a direction substantially perpendicular to the surface of the substrate (see annotation)”.
Regarding claim 5, Sharma‘156 further teaches, “The semiconductor device of claim 1, wherein the read gate dielectric layer comprises an antiferroelectric material (¶ [0069] - ¶ [0070])”.
Regarding claim 6, Sharma‘156 further teaches, “The semiconductor device of claim 1, wherein the read gate dielectric layer comprises a paraelectric material having a high dielectric constant (¶ [0069] - ¶ [0070])”.
Regarding claim 7, Sharma‘156 further teaches, “The semiconductor device of claim 1, further comprising a read word line (RWL2, RWL1) and a read bit line (RBL) that are respectively disposed at opposite ends of the read channel layer (220/402) and that extend in a first direction (Y) substantially parallel to the surface of the substrate”.
Regarding claim 8, Sharma‘156 further teaches, “The semiconductor device of claim 7, wherein the write bit line (WBL1, fig. 4B) extends in a second direction (X) substantially parallel to the surface of the substrate and perpendicular to the first direction (Y), and wherein the write word line (WWL) extends in a third direction (Z) substantially perpendicular to the surface of the substrate”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Sharma‘156 as applied to claim 1 as above, and further in view of Sano et al. (US 20070063287 A1, hereinafter Sano‘287).
Regarding claim 3, Sharma‘156 teaches all the limitations described in claim 1.
But Sharma‘156 is silent upon the provision of wherein 3. The semiconductor device of claim 1, wherein a cross-sectional area of the read gate electrode layer is greater than a cross-sectional area of the write channel layer on a cross-sectional plane that is substantially parallel to the surface of the substrate.
However, Sano‘287 teaches a similar memory device, wherein a cross-sectional area of the read gate electrode layer (2G, fig. 62) is greater than a cross-sectional area of the write channel layer (4, fig. 3) on a cross-sectional plane that is substantially parallel to the surface of the substrate.
Sharma‘156 and Sano‘287 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Sharma‘156 with the features of Sano‘287 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Sharma‘156 and Sano‘287 to form the read gate and write channel with claimed cross-sectional area according to the teachings of Sano‘287 with a motivation of achieving high integration of the read transistor cells. See Sano‘287, ¶ [0002] - ¶ [0010].
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Sharma‘156.
Regarding claim 9, “The semiconductor device of claim 8, wherein a conductive carrier conducts in the second direction in the read channel layer, and the conductive carrier conducts in the third direction in the write channel layer”, Sharma‘156 teaches all the elements as claimed in claim 1 and 9 including the read channel layer and write channel layer. As the applicant’s claimed device and the device taught by Sharma‘156 teach a same structure, this is naturally recognized that the read channel layer and the write channel layer will possess the functionally of conducting conductive carriers. See MPEP § 2114.I. While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function alone. If the examiner has a "reason to believe" that a functional limitation can be performed inherently without modification by the prior art structure, the examiner should establish a prima facie case, and then shift the burden to the applicant to prove otherwise. See In re Swinehart, 169 USPQ 226 (CCPA 1971); In re Schreiber, 44 USPQ2d 1429 (Fed. Cir. 1997).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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