DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Regarding claim 16, the limitation “wherein the second solder mask is not in contact with the conductive pad” in lines 1-2 renders the claim indefinite, because it is unclear and confusing how the second solder mask can be coupled the conductive pad (interpreted as direct contact per Fig. 2 and ¶ [0031] of applicant’s disclosure), as required by claim 12, while simultaneously being not in contact with the conductive pad, as required by claim 16. For purposes of examination, this claim is unclear and confusing to the point where further prosecution on the merits is precluded.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6-12, 14-15, and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kumar et al. (U.S. Pub. No. 2016/0035622).
Regarding claim 1, Kumar et al. teaches a semiconductor device comprising: a substrate (Figs. 2 and 3, 203; ¶ [0063]); a conductive pad (Figs. 2 and 3, right side 210; ¶ [0063]) coupled to the substrate; a first solder mask (Figs. 2 and 3, 211; ¶ [0063]) coupled to the substrate and coupled to a first portion (edge portions) of the conductive pad (right side 210), the first solder mask covering the first portion (edge portions) of the conductive pad (right side 210) and extending above the conductive pad (Fig. 3); a second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) coupled to a portion (right most 211) of the first solder mask, the second solder mask extending above the first solder mask (Fig. 3), wherein a portion of the second solder mask (Fig. 3, portion of 212 in direct contact with conductive pad 210) is coupled to a second portion of the conductive pad (Fig. 3, portion of 210 in direct contact with second solder mask 212), where the second portion of the conductive pad is not covered by the first solder mask (Fig. 3); and a solder ball (Figs. 2 and 3, 215; ¶ [0064]) contacting a third portion of the conductive pad (middle portion of 210 in direct contact with 215) that is not covered by the first solder mask and the second solder mask (Fig. 3), the solder ball within an area (defined as the horizontal directions along the surface of the substrate) having a boundary (left and right edges of 212) formed by the second solder mask (Fig. 3).
Regarding claim 2, Kumar et al. teaches a semiconductor device wherein both the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) and the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) are positioned to prevent solder (e.g., Fig. 12B, Stages 6 to 7, ¶¶ [0098] - [0099]) from the solder ball (Figs. 2 and 3, 215; ¶ [0064]) spreading outside the area bounded by the first solder mask and the second solder mask.
Regarding claim 3, Kumar et al. teaches a semiconductor device wherein the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) is positioned to prevent solder (e.g., Fig. 12B, Stages 6 to 7, ¶¶ [0098] - [0099]) from the solder ball (Figs. 2 and 3, 215; ¶ [0064]) spreading outside the area bounded by the second solder mask.
Regarding claim 4, Kumar et al. teaches a semiconductor device wherein a combined height of the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) and the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) is within a threshold amount (Fig. 3, similar to how applicant uses this term) of a height of the solder ball (Figs. 2 and 3, 215; ¶ [0064]).
Regarding claim 6, Kumar et al. teaches a semiconductor device wherein the portion (Fig. 3, portion of 212 in direct contact with conductive pad 210) of the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) coupled to the second portion (Fig. 3, portion of 210 in direct contact with second solder mask 212) of the conductive pad (Figs. 2 and 3, right side 210; ¶ [0063]) decreases a diameter (Fig. 3) of a solder joint formed from the solder ball (Figs. 2 and 3, 215; ¶ [0064]).
Regarding claim 7, Kumar et al. teaches a semiconductor device wherein the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) and the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) comprise a common material (¶ [0067]).
Regarding claim 8, Kumar et al. teaches a semiconductor device wherein the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) and the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) comprise different materials (¶ [0067]).
Regarding claim 9, Kumar et al. teaches a semiconductor device further comprising: an additional second solder mask (Figs. 2 and 3, middle 212; ¶ [0063]) opposite the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) and parallel to the second solder mask (Fig. 3), the additional second solder mask coupled to an additional portion (middle 211) of the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) and extending above the first solder mask (Fig. 3).
Regarding claim 10, Kumar et al. teaches a semiconductor device wherein the additional second solder mask (Figs. 2 and 3, middle 212; ¶ [0063]) is positioned between the conductive pad (Figs. 2 and 3, right side 210; ¶ [0063]) and an additional conductive pad (Figs. 2 and 3, left side 210; ¶ [0063]) adjacent to the conductive pad (Fig. 3).
Regarding claim 11, Kumar et al. teaches a semiconductor device wherein the second solder mask (Figs. 2 and 3, right most 212; ¶ [0063]) is coupled to the first solder mask (Figs. 2 and 3, 211; ¶ [0063]) in a location within a threshold distance of a plane perpendicular (Fig. 3, similar to how applicant uses these terms) to the edge of the conductive pad (Figs. 2 and 3, right side 210; ¶ [0063]).
Regarding claim 12, Kumar et al. teaches a method for forming semiconductor assembly (Figs. 12A-12B, ¶¶ [0090]-[0099], teaching the method of making the assembly of Figs. 2 and 3) comprising: applying a first solder mask (Fig. 12A, Stages 2 & 3, 211, ¶¶ [0093]-[0094]) to a substrate (Fig. 12A, 203, ¶ [0092]) and to a conductive pad (Fig. 12A, second from left 210, ¶ [0092]) coupled to the substrate, the first solder mask covering a first portion (edge portions) of the conductive pad and extending above the conductive pad (Fig. 12A, Stage 3); applying a second solder mask (Fig. 12A, Stages 4 & 5, third from left 212, ¶¶ [0095]-[0096]) to the first solder mask, the second solder mask coupled to a portion (third from left 211) of the first solder mask and extending above the first solder mask (Fig. 12A, Stage 5), including coupling a portion of the second solder mask (Fig. 12A, Stage 5, portion of 212 in direct contact with second from left conductive pad 210) to a second portion of the conductive pad (Fig. 12A, Stage 5, portion of second from left conductive pad 210 in direct contact with 212), where the second portion of the conductive pad is not covered by the first solder mask (Fig. 12A, Stage 5); and applying a solder ball (Fig. 12B, Stage 7, 215, ¶ [0099]) to the conductive pad, the solder ball contacting a third portion of the conductive pad (middle portion of 210 in direct contact with 215) that is not covered by the first solder mask (Fig. 12B, Stage 7) and the solder ball within an area (defined as the horizontal directions along the surface of the substrate) having a boundary (left and right edges of 212) formed by the second solder mask (Fig. 12B, Stage 7).
Regarding claim 14, Kumar et al. teaches a method for forming semiconductor assembly wherein the portion of the second solder mask (Fig. 12A, Stage 5, portion of 212 in direct contact with second from left conductive pad 210) coupled to the second portion of the conductive pad (Fig. 12A, Stage 5, portion of second from left conductive pad 210 in direct contact with 212) decreases a diameter of a solder joint formed from the solder ball (Fig. 12B, Stage 7, 215, ¶ [0099]).
Regarding claim 15, Kumar et al. teaches a method for forming semiconductor assembly wherein applying the second solder mask (Fig. 12A, Stages 4 & 5, third from left 212, ¶¶ [0095]-[0096]) to the first solder mask (Fig. 12A, Stages 4 & 5, 211, ¶¶ [0095]-[0096]) comprises: coupling the second solder mask to the first solder mask in a location within a threshold distance of a plane perpendicular (Fig. 12A, Stage 5, similar to how applicant uses these terms) to an edge of the conductive pad (Fig. 12A, second from left 210, ¶ [0092]).
Regarding claim 17, Kumar et al. teaches a method for forming semiconductor assembly further comprising: melting the solder ball (Fig. 12B, Stage 7, 215, ¶ [0099], though “melting” is not discussed directly, one of ordinary skill in the art understands that melting is the only way to add the solder balls as taught), with melted solder remaining within the area (defined as the horizontal directions along the surface of the substrate) having the boundary (left and right edges of 212) formed by the second solder mask (Fig. 12B, Stage 7, third from left 212, ¶ [0096]).
Regarding claim 18, Kumar et al. teaches a method for forming semiconductor assembly further comprising: applying an additional second solder mask (Fig. 12A, Stages 4 & 5, second from left 212, ¶¶ [0095]-[0096]) opposite to the second solder mask (Fig. 12A, Stages 4 & 5, third from left 212, ¶¶ [0095]-[0096]) and parallel to the second solder mask (Fig. 12A, Stage 5), the additional second solder mask coupled to an additional portion (second from left 211) of the first solder mask (Fig. 12A, Stages 4 & 5, 211, ¶¶ [0095]-[0096]) and extending above the first solder mask (Fig. 12A, Stage 5).
Regarding claim 19, Kumar et al. teaches a method for forming semiconductor assembly wherein applying the second solder mask (Fig. 12A, Stages 4 & 5, third from left 212, ¶¶ [0095]-[0096]) to the first solder mask (Fig. 12A, Stages 4 & 5, 211, ¶¶ [0095]-[0096]) comprises: applying a second solder mask layer (Fig. 12A, Stage 4, 212, ¶ [0095]) to a surface of the first solder mask (Fig. 12A, Stage 4, 211, ¶ [0095]) and to a surface of the conductive pad (Fig. 12A, Stage 4, 210, ¶ [0095]) not covered by the first solder mask; and forming the second solder mask (Fig. 12A, Stage 5, third from left 212, ¶ [0096]) by removing one or more portions of the second solder mask layer from the surface of the first solder mask and the surface of the conductive pad not covered by the first solder mask (Fig. 12A, Stage 5, ¶ [0096]. Even though removal of the second solder mask layer from the surface of the first solder mask is not illustrated in Fig. 12A, ¶ [0096] states that “the removing of the second solder resist layer 212 may be done in such a way so that part of the first solder resist layer 211 is exposed,” which teaches this).
Regarding claim 20, Kumar et al. teaches a method for forming semiconductor assembly wherein the first solder mask (Fig. 12A, Stages 4 & 5, 211, ¶¶ [0095]-[0096]) and the second solder mask (Fig. 12A, Stages 4 & 5, 212, ¶¶ [0095]-[0096]) comprise different materials (¶ [0095]).
Response to Remarks
Applicant’s amendments to the claims and related remarks, filed December 22, 2025, have been fully considered and they are persuasive to overcome the previous rejections under 35 USC § 103. Specifically, while Examiner disagrees that Fujimori teaches away from the subject matter of former claims 5 and 13, Examiner is persuaded by Applicant’s argument that one of ordinary skill in the art would not use Fujimori’s structure during a solder-based reflow process. Accordingly, the previous rejections have been withdrawn and replaced with new rejections, detailed above.
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
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STEVEN B. GAUTHIER
Examiner
Art Unit 2893
/STEVEN B GAUTHIER/Examiner, Art Unit 2893
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