Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/05/2025 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-4, 6 and 8-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin (Pub. No.: US 2021/0050300).
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Re claim 1, Lin, Fig. 39 [as shown above] teaches a package-on-package (PoP) comprising:
a lower package (301);
an upper package [UP] disposed over the lower package;
an interposer substrate (79) disposed between the lower package and the upper package; and
a plurality of balls [PofB] between the interposer substrate (79) and the upper package [UP] and connecting the interposer substrate to the upper package,
wherein the lower package comprises:
a first substrate (101);
a first die (200) and a second die (250), the first and the second dies being disposed side by side in a horizontal direction, and disposed on the first substrate;
a vertical connection member (158, ¶ [0681]) electrically connecting the first substrate (101) to the interposer substrate (79), and disposed between the first substrate and the interposer substrate; and
a molding layer (42+92) covering the first die, the second die, and the vertical connection member,
wherein the upper package [UP] comprises:
a second substrate [SS];
a third die (251) disposed over the second substrate; and
a plurality of ball pads [BP] disposed on a surface of the second substrate, the plurality of ball pads corresponding to a package ball map comprising cells forming a plurality of rows and a plurality of columns (Fig. 27B), wherein one signal is placed in each of the cells,
wherein the plurality of balls [PofB] are attached on a bottom surface of the plurality of ball pads [BP],
wherein the interposer substrate (79) comprises on a surface thereof a plurality of ball lands [PofBL] disposed on the surface,
wherein at least a portion of the plurality of ball [PofB] lands overlap the first (200) and the second dies (250) in a vertical direction that intersects the horizontal direction, and
wherein the plurality of balls [PofB] are directly attached to the plurality of ball pads [BP], and are directly attached to some of the plurality of ball lands [PofBL].
Re claim 10, Lin, Fig. 39 [as shown above] teaches a package-on-package (PoP) comprising:
a lower package (101):
an upper package [UP] disposed over the lower package:
an interposer substrate (79) disposed between the lower package and the upper package; and a plurality of balls [PofB] between the interposer substrate (79) and the upper package [UP] and connecting the interposer substrate to the upper package,
wherein the lower package comprises:
a first substrate (101):
a first die (200) and a second die (250), the first and the second dies being disposed side by side in a horizontal direction, and disposed on the first substrate;
a vertical connection member (158) electrically connecting the first substrate to the interposer substrate, and disposed between the first substrate (101) and the interposer substrate (79); and
a molding layer (42+92) covering the first die, the second die, and the vertical connection member,
wherein the upper package [UP] comprises:
a second substrate [SS];
a third die (251) disposed over the second substrate; and
a plurality of ball pads [PofB] disposed on a surface of the second substrate, the plurality of ball pads corresponding to a package ball map comprising cells forming a plurality of rows and a plurality of columns (Fig. 27B), wherein one signal is placed in each of the cells,
wherein the plurality of balls [PofB] are attached on a bottom surface of the plurality of ball pads [BP],
wherein the interposer substrate (79) comprises on a surface thereof a plurality of ball lands [PofBL] disposed on the surface, and
wherein the vertical connection member (158) is configured so that a data signal and/or a control signal of the third die (411) are transmitted and received through the vertical connection member,
wherein the data signal and/or the control signal of the third die transmitted and received through the vertical connection member are not electrically connected to the first (200) and the second dies (250) in the interposer substrate and the lower package, and
wherein at least a portion of the plurality of the ball [PofB] lands overlap the first and the second dies in a vertical direction and
wherein the plurality of balls [PofB] are directly attached to the plurality of ball pads [BP], and are directly attached to some of the plurality of ball lands [PofBL].
In re claims 1 and 10, however, the plurality of balls [PofB] fails to teach wherein some of the plurality of ball lands do not overlap with the plurality of ball pads in the vertical direction.
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Lin, Fig. 39 [as shown above] teaches wherein some of the plurality of ball lands do not overlap with the plurality of ball pads in the vertical direction [BnotOballpads].
It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of enhancing the flexibility of manufacturing the packaging device by utilizing the connection without ball pads as taught by Lin.
Re claim 2, Lin, Fig. 39 teaches the PoP of claim 1, wherein the first die comprises a modem die, the second die comprises a dynamic random access memory (DRAM) die (250, [0593]), and the lower package is a system-in-package (SIP) (301).
Re claim 3, Lin, Fig. 39 teaches the PoP of claim 1, wherein the vertical connection member (158) is configured so that a data signal and/or a control signal of the third die (251, [0716]) are transmitted and received through the vertical connection member, and
the data signal and/or the control signal of the third die transmitted and received through the vertical connection member are not electrically connected to the first (200) and the second dies (250) in the interposer substrate and the lower package.
Re claim 4, Lin, Fig. 39 teaches the PoP of claim 1, wherein the plurality of ball [PofB] lands comprise a power ball land to which a power ball for transmitting and receiving a power signal of the third die (251) is attached and a ground ball land to which a ground ball for transmitting and receiving a ground signal of the third die is attached,
the power signal of the third die (Vcc of 251) is combined with or split from a power signal of the lower package, and
the ground signal of the third die (Vss of 251) is combined with a ground signal of the lower package.
Re claim 6, Lin teaches the PoP of claim 1, wherein the first die (250) is attached to the first substrate (101) through a bump ([B] of Fig. 39) in a flip-chip structure, and the second die (250 of Fig. 43) is attached to the first substrate (537) through a bonding wire (333).
Re claim 8, Lin, Fig. 39 teaches the PoP of claim 1, wherein the interposer substrate comprises a printed circuit board (PCB) or a redistributed layer (RDL) (79).
Re claim 9, Lin, Fig. 39 teaches the PoP of claim 1. wherein the upper package further comprises a memory controller (2014/258 of Fig. 33B) attached to the second substrate and configured to control an operation of the third die. and the third die comprises a memory die (2nd 250 of Fig. 43).
Re claim 11, Lin, Fig. 39 [as shown above] teaches the PoP of claim 10, wherein the first die (250) is attached to the first substrate (101) through a bump [B] in a flip-chip structure, and
the second die (2nd 250 of Fig. 43) is stacked on the first die in the vertical direction, and is electrically connected to the first substrate (537) through a bonding wire (333).
Re claim 12, Lin, Fig. 39 [as shown above] teaches the PoP of claim 10, wherein the first substrate (101) comprises a plurality of signal pads (27) electrically connected to the first (250) and the second dies (200), the plurality of signal pads being disposed on the surface of the first substrate, and
at least two first signal pads connected to the first die and at least two second signal pads connected to the second die, the at least two first signal and the at least two second signal pads [SSP] being among the plurality of signal pads, and configured to transmit and receive data signals between the first and the second dies, and
the second die comprises: at least two die pads (directly right below 200) for connection to the at least two second signal pads; and
a mode swap pad [SSP] configured to transmit and receive a mode swap signal for swapping an order of data signals transmitted and received through the at least two die pads.
Response to Arguments
Applicant's arguments with respect to claims 1 and 10 on the remarks filed on 12/05/2025 have been considered but are moot due to a new matching element of the upper package as shown in Fig. 39 above.
Conclusion
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/TONY TRAN/Primary Examiner, Art Unit 2893