Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless -
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-25 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Arendt (Patent Application Publication 2021/0090652).
Claim 1. A method, comprising: applying, for a first duration, a first programming pulse to a capacitor comprising a chalcogenide material (applying a first pulse on access line 104, Arendt Fig 1) to adjust a capacitance of the capacitor from a first capacitance to a second capacitance (102 Fig 1); and storing a first voltage to the capacitor based at least in part on adjusting the capacitance of the capacitor from the first capacitance to the second capacitance (fist voltage is stored to the capacitor based at least in part on adjusting the capacitance of 102 from a the first capacitance to the second capacitance), wherein the first voltage is based at least in part on the capacitor having the second capacitance (the first voltage is based at least in part on the capacitor having the second capacitance, MLC PCM have multiple capacitance levels).
Claim 2. The method of claim 1, wherein storing the first voltage to the capacitor comprises: applying a pulse (on access line 105) to the capacitor (102 Fig 1) based at least in part on applying the first programming pulse to the capacitor (based at least in part on applying the first programming pulse to 102 Fig 1).
Claim 3. The method of claim 1, wherein the capacitance of the capacitor (102 Fig 1) is increased from the first capacitance to the second capacitance based at least in part on a voltage of the first programming pulse satisfying a first threshold voltage (based at least in part on a voltage of the first programming pulse at access line 104 Fig 1 satisfying a first threshold voltage).
Claim 4. The method of claim 1, further comprising: applying, for a second duration, a second programming pulse to the capacitor to adjust the capacitance of the capacitor from the second capacitance to a third capacitance (applying a second pulse to 108 Fig 1 through access line 106), wherein the capacitance of the capacitor is decreased from the second capacitance to the third capacitance based at least in part on a voltage of the second programming pulse satisfying a second threshold voltage (based at least in part on voltage of the second programming pulse through access line 106 Fig 1 satisfying a second threshold voltage).
Claim 5. The method of claim 4, wherein applying the second programming pulse to the capacitor to decrease the capacitance from the second capacitance to the third capacitance further comprises: resetting the capacitor to an initial capacitance (reset pulse taught in 405 Fig 4).
Claim 6. The method of claim 4, wherein the second threshold voltage is greater than a first threshold voltage (V2 greater than V1 Fig 4).
Claim 7. The method of claim 1, further comprising: applying, for a third duration, a third programming pulse to the capacitor to increase the capacitance of the capacitor from the second capacitance to a fourth capacitance (apply the pulse through 143 Fig 1 to increase the capacitance of the capacitor from the second capacitance to a fourth capacitance); and storing a second voltage to the capacitor based at least in part on increasing the capacitance of the capacitor from the second capacitance to the fourth capacitance (second voltage is stored to the capacitor based at least on increasing the capacitance of the capacitor from the second capacitance to the fourth capacitance), wherein the second voltage is based at least in part on the capacitor having the fourth capacitance (the second voltage is based at least in part on the capacitor having the fourth capacitance, MLC PCM have multiple capacitance levels).
Claim 8. The method of claim 7, wherein the first programming pulse and the third programming pulse comprise a same polarity (pulses are shown to have a positive polarity Fig 4, same polarity taught in, Arendt [0037]).
Claim 9. The method of claim 7, wherein the first programming pulse comprises a first polarity and the third programming pulse has a second polarity different than the first polarity (applying different polarities taught in Arendt [0037]).
Claim 10. The method of claim 7, wherein the first duration and the third duration comprise a same duration (not critical, claim 11 claims the opposite, when repeating a same operating the durations are the same).
Claim 11. The method of claim 7, wherein the first duration comprises a different duration than the third duration (not critical, claim 10 claims the opposite, applying different durations taught in [0034]).
Claim 12. The method of claim 1, wherein the first programming pulse has a first polarity and adjusting the capacitance of the capacitor to the second capacitance is based at least in part on the first programming pulse having the first polarity (not critical, claim 13 claims the opposite, same polarity taught in, Arendt [0037]).
Claim 13. The method of claim 1, wherein the first programming pulse has a second polarity, and adjusting the capacitance of the capacitor to the second capacitance is based at least in part on the first programming pulse having the second polarity (not critical, claim 12 claims the opposite polarity taught in, Arendt [0037]).
Claim 14. The method of claim 1, further comprising: applying, for a fourth duration, a fourth programming pulse (apply a fourth through 143 Fig 1) to the capacitor (102 Fig 1) to adjust the capacitance of the capacitor from the second capacitance to an initial capacitance based at least in part on a voltage of the fourth programming pulse satisfying a second threshold voltage (adjust through 142 on access lines comprising 104 and 106 based at least in part on a voltage of the fourth programming pulse satisfying a second threshold voltage).
Claim 15. The method of claim 1, further comprising: applying electromagnetic radiation to the capacitor; and decreasing the capacitance of the capacitor from the second capacitance to a sixth capacitance based at least in part on applying the electromagnetic radiation to the capacitor, wherein the sixth capacitance is less than both the first capacitance and the second capacitance (near EM field are present from current pulses in PCM, multi level PCMs operate a several capacitance levels, the circuit decreases the capacitance of the capacitor from the second capacitance to a sixth capacitance based at least in part on applying the electromagnetic radiation from current pulses applied by 142 Fig 1).
Claim 16. The method of claim 1, wherein the first voltage stored in the capacitor is less than a first threshold voltage (when storing a logic zero the first voltage stored in the capacitor is less than a first threshold voltage greater than zero).
Claim 17. The method of claim 1, further comprising: applying, for a third duration that commences currently with the first duration, a fourth programming pulse to a second capacitor comprising a second chalcogenide material to adjust a capacitance of the second capacitor from a seventh capacitance to an eighth capacitance (apply a fourth pulse to a second capacity through 143 Fig 1 comprising a second chalcogenide material of a neighboring PCM cell 202 Fig 2 to adjust a capacitance of the second capacitor from a seventh capacitance to an eighth capacitance); and storing a third voltage to the second capacitor based at least in part on increasing the capacitance of the second capacitor from the seventh capacitance to the eighth capacitance, wherein the third voltage is based at least in part on the capacitor having the eighth capacitance (multi level PCMs operate a several capacitance levels, the circuit storing a third voltage to the second capacitor based at least in part on increasing the capacitance of the second capacitor from the seventh capacitance to the eighth capacitance, wherein the third voltage is based at least in part on the capacitor having the eighth capacitance using 142 Fig 1).
Claim 18. The method of claim 17, wherein the first capacitance and the eighth capacitance have a same capacitance (when using the same storage level the first capacitance and the eighth capacitance have a same capacitance).
Claim 19. The method of claim 1, wherein storing the first voltage to the capacitor further comprises: storing the first voltage (using 142 Fig 1) to the capacitor as part of one or more operations for an analog-to-digital converter (to 102 Fig 1 as part of one or more operations for the circuit show in Fig 1 which converts analog voltage or pulsed signals into digital logic).
Claim 20. An apparatus, comprising: a first access line (100, Arendt Fig 1); a second access line (106, Arendt Fig 1); a capacitor (102, Arendt Fig 1) comprising an anode coupled with the first access line (Top electrode 108, Arendt Fig 1), a cathode coupled with the second access line (Bottom electrode 108, Arendt Fig 1), and a chalcogenide material (phase change has a chalcogenide material, PCM taught in Arendt [0073]); and a controller (142) operable to (operable to is functional language) cause the apparatus to: apply, for a first duration, a first programming pulse to the capacitor to adjust a capacitance of the capacitor from a first capacitance to a second capacitance (applying, for a first duration, a first programming pulse to the capacitor 102 to adjust a capacitance of the capacitor from a first capacitance to a second capacitance); and store a first voltage to the capacitor (102) based at least in part on adjusting the capacitance of the capacitor from the first capacitance to the second capacitance (voltage is adjusted at least in part from adjusting the first capacitance to the second capacitance), wherein the first voltage is based at least in part on the capacitor having the second capacitance (based at least in part on 102 having the second capacitance, Arendt Fig 1).
Claim 21. The apparatus of claim 20, wherein to store the first voltage to the capacitor (102), the controller is operable to (operable to is functional language) cause the apparatus to: apply a pulse to the capacitor (102, Arendt Fig 1) based at least in part on applying the first programming pulse to the capacitor (based at least in part on applying the first programming pulse to 102).
Claim 22. The apparatus of claim 20, wherein the capacitance of the capacitor is increased from the first capacitance to the second capacitance based at least in part on a voltage of the first programming pulse satisfying a first threshold voltage (capacitance of 102 is increased from the first capacitance to the second capacitance based at least in part on a voltage of the first programming pulse satisfying a first threshold voltage).
Claim 23. The apparatus of claim 20, wherein the controller is (operable to is functional language) to cause the apparatus to: apply, for a second duration, a second programming pulse to the capacitor (103) to adjust the capacitance of the capacitor from the second capacitance to a third capacitance (multi level PCMs operate a several capacitance levels, the circuit is operable to adjust the capacitance from a second to a third using 142 Fig 1), wherein the capacitance of the capacitor is decreased from the second capacitance to the third capacitance based at least in part on a voltage of the second programming pulse satisfying a second threshold voltage (the circuit is operable to decrease the capacitance of 102 based at least in part on the voltage of second pulse satisfying a second threshold voltage, Fig 1).
Claim 24. The apparatus of claim 20, further comprising: a plurality of capacitors (plurality of 202 Fig 2) that each comprise a respective anode (top electrode 108 Fig 1), cathode (bottom electrode 108 Fig 1), and chalcogenide material (102 Fig 1, PCM taught in Arendt [0073]), wherein each of the plurality of capacitors are coupled with the first access line (204 Fig 2) and the second access line (206 Fig 2), wherein the controller (142 Fig 1) is (operable to is functional language) to cause the apparatus to: apply, for a third duration that commences currently with the first duration, a third programming pulse to each capacitor of the plurality of capacitors to increase a capacitance of each capacitor of the plurality of capacitors from a fourth capacitance to a fifth capacitance based at least in part on applying the third programming pulse for the third duration (operable to apply the pulse through 143 Fig 1 based at least in part on applying the third programming pulse for the third duration); and store a second voltage to each capacitor of the plurality of capacitors (202s Fig 2) based at least in part on increasing the capacitance of the plurality of capacitors from the fourth capacitance to the fifth capacitance, wherein the second voltage is based at least in part on each of the plurality of capacitors having the fifth capacitance (operable to store a second voltage through 142 based at least in part on increasing the capacitance of the plurality of capacitors from the fourth capacitance to the fifth capacitance, wherein the second voltage is based at least in part on each of the plurality of capacitors having the fifth capacitance).
Claim 25. A non-transitory computer-readable medium storing code, the code comprising instructions executable by a processor to: apply, for a first duration, a first programming pulse to a capacitor (at 102 Fig 1) comprising a chalcogenide material to adjust a capacitance of the capacitor from a first capacitance to a second capacitance (PCM taught in Arendt [0073]); and store a first voltage to the capacitor (102) based at least in part on adjusting the capacitance of the capacitor from the first capacitance to the second capacitance (voltage is adjusted at least in part from adjusting the first capacitance to the second capacitance), wherein the first voltage is based at least in part on the capacitor having the second capacitance (based at least in part on 102 having the second capacitance, Arendt Fig 1).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jason Lappas whose telephone number is (571) 270-1272. The examiner can normally be reached on M-F 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Amir Zarabian can be reached on (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON LAPPAS/
Primary Examiner, Art Unit 2827