The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of device claims in the reply filed on 08/01/2025 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
There is no adequate description in the disclosure for the claimed limitation of “the dielectric layer having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus”, as recited in claim 1. It is noted that said limitation is only recited in the abstract and in claim 1 with no articulation.
There is no support for the claimed limitation of “An apparatus comprising …. A layer of a second dielectric layer”, as recited in claim 11, because the second dielectric layer 226 is removed and is not present in the final apparatus product.
There is no support for the claimed limitation of a structure comprising a second dielectric layer 226 and a bond pad 230, as recited in claim 11.
There is no support for the claimed limitation of a structure comprising “the bond pad at least partially overhanging the mechanically altered surface of the layer of second dielectric material”, as recited in claim 11.
There is no support for the claimed limitation of a structure comprising “a seed layer disposed between the conductive annulus and the first dielectric material.”, as recited in claim 13.
There is no support for the claimed limitation of a structure comprising “a portion of the first dielectric material, the seed layer, and the conductive annulus are conformally disposed on a sidewall of the protruding end region of the TSV.”, as recited in claim 14.
There is no support for the claimed limitation of a structure comprising “wherein the layer of second dielectric material extends between a bottom surface of the conductive annulus and the first dielectric material, and wherein the layer of second dielectric material extends between a bottom surface of the seed layer and the first dielectric material”, as recited in claim 15.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation of “a conductive annulus that surrounds the end region of the TSV and that is separated from the end region of the TSV by a first dielectric material”, as recited in claim 11, is unclear as to how the conductive annulus is separated from the end region of the TSV by a first dielectric material, since the first dielectric material 224 surrounds the conductive annulus 228.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-15, as best understood, are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (11,195,818) in view of Kao et al. (2020/0381512).Regarding claim 11, Chen et al. teach in figure 1C and related text an apparatus comprising:
a through-silicon via (TSV) 128 having an end region protruding from a back side of a substrate 108;
a conductive annulus 129 that surrounds the end region of the TSV and that is separated from the end region of the TSV by a first dielectric material 124;
a layer of a second dielectric material 130 having a mechanically altered surface, the layer of second dielectric material 130 being disposed over the back side of the substate and surrounding the conductive annulus 129; and
a bond pad 114 disposed over the end region of the TSV 128 and the conductive annulus 129, the bond pad at least partially overhanging the mechanically altered surface of the layer of second dielectric material 130.
Chen et al. do not explicitly state using element 114 as a bond pad.Kao et al. teach in figure 1A and related text an apparatus comprising a through-silicon via (TSV) 104 having an end region protruding from a back side of a substrate 108 and a bond pad 112 disposed over the end region of the TSV 110 and a conductive annulus 102, the bond pad 112 at least partially overhanging the mechanically altered surface of a layer of second dielectric material 118.
Chen et al. and Kao et al. are analogous art because they are directed to semiconductor devices comprising through-silicon vias (TSV) and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use element 114 as a bond pad, as taught by Kao et al. in Chen et al.’s device, in order to be able to provide improved external connections to the device, as is well known in the art.
Regarding claim 12, Chen et al. teach in figure 1C and related text that the first dielectric material extends over the back side of the substrate.
Regarding claim 13, Chen et al. teach in figure 1C and related text a seed layer 131 disposed between the conductive annulus 129 and the first dielectric material 124.
In the alternative, it would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form glue layer 131 as a seed layer in Chen et al.’s device, in order to improve the structural integrity of the device.
Regarding claim 14, Chen et al. teach in figure 1C and related text that a portion of the first dielectric material, the seed layer, and the conductive annulus are conformally disposed on a sidewall of the protruding end region of the TSV.
Regarding claim 15, Chen et al. teach in figure 1C and related text that the layer of second dielectric material 130 extends between a bottom surface of the conductive annulus 129 and the first dielectric material 124 (diagonally), and wherein the layer of second dielectric material 130 extends between a bottom surface of the seed layer 131 and the first dielectric material 124.
Regarding claim 1, Chen et al. teach in figure 1C and related text a semiconductor device assembly, comprising:
a through-silicon via (TSV) 128 having an end region protruding from a back side of the substrate 108,
the end region being surrounded by a conductive annulus 129 disposed over the back side of the substrate;
a dielectric layer 130 disposed over the back side of the substrate, the dielectric layer 130 having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus 129; and
a bond pad 114 disposed over and electrically coupled to the end region of the TSV and the conductive annulus.
Chen et al. do not explicitly state using element 114 as a bond pad, and wherein the structure is being used in the direction depicted.Kao et al. teach in figure 1A and related text a bond pad 112 disposed over and electrically coupled to the end region of the TSV and the conductive annulus 102.
Chen et al. and Kao et al. are analogous art because they are directed to semiconductor devices comprising through-silicon vias (TSV) and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chen et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to use element 114 as a bond pad, as taught by Kao et al., in Chen et al.’s device, and to use Chen et al.’s device in portable application such that the device moves in all directions, in order to be able to provide improved external connections to the device, as is well known in the art, and in order to expand the device capabilities, respectively.
Regarding claim 2, Chen et al. teach in figure 1C and related text wherein the bond pad at least partially overhangs the dielectric layer.
Regarding claim 3, Chen et al. teach in figure 1C and related text that the upper surface of the dielectric layer is a mechanically altered surface.
Regarding claim 4, Chen et al. teach in figure 1C and related text that the conductive annulus, a TSV liner, and/or a seed layer are vertically aligned on a sidewall of the protruding end region of the TSV, but do not teach a passivation layer.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form dielectric layer 130 of ONO material such that the nitride material can be called “passivation layer” in Chen et al.’s device in order to improve the insulation to the TSV.
Regarding claim 5, Chen et al. teach in figure 1C and related text that the now passivation layer further extends on the back side of the substrate.
Regarding claim 6, Chen et al. teach in figure 1C and related text that the bond pad is disposed over and electrically coupled to the TSV liner and the seed layer.
Regarding claim 7, Chen et al. teach in figure 1C and related text that now the dielectric layer is disposed on the passivation layer extending on the back side of the substrate, the dielectric layer having a region disposed under the seed layer and/or the conductive annulus.
Regarding claim 8, Chen et al. teach in figure 1C and related text that the now passivation layer is made of at least one of tetraethyl orthosilicate (TEOS) or silicon nitride.
Regarding claim 9, Chen et al. teach in figure 1C and related text that the seed layer and/or the conductive annulus are made of at least one of copper, tungsten, molybdenum, nickel, titanium, tantalum, platinum, silver, gold, ruthenium, iridium, rhenium, rhodium, or alloys thereof.
Regarding claim 10, Chen et al. teach in figure 1C and related text that the now passivation layer is made of at least one of silicon oxide, silicon nitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbon nitride.
Response to Arguments
1. Applicants argue that there is support in paragraph 23 and Fig. 2H for the claimed limitation of "the dielectric layer having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus", as recited in claim 1.
1. It is correct that the processing steps recited in paragraph 23 and depicted in figure 2H describe the processing steps of forming the final structure, as depicted in figure 2I. However, claim 1 is directed towards a final structure, and as illustrated in the final structure depicted in figure 2I, the conductive annulus does not appear to have to have an upper surface flush with the dielectric layer.
If applicants state that claim 1 is directed to an intermediate product, then there is support for the claimed limitation recited in claim 1.
2. Applicants argue that “the specification contains ample support for claim 11's recitation of "a second dielectric material" and "a bond pad," with "the bond pad at least partially overhanging the mechanically altered surface of the layer of second dielectric material" to convey with reasonable clarity to those skilled in the art that Applicant was in possession of the claimed invention at the time of filing the application”.
2. As recited in the rejection, and as explained in section 1 above, there is support for the claimed limitation, as recite in claim 11, for an intermediate product. However, there is no support for the claimed limitation, as recite in claim 11, for a final product.
3. Applicants argue that “the application contains ample support for the additional features of claims 13 and 14”.
3. Claim 13, for example, recites “a seed layer disposed between the conductive annulus and the first dielectric material”. However, figure 2I clearly depicts the conductive annulus 228 disposed between a seed layer 12 and the first dielectric material 224 of one TSV.
4. Applicants argue that Chen does not teach "a through-silicon via (TSV) having an end region protruding from a back side of a substrate”.
4. Figure 1C of Chen clearly depicts a through-silicon via (TSV) 128 having an end region protruding from a back side of a substrate 108, as required by the claims.
5. Applicants argue that Chen does not teach “the end region is surrounded by a conductive annulus disposed over the back side of the substrate," as recited in claim 1, because “In contrast to these features, the TSV 128 of Chen is surrounded by a chemical barrier layer 129 and a dielectric TSV lining 130, neither of which is a "conductive annulus”."
5. Although “the TSV 128 of Chen is surrounded by a chemical barrier layer 129 and a dielectric TSV lining 130”, as argue by applicants, the TSV 128 of Chen is also surrounded by conductive annulus 129, as required by the claims.
6. Applicants argue that Chen does not teach "dielectric layer disposed over the back side of the substrate," that has "an upper surface flush with an upper surface of the end region of the TSV,".
6. Figure 1C of Chen clearly depicts “a dielectric layer 130 disposed over the back side of the substrate, the dielectric layer 130 having an upper surface flush with an upper surface of the end region of the TSV and flush with an upper surface of the conductive annulus 129”, as required by the claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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O.N. /ORI NADAV/
11/26/2025 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800