Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the amended limitations of claim 7 combined with “first hollowed zone has a first depth from an upper surface of the coating and the second hollowed zone has a second depth from the upper surface of the coating, and wherein the first depth is greater than the second depth“ (claim 8) (the applicant has not indicated the drawings are to scale see MPEP 2125 II) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “the second hollowed zone has a depth deeper than a depth of the first hollowed zone “ (claim 17, claim 20 and claim 22) (the applicant has not indicated the drawings are to scale see MPEP 2125 II) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Election/Restrictions
Applicant’s election without traverse of species A in the reply filed on 11/3/25 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 4-5, 18 and 21 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Ishida et al. (US Patent 5,108,955).
Regarding claim 1, Ishida et al. disclose a base substrate (2) (fig. 14); a electronic chip (1) (fig. 14) mounted on a face of the base substrate; a coating (6) (fig. 14) which encapsulates said electronic chip, said coating having a bottom face mounted on said face of the base substrate and further having a profiled top face; wherein a portion of said profiled top face is configured to locally reduce a volume of a region of the coating (recess in 6 at 11d)(fig. 14); and a heat sink (top portion of 11) mounted on the profiled top face of the coating using a mounting layer (bottom portion of 11) (fig. 14).
Regarding claim 2, Ishida et al. disclose the mounting layer (bottom portion of layer 11) has a profile that molds to the profiled top face of the coating (6) and wherein the heat sink (top portion of layer 11) has a profiled bottom face that molds to a profile of the mounting layer and further includes a planar top face (fig. 14).
Regarding claim 4, Ishida et al. disclose the portion of the profiled top face of the coating includes a first hollowed zone (11d) extending in a direction of the base substrate and delimiting a corresponding first locally reduced volume of the coating covering at least partially said electronic chip (fig 14).
Regarding claim 5, Ishida et al. disclose the portion of the profiled top face of the coating further includes a second hollowed zone (to left of 11a in fig. 14) extending in the direction of the base substrate and delimiting a corresponding second locally reduced volume of the coating located laterally in relation to the first locally reduced volume of the coating (fig. 14).
Regarding claim 18, Ishida et al. disclose a base substrate(1) (fig. 14); a electronic chip (2) (fig. 14)mounted on a face of the base substrate; a coating(6) (fig. 14) which encapsulates said electronic chip and is mounted to said face of the base substrate and further having a profiled top face defined by a plurality of hollowed zones (depression/recess form by layer 11, the recess formed by 11d and right of 11a and left of 11a see figure 14 mark up below) that locally reduce a volume of corresponding region of the coating; wherein said plurality of hollowed zones comprise: a first hollowed zone (11d) extending in a direction of the base substrate and providing a first locally reduced volume of the coating which extends directly over said electronic chip; and a second hollowed zone (left of 11a) extending in the direction of the base substrate and providing a second locally reduced volume of the coating located laterally in relation to the first locally reduced volume; and a heat sink (top portion of 11) mounted on the profiled top face of the coating using a mounting layer(bottom portion of 11).
Regarding claim 18, Ishida et al. disclose the second locally reduced volume of the coating (region left of 11a in fig. 14) extends completely laterally beyond an outer perimeter of said electronic chip (1)(fig 14).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishida et al. (US Patent 5,108,955) as applied to claim 1 in view of Huang et al. (US Patent 6,400,014) and Tsuji et al. (US 2015/0357261).
Ishida et al. disclose the invention supra.
Ishida fails to disclose the mounting layer has a profiled bottom face that molds to the profiled top face of the coating and further includes a planar top face, and wherein the heat sink has a planar bottom face mounted on the planar top face of the mounting layer and a planar top face.
Huang et al. disclose layer (330) has a profiled bottom face (332a and 332b) that molds to the profiled top face of the coating and further includes a planar top face (330a)(figs 1 and 4).
Tsuji et al. disclose wherein the heat sink (4)(fig. 1) has a planar bottom face.
The combination of Huang et al and Tsuji et al would result in Huang’s 330 serving as the mounting layer and the heat sink (4,Tsuji et al) mounted on the planar top face of the mounting layer (330, Huang) and a planar top face.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (using a profiled face and using a heat sink to dissipate heat), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the profiled bottom face of the mounting layer would reduce the volume of the coating material and the heat sink would dissipate heat).
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishida et al. (US Patent 5,108,955) as applied to claim 1 in view of Lee et al. (US 2001/0019181).
Ishida disclose the invention supra. Ishida disclose contact pads on the face of the base substrate (2)(fig 14) by connection wires (3), and wherein the coating (6) further encapsulates the contact pads and the connection wires..
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Ishida et al. fails to disclose electronic chip includes a bottom face mounted on said face of the base substrate by an adhesive layer and a top face including contact pads.
Lee et al. disclose electronic chip (22) includes a bottom face mounted on said face of the base substrate (20) by an adhesive layer (24) and a top face including contact pads [0024, bonding wire is connected to the chip 22 via a conductive pad ].
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (using a conductive pad on a chip and using an adhesive layer), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the contact pad would let the chip communicate outside the chip and the adhesive layer would bind the chip to the substrate).
Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ishida et al. (US Patent 5,108,955) in view of Huang et al. (US Patent 6,400,014) and Tsuji et al. (US 2015/0357261).
Regarding claim 11, Ishida et al. disclose a base substrate (1) (fig. 14); a electronic chip (2) (fig. 14) mounted on a face of the base substrate; a coating (6) (fig. 14) which encapsulates said electronic chip and is mounted to said face of the base substrate and further having a profiled top face defined by a plurality of hollowed zones that locally reduce a volume of corresponding region of the coating;
Ishida fails to disclose a mounting layer that fills the plurality of hollowed zones and covers the coating to provide a planar top face; and a heat sink having a planar bottom face mounted on the planar top face of the mounting layer.
Huang et al. disclose layer (330) has a profiled bottom face (332a and 332b) that fills the plurality of hollowed zones and covers the coating to provide a planar top face (330a)(figs 1 and 4).
Tsuji et al. disclose wherein the heat sink (4)(fig. 1) has a planar bottom face.
The combination of Huang et al and Tsuji et al would result in Huang’s 330 serving as the mounting layer and the heat sink (4,Tsuji et al) mounted on the planar top face of the mounting layer (330, Huang).
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (using a profiled layer and using a heat sink to dissipate heat), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the profiled bottom face of the mounting layer would reduce the volume of the coating material and the heat sink would dissipate heat).
Regarding claim 12, Ishida et al. disclose the plurality of hollowed zones comprises a first hollowed zone extending in a direction of the base substrate and providing a first locally reduced volume of the coating which extends directly over said electronic chip (fig. 14).
Regarding claim 13, Ishida et al. disclose further includes a second hollowed zone (to left of 11a in fig. 14) extending in the direction of the base substrate and delimiting a corresponding second locally reduced volume of the coating located laterally in relation to the first locally reduced volume of the coating (fig. 14).
Allowable Subject Matter
Claims 8-10, 14-17, 19 -20 and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter, as the prior art of record fails to teach or suggest: wherein said profiled top face is defined by:a first hollowed zone extending in a direction of the base substrate and located vertically over said electronic chip; and a second hollowed zone extending in the direction of the base substrate,and spaced laterally away from and surrounding the first hollowed zone, and at least partially located vertically over said electronic chip (claim 8-10) wherein the second locally reduced volume of the coating extends partially over said electronic chip and partially beyond an outer perimeter of said electronic chip (claims 14-17) the second locally reduced volume of the coating extends partially over said electronic chip and partially beyond an outer perimeter of said electronic chip (claim 19-20) and the second hollowed zone has a depth deeper than a depth of the first hollowed zone (claim 22).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY K SMITH whose telephone number is (571)272-1884. The examiner can normally be reached Monday-Friday, 10am-6pm.
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/BRADLEY SMITH/Primary Examiner, Art Unit 2817