DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The following office action is in response to the amendment and remarks filed on 5/1/26.
Applicant’s amendment to claims 13, 23 and 24 is acknowledged.
Applicant’s cancellation of claims 14, 15 and 25 is acknowledged.
Claims 1-13 and 16-24 are pending and subject to examination at this time.
Allowable Subject Matter
Claims 23-24 are allowed.
Response to Arguments
Regarding claim 1 and the Kweon reference:
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Regarding claim 1 and the Devnani reference:
Applicant's arguments filed 5/1/26 have been fully considered but they are not persuasive.
The roughening of the insulating layers results in a non-uniform surface along the interface with the wiring conductors. Because the surface is non-uniform there are spaces along the interface and under broadest reasonable interpretation, these spaces meet the claimed “first gap” and “second gap” limitation. Also the claim does not preclude the spaces/gaps from being filled because the gap is not required to be a void gap.
Devnani’s Fig. 7 has been annotated below to show the location of the roughened surface at the interfaces corresponding to the location of the spaces or gaps.
The location of the gaps annotated in fig. 7 show at least one first gap spatially below the pair of traces (601, 600) and at least one second gap to be above the pair of traces (601, 600).
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Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 22 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In claim 22, the limitation “the gap has a height up to approximately 200 µm” is indefinite. It is not clear if the claim requires 200 µm to be an upper limit of a range or if the claim requires the gap to extend up to an height equal approximately 200 µm.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 5, 6, 11, 13, 16 and 18 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweon, KR 20110067759 A (see attached English machine translation).
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1. An electronic package, comprising (see fig. 1e annotated above):
a first layer (e.g. first layer annotated above),…;
a second layer (e.g. second layer annotated above) over the first layer,…;
a third layer (240) over the second layer, wherein the third layer comprises glass;
a pair of traces (110 or 140) in the second layer;
a first gap (e.g. first air gap labeled above) below the pair of traces, wherein the first gap is in the first layer and the second layer; and
a second gap (e.g. second air gap labeled above) above the pair of traces, wherein the second gap is in the second layer and the third layer. See Kweon at English machine translation pages 1-7, figs. 1a-1e.
Regarding claim 1:
Kweon does not expressly teach:
wherein the first layer comprises glass;
wherein the second layer comprises glass;
However, it would have been obvious to one having ordinary skill in the art to form the first layer and second layer to comprise glass, since it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Kweon further teaches:
2. The electronic package of claim 1, wherein the first gap and the second gap are air gaps (e.g. 300 is an air gap in fig. 1e)
5. The electronic package of claim 1, wherein vias are formed through the first layer (105), the second layer (130, 150, 170), and the third layer (e.g. of 260), wherein the vias are adjacent to the first gap and the second gap, fig. 1e.
6. The electronic package of claim 5, wherein the vias (105, 130, 150, 170 and via of 260) have one or more misaligned edges with each other, fig. 1e.
Regarding claim 11:
Kweon does not expressly teach:
wherein the first layer, the second layer, and the third layer comprise fused silica glass or borosilicate glass.
However, it would have been obvious to one having ordinary skill in the art to form the first layer, the second layer, and the third layer to comprise fused silica glass or borosilicate glass, since it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Kweon teaches:
13. An electronic package, comprising (see fig. 1e annotated above):
a core, wherein the core comprise three or more sublayers (e.g. first layer, second layer and third layer annotated);
a first trace (110 or 140) in the core;
a second trace (e.g. adjacent 110 or 140) in the core, wherein the second trace is laterally adjacent to the first trace, wherein the first trace and the second trace are in a middle sublayer (e.g. second layer annotated) of the three or more sublayers; and
a gap above (e.g. see second gap annotated) and below (e.g. see first gap annotated) the first trace and the second trace, wherein the gap is in the middle layer (e.g. second layer annotated) and in another one of the three or more layers (e.g. first layer and third layer annotated) adjacent to the middle layer. See Kweon at English machine translation pages 1-7, figs. 1a-1e.
Regarding claim 13:
Kweon does not expressly teaches the third layer (240) comprises glass.
Kweon does not expressly teach the first layer and second layer comprise glass or specifically, “a glass core, wherein the glass core comprise three or more glass sublayers”.
However, it would have been obvious to one having ordinary skill in the art to form a glass core, wherein the glass core comprise three or more glass sublayers, since it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
16. The electronic package of claim 14, wherein a seam is provided between each of the glass sublayers (e.g. interfaces formed by layers is a seam), fig. 1e.
18. The electronic package of claim 13, wherein vias (105, 130, 150, 170 and via of 260) are provided through the glass core adjacent to the first trace and the second trace, fig. 1e.
Regarding claim 22:
Kweon is silent:
wherein the gap has a height up to approximately 200 μm both above and below the first trace and the second trace.
However, absent any disclosure by the Applicant that a height up to approximately 200 μm is critical or provides for unexpected results, such a height can be considered within the skill level of one of ordinary skill in the art or by the guidance provided by Kweon.
See MPEP § 2144.05, Obviousness of Ranges:
In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969)…Claimed elastomeric polyurethanes which fell within the broad scope of the references were held to be unpatentable thereover because, among other reasons, there was no evidence of the criticality of the claimed ranges of molecular weight or molar proportions. (Emphasis added.)
Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree "will not sustain a patent").
[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
Claim(s) 1, 5, 9-11, 13, 16-18 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devnani et al., US Publication No. 2003/0183919 A1 (of record) in view of Seri, JP 2005285862 A (of record).
Devnani teaches:
1. An electronic package, comprising (see fig. 7 annotated below):
a first layer (e.g. layer below 604), wherein the first layer comprises glass (e.g. glass ceramic at para. [0021]);
a second layer (605/602/603) over the first layer, wherein the second layer comprises glass (e.g. glass ceramic at para. [0021]);
a third layer (205/202/203) over the second layer, wherein the third layer comprises glass (e.g. glass ceramic at para. [0021]);
a pair of traces (601, 600) in the second layer;… See Devnani at para. [0001] – [0034], figs. 1-13.
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Devnani does not expressly teach:
a first gap below the pair of traces, wherein the first gap is in the first layer and the second layer; and
a second gap above the pair of traces, wherein the second gap is in the second layer and the third layer.
In an analogous art, Seri at English machine translation page 3 teaches:
“However, as a method of forming a roughened surface having good adhesion on the surface of the insulating layer… A gap between the wiring conductors located above and below the insulation layer is formed…”
Thus, Seri teaches roughening the surface of an insulating layer to achieve good adhesion.
The roughening of the insulating layers results in a non-uniform surface along the interface with the wiring conductors. Because the surface is non-uniform there are spaces along the interface and under broadest reasonable interpretation, these spaces meet the claimed “gap” limitation.
It would have been obvious to one of ordinary skill in the art to modify Devnani with Seri for form “a first gap (e.g. from roughening) below the pair of traces (601, 600), wherein the first gap is in the first layer (e.g. layer below 604) and the second layer (605/602/603); and a second gap (e.g. from roughening) above the pair of traces (601, 600), wherein the second gap is in the second layer (605/602/603) and the third layer (205/202/203)”, as recited in the claim, in order to improve adhesion on the surface of the insulating layer.
Regarding claim 5:
Devnani further teaches:
5. The electronic package of claim 1, wherein vias (707, 726, 717, 720, 721, 722, 723) are formed through the first layer (e.g. layer below 604), the second layer (605/602/603), and the third layer (205/202/203), fig. 7.
Devnani does not expressly teach wherein the vias are adjacent to the first gap and the second gap.
Seri teaches roughening the surface of an insulating layer to achieve good adhesion. The roughening results in a gap between the wiring conductors located above and below the insulation layer.
It would have been obvious to one of ordinary skill in the art to modify Devnani with Seri for form “wherein the vias (707, 726, 717, 720, 721, 722, 723) are adjacent to the first gap (e.g. from roughening) and the second gap (e.g. from roughening)”, as recited in the claim, in order to improve adhesion on the surface of the insulating layer.
Regarding claim 9:
Devnani further teaches:
9. The electronic package of claim 1, wherein a thickness of the first layer (e.g. layer below 604) and the third layer (205/202/203) is greater than a thickness of the second layer (605/602/603), fig. 7.
Regarding claim 10:
Seri further teaches:
10. The electronic package of claim 1, wherein the first gap and the second gap comprise non-planar surfaces (e.g. Seri teaches the gaps are formed by roughening so the gaps obviously have non-planar surfaces. See Seri at English machine translation page 3.)
Regarding claim 11:
Devnani further teaches the first layer, the second layer, and the third layer comprise glass ceramic at para. [0021].
Devnani does not expressly teach used silica glass or borosilicate glass.
It would have been obvious to one having ordinary skill in the art to form the first layer, the second layer, and the third layer comprise fused silica glass or borosilicate glass, since it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Devnani teaches:
13. An electronic package, comprising (see fig. 7 annotated above):
a glass core (e.g. layer below 604+605/602/603+205/202/203), wherein the glass core comprises three or more glass sublayers (e.g. see first, second and third layer annotated in fig. 7);
a first trace (601) in the glass core;
a second trace (600) in the glass core, wherein the second trace is laterally adjacent to the first trace; wherein the first trace and the second trace are in a middle glass sublayer (e.g. second layer annotated in fig. 7) of the three or more glass sublayers; and… See Devnani at para. [0001] – [0034], figs. 1-13.
Devnani does not expressly teach:
a gap above and below the first trace and the second trace, wherein the gap is in the middle layer and in another one of the three or more glass layers adjacent to the middle glass layer.
In an analogous art, Seri at English machine translation page 3 teaches:
“However, as a method of forming a roughened surface having good adhesion on the surface of the insulating layer… A gap between the wiring conductors located above and below the insulation layer is formed…”
Thus, Seri teaches roughening the surface of an insulating layer to achieve good adhesion.
The roughening of the insulating layers results in a non-uniform surface along the interface with the wiring conductors. Because the surface is non-uniform there are spaces along the interface and under broadest reasonable interpretation, these spaces meet the claimed “gap” limitation.
It would have been obvious to one of ordinary skill in the art to modify Devnani with Seri for form “a gap (e.g. space from roughening) above and below the first trace (601) and the second trace (600), wherein the gap is in the middle layer (e.g. second layer annotated in fig. 7) and in another one of the three or more glass layers (e.g. first layer or third layer annotated in fig. 7) adjacent to the middle glass layer”, as recited in the claim, in order to improve adhesion on the surface of the insulating layer.
Devnani further teaches:
16. The electronic package of claim 14, wherein a seam (e.g. interfaces formed by layers is a seam) is provided between each of the glass sublayers (e.g. layer below 604+605/602/603+ 205/202/203), fig. 7.
Regarding claim 17:
Seri teaches the limitations as applied to claim 10 above.
Devnani further teaches:
18. The electronic package of claim 13, wherein vias (707, 726, 717, 720, 721, 722, 723) are provided through the glass core (e.g. layer below 604+605/602/603+205/202/203) adjacent to the first trace (601) and the second trace (600), fig. 7.
Regarding claim 22:
Devnani and Seri are silent:
wherein the gap has a height up to approximately 200 μm both above and below the first trace and the second trace.
However, absent any disclosure by the Applicant that a height up to approximately 200 μm is critical or provides for unexpected results, such a height can be considered within the skill level of one of ordinary skill in the art or by the guidance provided by Devnani and Seri.
See MPEP § 2144.05, Obviousness of Ranges:
In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969)…Claimed elastomeric polyurethanes which fell within the broad scope of the references were held to be unpatentable thereover because, among other reasons, there was no evidence of the criticality of the claimed ranges of molecular weight or molar proportions. (Emphasis added.)
Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree "will not sustain a patent").
[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955)
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Devnani with the teachings of Seri because roughening the surface of an insulating layer results in a gap between the wiring conductors located above and below the insulation layer that can help achieve good adhesion. See Seri at English machine translation page 3.
Claim(s) 3, 4, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kweon, as applied to claims 1 and 13 above, and further in view of Kang et al., US Publication No. 2021/0118765 A1 (of record).
Regarding claims 3, 4, 19 and 20:
Kweon teaches all the limitations of claims 1 and 13 above, but does not expressly teach the traces have tapered sidewalls/edges or hourglass shaped cross-sections.
In an analogous art, Kang teaches wirings may have a tapered shaped or “a well-known shape, such as an hour-glass shape, a cylindrical shape, and the like…” See Kang at para. [0028].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Kweon with Kang, because (i) An hour-glass shape is “a well-known shape” (e.g. see Kang at para. [0028]); and (ii) It is within the general skill of a worker in the art to select favorite shape (e.g. tapered shape, hour glass shape, etc.) on the basis of its suitability for the intended use as a matter of obvious design choice. See MPEP § 2144.04 Legal Precedent as Source of Supporting Rationale, IV. Changes in Size, Shape, or Sequence of Adding Ingredients. Because the criticality of the particular shape of the traces has not been presented with persuasive evidence, the shape is considered a matter of choice which a person of ordinary skill in the art would have found obvious (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); MPEP 2144.04, IV(B).
Claim(s) 3, 4, 6, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devnani in view of Seri, as applied to claims 1 and 13 above, and further in view of Kang et al., US Publication No. 2021/0118765 A1 (of record).
Regarding claims 3, 4, 19 and 20:
Devnani and Seri teach all the limitations of claims 1 and 13 above, but do not expressly teach the traces have tapered sidewalls/edges or hourglass shaped cross-sections.
In an analogous art, Kang teaches wirings may have a tapered shaped or “a well-known shape, such as an hour-glass shape, a cylindrical shape, and the like…” See Kang at para. [0028].
Regarding claim 6:
One of ordinary skill in the art modifying Devnani with Kang to form wiring with tapered sidewalls/edges or hourglass shaped cross-sections, as set forth above in claims 3-4 would form “wherein the vias have one or more misaligned edges with each other (e.g. due to tapering)”, as recited in the claim.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Devnani with Kang, because (i) An hour-glass shape is “a well-known shape” (e.g. see Kang at para. [0028]); and (ii) It is within the general skill of a worker in the art to select favorite shape (e.g. tapered shape, hour glass shape, etc.) on the basis of its suitability for the intended use as a matter of obvious design choice. See MPEP § 2144.04 Legal Precedent as Source of Supporting Rationale, IV. Changes in Size, Shape, or Sequence of Adding Ingredients. Because the criticality of the particular shape of the traces has not been presented with persuasive evidence, the shape is considered a matter of choice which a person of ordinary skill in the art would have found obvious (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966); MPEP 2144.04, IV(B).
Claim(s) 7 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devnani in view of Seri, as applied to claim 1 above, and further in view of Kulkami et al., US Publication No. 2023/0102183 A1 (of record).
Regarding claim 7:
Devnani and Seri teach all the limitations of claim 1 above, but do not expressly teach:
wherein the first layer is bonded to the second layer with a hybrid bonding architecture, and wherein the second layer is bonded to the third layer with a hybrid bonding architecture.
In an analogous art, Kulkami teaches:
wherein a first layer (310) is bonded to a second layer (320) with a hybrid bonding architecture, fig. 3. See Kulkami at para. [0024].
Regarding claim 12:
Kulkami further teaches:
12. The electronic package of claim 1, wherein the first layer is bonded to the second layer with solder, and wherein the second layer is bonded to the third layer with solder (e.g. solder paste at para. [0015])
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Devnani with the teachings of Kulkami to form “wherein a first layer is bonded to a second layer with a hybrid bonding architecture, and wherein a second layer is bonded to a third layer with a hybrid bonding architecture” because hybrid bonding is an “efficient method” for bonding two substrate (e.g. Kulkami at para. [0005]); and a reduced package height can be achieved.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devnani in view of Seri, as applied to claim 1 above, and further in view of Beaulieu et al., US Patent No. 7,696,631 (of record).
Regarding claim 8: Devnani and Seri teach all the limitations of claim 1 above, but do not expressly teach:
wherein the first gap and the second gap are hermetically sealed.
In an analogous art, Beaulieu teaches forming a housing (90) attached a package substrate (80) to hermetically seal a chip (10), fig. 4, col 7, ln 30–43.
One of ordinary skill in the art modifying Devnani with Beaulieu to form a housing surrounding Devnani’s electronic package would hermetically seal the first gap and the second gap, as recited in the claim.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Devnani with the teachings of Kang because “…a hermetic seal from the ambient to prevent adverse environmental effects on the semiconductor chip 10 such as oxidation or moisture ingress.” See Kang at col 7, ln 30–43.
Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Devnani in view of Seri, as applied to claim 13 above, and further in view of Cheng et al., US Publication No. 2022/0020655.
Regarding claim 21:
Devnani and Seri teach all the limitations of claim13 above, but do not expressly teach:
further comprising: organic buildup layers above and below the glass core.
In an analogous art, Cheng teaches an electronic package may comprise a glass core substrate (CDL) with organic build up layers (e.g. polyimide or Ajinomoto Buildup Film (ABF) or a “combination thereof”), para. [0012].
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of Devnani with the teachings of Cheng to form organic build up layers above and below the glass core because it is within the general skill of a worker in the art to select known material on the basis of its suitability for the intended purpose as a matter of obvious design choice. In re Leshin, 125 USPQ 416. See MPEP § 2144.07, Art Recognized Suitability for an Intended Purpose.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
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/Michele Fan/
Primary Examiner, Art Unit 2818
1 July 2026
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