Prosecution Insights
Last updated: April 19, 2026
Application No. 17/889,648

MEMORY DEVICE DEFECT MANAGEMENT

Non-Final OA §112
Filed
Aug 17, 2022
Examiner
FARROKH, HASHEM
Art Unit
2138
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology, Inc.
OA Round
7 (Non-Final)
89%
Grant Probability
Favorable
7-8
OA Rounds
2y 5m
To Grant
91%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
813 granted / 912 resolved
+34.1% vs TC avg
Minimal +2% lift
Without
With
+2.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
13 currently pending
Career history
925
Total Applications
across all art units

Statute-Specific Performance

§101
6.4%
-33.6% vs TC avg
§103
42.3%
+2.3% vs TC avg
§102
17.1%
-22.9% vs TC avg
§112
19.1%
-20.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 912 resolved cases

Office Action

§112
DETAIL ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 2. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 01/20/2026 has been entered. 3. This office action is in response to the communication(s) filed 01/20/2026 There are a total of 20 claims pending in the application. Claims 32, 39, and 45 have been amended; claims 1-28, 31, 33-35, 38, and 40-41 have been canceled; and claims 46-55 has been added. INFORMATION CONCERNING IDS: 4. The information disclosure statement (IDS) submitted on 01/20/2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the Examiner. IFORMATION CONCENING DRAWING: 5. Application’s drawing submitted 08/17/2022 are acceptable for examination purposes. Response to Remarks Applicant’s arguments have been fully considered but they are not persuasive. Applicant has amended independent claim 45 to recite limitations: “wherein the defect management information comprises a status of a media access operation performed with respect to the memory block” “determining, based on the start program voltage associated with the media access operation performed with respect to the memory block, a defect status of the memory block” (emphasis added). The Remarks fails to indicate what portion(s) of the specification describe or support the above limitations. It appears that the only portion of claimed specification describing “start program voltage” is paragraph [0020] of the instant specification, which for convenience reproduces as shown below: “[0020] The supplemental defect management information can include information that can be analyzed to determine a risk of a defect of the memory array. The supplemental defect management information can include information pertaining to a media access operation performed with respect to the memory array. For example, the supplemental defect management information can include information related to a program operation, an erase operation, or a read operation that is performed with respect to the memory array. Examples of information related to a program operation can include dynamic (WL) start program voltage (DSV), number of programming pulses of each threshold voltage level, a check or count fail byte (CFBYTE) of each program verify level, a number of programming loops, information related to detecting a short or leakage during the program operation (e.g., a charge pump clock monitor (CPCM) count of each programming pulse, a WL short sensor reading of each program verify level), etc. Examples of information related to an erase operation can include a number of erase pulses, a CFBYTE of each erase verify level, information related to detecting a short or leakage with respect to a WL or source line during the erase operation (e.g., a CPCM count of each erase pulse, a WL short sensor reading of each erase verify level), etc. Examples of information related to a read operation can include information related to detecting a short or leakage with respect to a WL, WL ramp up time, etc. A CFBYTE threshold is generally decided based on the error correction code (ECC) capability of the memory device, and a CFBYTE number can be determined during each program/erase verify level. If the CFBYTE number for memory cells during a particular program/erase level is below the CFBYTE threshold, these memory cells can be further inhibited from further program/erase in all subsequent program/erase pulses, and the local memory controller can further cease issuing program/erase verify pulses for that particular program/erase verify level in all subsequent program/erase loops.” (Emphasis added). There is nothing in the claimed specification that teaches or suggests, based on start program voltage associated with the media access operation performed with respect to the memory block, a defect status of the memory block is determined. As described by paragraph 20 of applicant’s own specification, and also as well known in the art, when using program pulses to program a non-volatile, it takes s series of program pulses to program the memory and a series of pulses to verify the memory. Contrary to the applicant arguments, the prior art of record teaches using program pulses to program and verify pulses to verify. For example Lee teaches program pulses comprising start voltage (e.g., see Fig.7 of Lee). Furthermore, claim has been amended to recite “…a status of a media access operation performed with respect to the memory block…”. There is nothing in the specification describing “status a media access operation performed with respect to the memory block”. The independent claims 32 and 39 recite similar limitations. The independent claims 32, 39, and 45 are rejected under 35 USC § 112(a), first paragraph, as failing to comply with written description requirements. The pending dependent claims rejected at least base on their dependency from their respected base claims. IFORMATION CONCENING CLAIMS: The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. 6. Claims 29-30, 32, 36-37, 29, and 42- 55 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. 7. The independent claim 45 has been amended to recite, in part, the limitations: “wherein the defect management information comprises a status of a media access operation performed with respect to the memory block” “determining, based on the start program voltage associated with the media access operation performed with respect to the memory block, a defect status of the memory block” (emphasis added). The claimed specification does not appear to describe/support the above limitations as claimed. The independent claims 32 and 39 amended to recite similar limitations and are rejected based on the same ground of rejection. The dependent claims 29-30, 36-37, 42-44, and 47-55 are rejected by virtue of their dependency from their respected base claim. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 8. Claims 29-30, 32, 36-37, 29, and 42- 55 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 9. The independent claim 32 recites the limitation "the status information" in line 8. There is insufficient antecedent basis for this limitation in the claim. The independent claims 39 and 45 recite similar limitation and are rejected based on the same ground of rejection. The dependent claims 29-30, 36-37, 42-44, and 47-55 are rejected at least by virtue of their dependency from their respected independent base claims. Conclusion 10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HASHEM FARROKH whose telephone number is (571)272-4193. The examiner can normally be reached Monday through Friday from 8:30 am - 5:00 pm. 11. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Mr. Tim Vo can be reached on (571)272-3642. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. 12. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. 23. 13. For more information about the PAIR system, see htto://pair-direct.uspto.gov. For questions regarding access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786- 9199 (IN USA OR CANADA) or 571-272-1000. /HASHEM FARROKH/Primary Examiner, Art Unit 2138
Read full office action

Prosecution Timeline

Aug 17, 2022
Application Filed
Dec 29, 2023
Non-Final Rejection — §112
Feb 05, 2024
Interview Requested
Feb 16, 2024
Applicant Interview (Telephonic)
Feb 16, 2024
Examiner Interview Summary
Feb 21, 2024
Response Filed
May 30, 2024
Final Rejection — §112
Jun 05, 2024
Interview Requested
Jun 13, 2024
Examiner Interview Summary
Jun 13, 2024
Applicant Interview (Telephonic)
Jun 14, 2024
Response after Non-Final Action
Jul 01, 2024
Response after Non-Final Action
Jul 08, 2024
Request for Continued Examination
Jul 10, 2024
Response after Non-Final Action
Jul 27, 2024
Non-Final Rejection — §112
Aug 05, 2024
Examiner Interview Summary
Aug 05, 2024
Applicant Interview (Telephonic)
Aug 06, 2024
Response Filed
Nov 12, 2024
Final Rejection — §112
Nov 18, 2024
Interview Requested
Nov 25, 2024
Examiner Interview Summary
Nov 25, 2024
Applicant Interview (Telephonic)
Dec 10, 2024
Response after Non-Final Action
Dec 30, 2024
Examiner Interview (Telephonic)
Jan 08, 2025
Response after Non-Final Action
Mar 17, 2025
Request for Continued Examination
Mar 24, 2025
Response after Non-Final Action
Apr 19, 2025
Non-Final Rejection — §112
Jul 24, 2025
Response Filed
Sep 17, 2025
Final Rejection — §112
Nov 03, 2025
Response after Non-Final Action
Jan 20, 2026
Request for Continued Examination
Jan 27, 2026
Response after Non-Final Action
Feb 07, 2026
Non-Final Rejection — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

7-8
Expected OA Rounds
89%
Grant Probability
91%
With Interview (+2.0%)
2y 5m
Median Time to Grant
High
PTA Risk
Based on 912 resolved cases by this examiner. Grant probability derived from career allow rate.

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