Prosecution Insights
Last updated: May 29, 2026
Application No. 17/891,113

METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE AND STRUCTURE THEREOF

Non-Final OA §112
Filed
Aug 18, 2022
Priority
Jun 15, 2022 — CN 202210682040.3
Examiner
CULBERT, CHRISTOPHER A
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Changxin Memory Technologies Inc.
OA Round
2 (Non-Final)
42%
Grant Probability
Moderate
2-3
OA Rounds
0m
Est. Remaining
46%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allowance Rate
139 granted / 335 resolved
-26.5% vs TC avg
Minimal +5% lift
Without
With
+4.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
26 currently pending
Career history
415
Total Applications
across all art units

Statute-Specific Performance

§103
82.3%
+42.3% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 335 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 2, 6, and 9-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, it is unclear to one having ordinary skill in the art what the phrase “between adjacent two of the semiconductor channel pillars” is referencing in lines 11 and 13. That is, is it the spacer, the top surface of the spacer, or various parts of the protective layer which are required to be between adjacent two of the semiconductor channel pillars? Claims 2, 6, and 9-14 depend from claim 1 and are, therefore, also rejected. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A CULBERT whose telephone number is (571)272-4893. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTOPHER A CULBERT/Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Aug 18, 2022
Application Filed
Sep 05, 2025
Non-Final Rejection mailed — §112
Oct 30, 2025
Response Filed
Feb 25, 2026
Non-Final Rejection mailed — §112
May 07, 2026
Response after Non-Final Action
May 07, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12557465
PHOTOELECTRIC DEVICE
3y 6m to grant Granted Feb 17, 2026
Patent 12532521
METHOD FOR MANUFACTURING SELF-ALIGNED EXCHANGE GATES AND ASSOCIATED SEMICONDUCTING DEVICE
4y 0m to grant Granted Jan 20, 2026
Patent 12520723
ORGANIC LIGHT EMITTING DIODE AND ORGANIC LIGHT EMITTING DEVICE INCLUDING THE SAME
5y 3m to grant Granted Jan 06, 2026
Patent 12512315
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
3y 7m to grant Granted Dec 30, 2025
Patent 12501743
MICRO-LED STRUCTURE AND MICRO-LED CHIP INCLUDING SAME
3y 11m to grant Granted Dec 16, 2025
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
42%
Grant Probability
46%
With Interview (+4.9%)
3y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 335 resolved cases by this examiner. Grant probability derived from career allowance rate.

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