Prosecution Insights
Last updated: April 20, 2026
Application No. 17/891,530

LASER ASSISTED ETCHING OF DIELECTRICS IN IC DEVICES

Non-Final OA §103
Filed
Aug 19, 2022
Examiner
PROSTOR, ANDREW VICTOR
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
96%
Grant Probability
Favorable
1-2
OA Rounds
3y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 96% — above average
96%
Career Allow Rate
24 granted / 25 resolved
+28.0% vs TC avg
Minimal +5% lift
Without
With
+4.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
27 currently pending
Career history
52
Total Applications
across all art units

Statute-Specific Performance

§103
48.0%
+8.0% vs TC avg
§102
27.0%
-13.0% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 25 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restriction Applicant’s election of Group I, claims 1-9 in the reply filed on 12/15/2025 is acknowledged. Claims 10-22 are cancelled. Status of Claims Claims 1-9 are pending. Claims 10-22 are cancelled. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1, 2, 4 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over US 2013/0221493 A1 Kim et al (herein “Kim”) in view of Laser-assisted etching of borosilicate glass in potassium hydroxide Bischof et al (herein “Bischof”). Regarding Claim 1, Kim discloses: See Figs. 3-6. A method, comprising: forming an integrated circuit (IC) device (see device in Fig. 7) by depositing an inorganic dielectric material (see Figs. 4 and 5, deposition of underfill material #310 and molding member #320, which are grouped into element number #330, see paragraph [0058]: “…The underfill 310 may be formed of an insulating material, for example, an underfill resin such as an epoxy resin, and may include silica filler or flux. The underfill 310 may be formed of a material different from or the same material used to form a molding member 320 (refer to FIG. 5) in a subsequent process.”) over, or adjacent to (see portion), an IC die (#200); and removing a portion of the inorganic dielectric material (see Fig. 6) selectively to the inorganic dielectric material (see Fig. 6, #330). Kim does not explicitly disclose: modifying a portion of the inorganic dielectric material through laser exposure; and removing a modified portion of the inorganic dielectric material selectively to an unmodified portion of the inorganic dielectric material. However, in analogous art, Bischof teaches: See generally sections 1-4. Liu teaches a method femtosecond laser modification wherein borosilicate glass is modified with pulsed laser light and subsequently chemically wet etched. Sections 2.1 and 2.2 describe a cursory review of this process, specifically “2.1: The glass modification is induced by focusing a femtosecond laser into the substrate and moving the focus inside the material along predefined paths. The modification process inside the glass depends on various laser parameters like pulse repetition rate, pulse duration and pulse energy...” and “2.2: After the laser treatment the glass substrate is wet-chemically etched with potassium hydroxide (KOH).” Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to consider combining the teachings of Bischof to the method disclosed by Kim and utilize a laser modification and wet etching process to form the IC device. Doing so would be an obvious modification of substituting for the planarization step shown in Kim Fig. 6, as doing so would provide the benefit of lowering the potential for thermal and physical damage to the device during manufacturing, as well as increasing the accuracy of the modified region that will subsequently be etched away due to the range of adjustable parameters available for the laser beam as disclosed in section Bischof section 2.1. In addition, depending on the laser conditions during setup, as can be seen in section 3.3 and Fig. 9, various 3-dimensional shapes (cones, stair-steps, other topographical details) can be achieved after wet etching which are a result of the laser conditions. This would be another added benefit of utilizing the laser modification and wet etching process, as the method disclosed by Kim is limited to a mechanical process, specifically grinding, see paragraph [0061]. See also Table 2 on page 1194 detailing resulting shaped etched areas, as well as a brief discussion of the rms surface roughness (topography) of the etched areas “In addition to the 3D shapes, test areas of about 2.5 x 4 mm2 were implemented to measure the flatness and roughness of the etched surfaces. The measurements show a rms-roughness in borosilicate glass of 1.2 μm, if a 0.8 μm gaussian filter is applied. This value is comparable to the results obtained in Fused Silica of 0.9 μm.” Regarding Claim 2, Kim in view of Bischof discloses: the method of claim 1. Bischof further teaches: wherein the modifying and the removing reduces surface topography of the inorganic dielectric material (See page 1195: “The measurements show a rms-roughness in borosilicate glass of 1.2 μm, if a 0.8 μm gaussian filter is applied. This value is comparable to the results obtained in Fused Silica of 0.9 μm”). Regarding Claim 4, Kim in view of Bischof discloses: the method of claim 1. Kim further teaches: wherein the modifying comprises modifying a portion of the inorganic dielectric material (see Figs. 5 and 6, portion of #330 that covers the top surface of IC die 210) that is over the IC die (#210 ), and the removing retains an unmodified portion of the inorganic dielectric material (see Figs. 5 and 6, portion of #330 adjacent to IC die #210) that is adjacent to the IC die (#210). Regarding Claim 8, Kim in view of Bischof discloses: the method of claim 1. Kim further teaches: wherein the modifying comprises modifying a portion of the inorganic dielectric material (see Figs. 5 and 6, portion of #330 that is between adjacent IC dies #210) that is between the IC die (#210, see left IC die) and a second IC die (#210, see middle IC die) adjacent to the first IC die (#210, see left IC die), and wherein the removing reduces surface topography of the inorganic dielectric material retained between the IC die and the second IC die (under the combination of references previously disclosed, the topography of the surface exposed by etching is reduced, see rejection of claim 1 above. For clarity, see Bischof page 1195: “The measurements show a rms-roughness in borosilicate glass of 1.2 μm, if a 0.8 μm gaussian filter is applied. This value is comparable to the results obtained in Fused Silica of 0.9 μm”). Allowable Subject Matter Claims 3, 5-7, and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding Claim 3: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “further comprising: measuring the surface topography of the inorganic dielectric material prior to the modifying; and adjusting a characteristic of the laser exposure based on a measurement of the surface topography.” Regarding Claim 5: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “wherein: the modifying comprises modifying a contiguous portion of the inorganic dielectric material encircling a perimeter of the IC die, the modified portion extending vertically through a thickness of the inorganic dielectric material; and the removing exposes a substrate coupled to the IC die.” Regarding Claim 6: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “the modifying comprises modifying the first thickness of the inorganic dielectric material before depositing the second thickness of inorganic dielectric material; and the removing comprises removing a first modified portion of the second thickness and a second modified portion of the first thickness.” Regarding Claim 7: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “wherein the modifying and the removing forms a via opening or trench within the inorganic dielectric material, and the method further comprises: depositing conductive material into the via opening or trench; and planarizing a surface of the conductive material with a surface of the unmodified portion of the inorganic dielectric material.” Regarding Claim 9: The following is a statement of reasons for the indication of allowable subject matter: The prior art of record as considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations. The prior art fails to teach or suggest the claimed limitations, namely: “wherein the forming comprises forming a portion of the inorganic dielectric material over an interface layer, and further comprising: modifying a portion of the interface layer through laser exposure; and removing the portion of the inorganic dielectric material over the modified portion of the interface layer.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andrew V. Prostor whose telephone number is (571) 272-2686. The examiner can normally be reached M-F 8:00a-4:30p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at (866) 217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call (800) 786-9199 (IN USA OR CANADA) or (571) 272-1000. /ANDREW VICTOR PROSTOR/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 19, 2022
Application Filed
Mar 16, 2023
Response after Non-Final Action
Dec 31, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
96%
Grant Probability
99%
With Interview (+4.8%)
3y 2m
Median Time to Grant
Low
PTA Risk
Based on 25 resolved cases by this examiner. Grant probability derived from career allow rate.

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