Prosecution Insights
Last updated: April 19, 2026
Application No. 17/891,536

SPLIT METALLIZATION LAYERS IN MULTICHIP DEVICES

Non-Final OA §102§103
Filed
Aug 19, 2022
Examiner
NGUYEN, DAO H
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
1137 granted / 1246 resolved
+23.3% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
29 currently pending
Career history
1275
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
30.6%
-9.4% vs TC avg
§102
55.6%
+15.6% vs TC avg
§112
5.1%
-34.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1246 resolved cases

Office Action

§102 §103
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action is in response to the communications dated 11/24/2025. Claims 1-22 are pending in this application. Applicant made a provisional election without traverse to prosecute the invention of Group I, claims 1-17, is acknowledged. Claims 18-22 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-elected group there being no allowable generic or linking claim. Applicant has the right to file a divisional application covering the subject matter of the non-elected claims. Acknowledges 2. Receipt is acknowledged of the following items from the Applicant. Information Disclosure Statements (IDS) filed on 06/02/2023, 02/05/2024, and 11/24/2025. The references cited on the PTOL 1449 form have been considered. Applicant is requested to cite any relevant prior art if being aware on form PTO-1449 in accordance with the guidelines set for in M.P.E.P. 609. Specification 3. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 4. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 5. Claims 1, 4-5, 8-12, and 15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu et al. (US 10,381,298) Regarding claim 1, Yu discloses a multichip composite device, comprising: a plurality of intradevice metallization layers 28-48 or 100 (see figs. 24, 26, 27) spanning an area of the device; a first die 68B coupled to an uppermost one of the intradevice metallization layers 28-48/100, wherein the first die 68B is fully within the area of the device; an inorganic dielectric material 80 or 80 &180 (see figs. 26, 27B, and col. 8, lines 28-42) laterally adjacent the first die 68B and over a portion of the intradevice metallization layers 28-48/100; a second die 212/214 hybrid bonded to the first die 68B (col. 11, lines 20-45), wherein the second die 212/214 is over a portion of the first die 68B and over a portion of the inorganic dielectric material 80; and one or more first vias 162 extending through the inorganic dielectric material 80 within the area of the device, and coupling the second die 212/214 to the intradevice metallization layers 28-48/100. Regarding claim 4, Yu discloses the multichip composite device of claim 1, further comprising a structural substrate 194 or 222 over the second die 212/214, wherein the inorganic dielectric material 180 (fig. 27B) is between the structural substrate 222 and the first die 68B. See figs. 26, 27B. Regarding claim 5, Yu discloses the multichip composite device of claim 4, wherein the structural substrate 194/222 comprises a crystalline material of silicon and carbon, aluminum and oxygen, a III-V material, or predominantly silicon. See col. 12, lines 29-35, col. 11, lines 46-67. Regarding claim 8, Yu discloses the multichip composite device of claim 1, wherein the plurality of intradevice metallization layers 28-48, 100 comprises a plurality of lower interconnect interfaces 110 on a side opposite the first die 68B. See figs. 26, 27. Regarding claim 9, Yu discloses the multichip composite device of claim 1, further comprising a third die 68A coupled to the plurality of intradevice metallization layers 28-48/100, wherein the third die 68A is over the plurality of intradevice metallization layers and laterally adjacent the inorganic dielectric material 80 and/or 180. See figs. 24, 26-27. Regarding claim 10, Yu discloses the multichip composite device of claim 9, further comprising a fourth die 168B hybrid bonded to the third die 68A, wherein the fourth die 168B is over a portion of the third die 68A. See figs. 24, 26-27. Regarding claim 11, Yu discloses the multichip composite device of claim 10, wherein the second die 212/214 or the fourth die 168B is hybrid bonded to both the first die 68B and the third die 68A. See fig. 27A. Regarding claim 12, Yu discloses a multichip system, comprising: a plurality of intradevice metallization layers 58, 28-48, or 100 (see figs. 24, 26, 27) coupled to a substrate 20/23, wherein one of the plurality of intradevice metallization layers 28-48/100 is coupled to a power supply through the substrate 23 (or substrate comprising layers 20-48 having intradevice metallization layers 58 thereon; see col. 6, lines 25-58); an inorganic dielectric material 80 over the intradevice metallization layers 58/28-48/100; a first die 68B adjacent the inorganic dielectric material 80 and coupled to the plurality of intradevice metallization layers, wherein the first die 68B is within an area of the intradevice metallization layers; and a second die 212/214 hybrid bonded to the first die 68B (col. 11, lines 20-45) and coupled to the intradevice metallization layers by one or more first vias 162 extending through the inorganic dielectric material 80 within the area of the intradevice metallization layers. Regarding claim 15, Yu discloses the multichip system of claim 12, further comprising a structural substrate 222 over the second die 212/214, wherein the structural substrate 222 spans the area of the intradevice metallization layers, and the inorganic dielectric material 180 is between the structural substrate 222 and the first die 68B. See figs. 26, 27B. Claim Rejections - 35 U.S.C. § 103 6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 7. Claims 2-3, and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US 10,381,298) Regarding claim 2, Yu discloses the multichip composite device of claim 1, comprising all claimed limitations, as discussed above, except for wherein individual ones of the intradevice metallization layers have a thickness of at least 1 µm. However, it would have been obvious to one of ordinary skills in the art at the time the invention was made to modify the invention of Yu so that the individual ones of the intradevice metallization layers in Yu would have a thickness of at least 1 µm or greater in order to enhance conductivity and reliability of the device. Furthermore, it has been held that where the only difference between the prior art and the claims was a recitation of relative dimensions/thickness of the claimed element, and a device having the claimed relative dimensions/thickness would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP §2144.04). It would have been obvious that a mere change in size/thickness of a component is generally recognized as being within the level of ordinary skill in the art. It is to be expected that a change in size, thickness would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art...such ranges are termed "critical ranges and the applicant has the burden of proving such criticality. See In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). The instant specification contains no disclosure of either the critical nature of the claimed dimensions/thickness or of any unexpected results arising therefrom. Where patentability is aid to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. (.In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).) The claimed limitation regarding to the thickness of the individual ones of the intradevice metallization layers do/does not bear any critical point that would establish patentability, and is/are not sufficient to patentable distinguish over the prior art, therefore being considered as unpatentable limitation(s) because it would have involve only a mere change in size/thickness of a component. A change in size/shape is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP §2144.04). Regarding claim 3, Yu discloses the multichip composite device of claim 2, comprising all claimed limitations, as discussed above, except for wherein the first die comprises a plurality of intradie metallization layers, and a thickest one of the intradie metallization layers has a thickness less than that of a thinnest one of the intradevice metallization layers. However, it would have been obvious to one of ordinary skills in the art at the time the invention was made that, in the invention of Yu, the thicknesses of the intradie metallization layers of the first die should be less than (or should be modified to be less than) that/those of the intradevice metallization layers due to the smaller in size of the first die compared to that of the structure forming the intradevice metallization layers. It would have been obvious that a modification in size/thickness of an element would involve only routine skills in the art. Moreover, it has been held that where the only difference between the prior art and the claims was a recitation of relative dimensions/thickness of the claimed element, and a device having the claimed relative dimensions/thickness would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP §2144.04). It would have been obvious that a mere change in size/thickness of a component is generally recognized as being within the level of ordinary skill in the art. It is to be expected that a change in size, thickness would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art...such ranges are termed "critical ranges and the applicant has the burden of proving such criticality. See In re Aller, 220 F.2d 454, 105 USPQ 233,235 (CCPA 1955). The instant specification contains no disclosure of either the critical nature of the claimed dimensions/thickness or of any unexpected results arising therefrom. Where patentability is aid to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. (.In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).) The claimed limitations regarding to the thicknesses of the intradie metallization layers and that/those of the intradevice metallization layers do/does not bear any critical point that would establish patentability, and is/are not sufficient to patentable distinguish over the prior art, therefore being considered as unpatentable limitation(s) because it would have involve only a mere change in size/thickness of a component. A change in size/shape is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP §2144.04). Regarding claims 13, and 14, Yu discloses the multichip system comprising all claimed limitations, as discussed in the rejections of claims 2, and 3, respectively. Allowable Subject Matter 8. Claims 6-7, and 16-17 are allowable. Claims 6-7, and 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior art of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed multichip composite device (in addition to the other limitations in the claim): Claims 6-7: wherein: the device further comprises a plurality of second intradevice metallization layers over the second die; the second die is hybrid bonded to a lowermost one of the second intradevice metallization layers; the second die is fully within an area of the second intradevice metallization layers; and the plurality of second intradevice metallization layers is coupled to the first die by one or more second vias extending through the inorganic dielectric material within the area of the device. Claims 16-17: wherein: the plurality of intradevice metallization layers is a plurality of first intradevice metallization layers; the multichip system further comprises a plurality of second intradevice metallization layers hybrid bonded to, and over, the second die; and the second die is fully within an area of the second intradevice metallization layers. Conclusion 9. A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the day of this letter. Failure to respond within the period for response will cause the application to become abandoned (see M.P.E.P 710.02(b)). A shortened time for reply may be extended up to the maximum six-month period (35 U.S.C. 133). An extension of time fee is normally required to be paid if the reply period is extended. The amount of the fee is dependent upon the length of the extension. Extensions of time are generally not available after an application has been allowed. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dao H. Nguyen whose telephone number is (571)272-1791. The examiner can normally be reached on Monday-Friday, 9:00 AM – 5:00 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Loke, can be reached on (571)272-1657. The fax numbers for all communication(s) is 571-273-8300. Any inquiry of a general nature or relating to the status of this application or proceeding should be directed to the receptionist whose telephone number is (571)272-1633. /DAO H NGUYEN/Primary Examiner, Art Unit 2818 December 26, 2025
Read full office action

Prosecution Timeline

Aug 19, 2022
Application Filed
Mar 20, 2023
Response after Non-Final Action
Dec 26, 2025
Non-Final Rejection — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+5.6%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1246 resolved cases by this examiner. Grant probability derived from career allow rate.

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