DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 12/10/2025 is acknowledged.
Claims 19-24 are cancelled pursuant to Applicant’s amendment filed on 12/10/2025. Election was made without traverse in the reply filed on 12/10/2025.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 11 and 15-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: the claimed “seam”. It is unclear if the seam is a physical part of the claimed apparatus or just a labeling of the center of a channel surrounding a semiconductor chip. Clarification is required.
The term “significantly higher” in claim 11 is a relative term which renders the claim indefinite. The term “significantly higher” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. It is unclear the exact amount of increased silicon or metal content would qualify as “significantly higher” when comparing the primary and secondary fill structures.
Claim 15 recites the limitation " with the second surface (top surface) of the primary fill structure". There is insufficient antecedent basis for this limitation in the claim because first and second surfaces are defined for the IC dies, but not the primary fill structure.
Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01. The omitted structural cooperative relationships are: the claimed “host substrate”. It is unclear how the host substrate is different from the generic substrate claimed in the following paragraph, despite both components having different reference numerals. Clarification is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 6-7, 9-10, 14 and 16-18 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen at al. (US-20240222215-A1 – hereinafter Chen).
Regarding claim 1, Chen teaches an integrated circuit (IC) device (Fig.1J P1; ¶0051), comprising:
a first IC die (Fig.1J 200; ¶0020) comprising a first surface (bottom surface) bonded to a first region of a substrate (Fig.1J PM1-3; ¶0047);
a second IC die (Fig.1J 300; ¶0020) adjacent to the first IC die (200) and comprising a first surface (bottom surface) bonded to a second region of the substrate (PM1-3);
a primary fill structure (Fig.1J 16; ¶0036) having an inorganic composition (end of ¶0036), the primary fill structure (16) occupying a majority of a space between the first (200) and second (300) IC die and adjacent to two or more sidewall edges of at least the first IC die (200), but not over a second surface (top surface), opposite the first surface (bottom surface), of either of the first (200) or second (300) IC dies; and
a secondary fill structure (Fig.1E 212 and 312; ¶0028 and ¶0039) within a first remnant of the space between the primary fill structure (16) and the two or more sidewall edges of the first IC die (200), and within a second remnant of the space between the primary fill structure (16) and the second IC die (300).
Regarding claim 2, Chen teaches the IC device of claim 1, wherein the secondary fill structure (212 and 312) comprises a seam (a vertical line down the center) approximately in the middle of each of the first and second remnants (gaps filled by 212 and 312) of the space.
Regarding claim 3, Chen teaches the IC device of claim 1, wherein the secondary fill structure (212 and 312) is in contact with a sidewall of the primary fill structure (16) and in contact with a sidewall of each of the first (200) and second (300) IC dies.
Regarding claim 6, Chen teaches the IC device of claim 1, wherein:
the primary fill structure (16) surrounds a perimeter of at least the first IC die (200; ¶0056);
the secondary fill structure (212 and 312) is within a channel (gap filled by 212 and 312) surrounding the perimeter of the first IC die (200; ¶0028); and
the secondary fill structure (212 and 312) is substantially co-planar with the first IC die (200).
Regarding claim 7, Chen teaches the IC device of claim 6, wherein:
the primary fill structure (16) surrounds a perimeter of the second IC die (300; ¶0056);
the secondary fill structure (212 and 312) is within a second channel (gap filled by 212 and 312) surrounding the perimeter of the second IC die (300; ¶0028);
the secondary fill structure (212 and 312) is substantially co-planar with the second IC die (300); and
the primary fill structure (16) is contiguous between the first and second channels (gap filled by 212 and 312).
Regarding claim 9, Chen teaches the IC device of claim 1, wherein a top surface of the primary fill structure (16) is substantially planar with the second surface (top surface) of at least one of the first IC die (200) or second IC die (300).
Regarding claim 10, Chen teaches the IC device of claim 9, wherein the top surface of the primary fill structure (16) is substantially planar with a top surface of the secondary fill structure (212 and 312).
Regarding claim 14, Chen teaches the IC device of claim 1, wherein the first (200) and second (300) IC dies are directly bonded to the substrate (PM1-3), and wherein the primary fill structure (16) is directly bonded to the substrate (PM1-3).
Regarding claim 16, Chen teaches a system (Fig.9D; ¶0069) comprising:
a host component (Fig.9D 900; ¶0078); and
a composite integrated circuit (IC) device (Fig.9D P5; ¶0078) attached to the host component (900), the composite IC device (P5) comprising:
a host substrate (Fig.1J PM4; ¶0047);
a first IC die (Fig.1J 200; ¶0020) comprising a first surface (bottom surface) bonded to a first region of a substrate (Fig.1J PM1-3; ¶0047);
a second IC die (Fig.1J 300; ¶0020) adjacent to the first IC die (200) and comprising a first surface (bottom surface) bonded to a second region of the substrate (PM1-3);
a primary fill structure (Fig.1J 16; ¶0036) having an inorganic composition (end of ¶0036), the primary fill structure (16) adjacent to two or more sidewall edges of at least the first IC die (200) and over a third region (area between 200 and 300) of the substrate (PM1-3) comprising a majority of a space between the first (200) and second (300) IC dies, wherein the primary fill structure (16) is absent from over a second surface (top surface), opposite the first surface (bottom surface), of either of the first (200) or second (300) IC dies; and
a secondary fill structure (Fig.1J 212 and 312; ¶0028 and ¶0039) within a first remnant (gap filled by 212) of the space between the primary fill structure (16) and the two or more sidewall edges of the first IC die (200), and within a second remnant (gap filled by 312) of the space between the primary fill structure (16) and the second IC die (300).
Regarding claim 17, Chen teaches the system of claim 16, further comprising a power supply (a coupled power supply is inherent to all semiconductor devices) coupled to provide power to the composite IC die package (P5) through the host component (900).
Regarding claim 18, Chen teaches the system of claim 16, wherein:
the first IC die (200) is a first of a microprocessor core circuitry, wireless radio circuitry, floating point gate array (FPGA) circuitry, power management circuitry, active repeater circuitry, clock generator circuitry, memory circuitry, or input/output buffer circuitry (¶0026); and
the second IC die (300) is a second of a microprocessor core circuitry, wireless radio circuitry, floating point gate array (FPGA) circuitry, power management circuitry, active repeater circuitry, clock generator circuitry, memory circuitry, or input/output buffer circuitry (¶0030).
Claim(s) 1 and 11-13 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Wang at al. (US-20250349642-A1 – hereinafter Wang).
Regarding claim 1, Wang teaches an integrated circuit (IC) device (Fig.26 100; ¶0029), comprising:
a first IC die (Fig.26 50A left; ¶0029) comprising a first surface (bottom surface) bonded to a first region (left side) of a substrate (Fig.26 120; ¶0057);
a second IC die (Fig.26 50A right; ¶0029) adjacent to the first IC die (50A left) and comprising a first surface (bottom surface) bonded to a second region (right side) of the substrate (120);
a primary fill structure (Fig.26 104 and 108; ¶0057) having an inorganic composition (¶0034), the primary fill structure (104 and 108) occupying a majority of a space between the first (50A left) and second (50A right) IC die and adjacent to two or more sidewall edges of at least the first IC die (50A left), but not over a second surface (top surface), opposite the first surface (bottom surface), of either of the first (50A left) or second (50A right) IC dies; and
a secondary fill structure (Fig.26 134; ¶0084) within a first remnant of the space (Fig.24 132; ¶0084) between the primary fill structure (104 and 108) and the two or more sidewall edges of the first IC die (50A left), and within a second remnant of the space (132) between the primary fill structure (104 and 108) and the second IC die (50A right).
Regarding claim 11, Wang teaches the IC device of claim 1, wherein the primary fill structure (104 and 108) has a significantly higher silicon or metal content (primary fill structure can be silicon oxide ¶0034, secondary fill structure can be an organic resin ¶0084) than the secondary fill structure (134).
Regarding claim 12, Wang teaches the IC device of claim 11, wherein the primary fill structure (104 and 108) comprises predominantly silicon (¶0034), predominantly silicon and carbon, or predominantly a metal.
Regarding claim 13, Wang teaches the IC device of claim 11, wherein the secondary fill structure (134) comprises a greater amount of one or more of a metal, nitrogen (134 could be a polyimide, which comprises more nitrogen than silicon oxide), or oxygen than the primary fill structure (104 and 108).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen.
Regarding claim 4, Chen teaches the IC device of claim 1, wherein:
the primary fill structure (16) has a thickness (height) substantially equal to that of the first IC die (200).
Chen does not teach wherein the majority of the space occupied by the primary fill structure is at least 500 μm wide; and
at least one of first or second remnants of the space adjacent to the primary fill structure is less than 40 μm wide.
However, it would have been obvious to form the primary fill structure and the first or second remnants within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Yu et al. (US-20200185330-A1 – hereinafter Yu).
Regarding claim 15, Chen teaches the IC device of claim 1.
Chen does not teach the IC device further comprising one or more through vias embedded within the primary fill structure and directly bonded to interconnect features of the substrate, and wherein a top surface of the through vias are substantially co-planar with the second surface of the primary fill structure.
Yu teaches through vias (Fig.17 141; ¶0054 of Yu) that are embedded in a primary fill structure (Fig.17 143; ¶0056 of Yu) and directly bonded to an interconnect structure (Fig.17 148; ¶0058), wherein the vias (141 of Yu) are planar with the top of the primary fill structure (143 of Yu).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the vias of Yu (Fig.17 of Yu) to the device taught by Chen (Fig.1J of Chen) to arrive at the claimed invention. A practitioner of ordinary skill would have been motivated to make this modification for the benefit of connecting a substrate (like that of PM1-3 of Chen) directly to a higher chip (Fig.17 279; ¶0063 of Yu) above a first layer of chips (like that of 200 and 300 of Chen). This is depicted in Fig.17 of Yu where vias 141 couple interconnect 148 directly to chip 279 through primary fill structure 143, with the vias bypassing a lower chip (Fig.17 100; ¶0021 of Yu).
Allowable Subject Matter
Claims 5 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 5, the most relevant prior art references US-20240222215-A1 to Chen et al. and US-20250349642-A1 to Wang et al. teach most of the limitations of claim 5, but not the limitations of “wherein a width of the first and second remnants of the space are unequal by at least 50% of the smaller of the first or second remnants” as recited. Therefore, claim 5 is deemed patentable over the prior art.
Regarding claim 8, the most relevant prior art references US-20240222215-A1 to Chen et al. and US-20250349642-A1 to Wang et al. teach most of the limitations of claim 8, but not the limitations of “wherein the channel has a different width between the two or more sidewall edges of the first IC die and two or more corresponding sidewall edges of the primary fill structure that face the sidewall edges of the first IC die” as recited. Therefore, claim 8 is deemed patentable over the prior art.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. (US-11195817-B2 and US-10510650-B2).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THADDEUS J KOLB whose telephone number is (571)272-0276. The examiner can normally be reached Monday - Friday, 8:30am - 5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/T.J.K./ Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817