Prosecution Insights
Last updated: April 19, 2026
Application No. 17/891,735

THERMALLY ENHANCED STRUCTURAL MEMBER AND/OR BOND LAYER FOR MULTICHIP COMPOSITE DEVICES

Non-Final OA §103
Filed
Aug 19, 2022
Examiner
SEVEN, EVREN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
82%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
532 granted / 723 resolved
+5.6% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
29 currently pending
Career history
752
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
51.9%
+11.9% vs TC avg
§102
23.1%
-16.9% vs TC avg
§112
20.3%
-19.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 723 resolved cases

Office Action

§103
Detailed Action The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions In the response dated 11/18/2025, Applicants elected Species A, directed at the embodiments of Figs. 1A-1D. Claims 7 and 14 further limit Claims 1 and 9 to include a second layer, which appears in later embodiments, and is therefore withdrawn. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. 20200211920 to Lee et al. (Lee) in view of U.S. Pat. Pub. No. 20140293543 to Kim et al. (Kim) and further in view of U.S. Pat. Pub. No. 20020074649 to Chrysler et al. (Chrysler). Regarding Claims 1-5, Lee teaches in fig. 13 at least, a microelectronic device, comprising: a multichip composite device comprising one or more chiplets 230 connected to a surface of a base die 220, and an inorganic dielectric material 240 laterally adjacent the one or more chiplets and over at least a portion of the base die; a structural member 20 over the multichip composite device; and a layer AF2 on the structural member, and between the structural member and the multichip composite device, and on the inorganic dielectric material (relevant to Claim 3), the layer having a thickness less than a thickness of the structural member (see Fig. 13), but does not explicitly teach that the layer comprising a material having a thermal conductivity greater than a thermal conductivity of the structural member. However, in analogous art, Kim teaches a structural member 101 formed of crystalline silicon (relevant to Claim 4). It would have been obvious to the person of ordinary skill in the art before the time of filing to modify the metal structural member of Kim because a silicon based structural member does not corrode or become tarnished in atmosphere due to elements of the environment. In contrast, metal-based heat sinks and radiators tend to foul and/or corrode over time, as taught by Kim [0054]. Furthermore, Chrysler teaches a layer of diamond (relevant to claim 2; diamond is by definition crystalline, relevant to claim 5) between a chiplet 40 and a structural member 80. It would have been obvious to the person of ordinary skill in the art before the time of filing to include the teaching of Chrysler for the excellent thermal conductivity of diamond, as taught by Chrysler throughout. In the combination of Lee, Kim and Chrysler, the layer has a higher thermal conductivity than the structural member (diamond vs. crystalline silicon). Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lee, Kim and Chrysler as applied to claim 1 above, and further in view of U.S. Pat. Pub. No. 20180158749 to Yu et al. (Yu). Regarding Claim 6, Lee, Kim and Chrysler teach the microelectronic device of claim 1, but do not explicitly teach that the thickness of the layer is not more than 5 microns, the thickness of the structural member is not less than 50 microns, and at least one of the chiplets is hybrid bonded to the base die. However, Chrysler teaches that the layer can be formed of a thickness that is suitable for the thermal requirements of the IC package. Also, the thickness of the structural member directly affects its thermal conductivity, and both are result effective variables that may be optimized by the person of ordinary skill (MPEP 2144.05(II)(B)). Furthermore, in analogous art, Yu teaches hybrid bonding for chip on chip structures. It would have been obvious to the person of ordinary skill in the art before the time of filing to include the teaching of Yu because chip on chip hybrid bonding provides high thermal conduction without an intermediate connection material, as taught by Yu [0165]. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee. Regarding Claim 9, Lee teaches a microelectronic device, comprising: a multichip composite device 3000 comprising one or more chiplets 230 connected to a surface of a base die 220, and an inorganic dielectric material 240 laterally adjacent the one or more chiplets and over at least a portion of the base die; and a structural member 10/20/250 on the inorganic dielectric material and over the one or more chiplets, wherein the structural member has a thickness of not less than 25 microns (combined 10/20 has a thickness between 10-10000u, see MPEP 2144.05(I)), and comprises a material or a composite of materials, the material or at least one of the composite materials having a thermal conductivity of not less than 250 W/mK (20 may be copper [0021], 400W/mK). Regarding Claim 10, Lee teaches the microelectronic device of claim 9, wherein the structural member comprises one of diamond, copper, boron and nitrogen, boron and arsenic, silicon and carbon, or aluminum and nitrogen. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVREN SEVEN whose telephone number is (571)270-5666. The examiner can normally be reached Mon-Fri 8:00- 5:00 Pacific. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVREN SEVEN/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Aug 19, 2022
Application Filed
Mar 16, 2023
Response after Non-Final Action
Dec 03, 2025
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604709
PROBE CARD CONFIGURED TO CONNECT TO A PROBE PAD LOCATED IN SAW STREET OF A SEMICONDUCTOR WAFER
2y 5m to grant Granted Apr 14, 2026
Patent 12598748
THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12598701
SEMICONDUCTOR DEVICE WITH SELECTION STRUCTURE AND METHOD FOR FABRICATING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12586736
MEMS SWITCH
2y 5m to grant Granted Mar 24, 2026
Patent 12588324
PACKAGE STRUCTURE AND FORMING METHOD THEREOF
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
82%
With Interview (+8.3%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 723 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month