DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The following office action is in response to the amendment and remarks filed on 4/16/26.
Applicant’s amendment to claims 1, 9 and 11 is acknowledged.
Claims 1-20 are pending and claims 4 and 17-20 are withdrawn.
Claims 1-3 and 5-16 are subject to examination at this time.
Response to Arguments
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Regarding claim 1:
The following clarifying remarks are provided in response to Applicant’s arguments regarding the Ewert reference. Applicant's arguments have been fully considered but they are not persuasive. An object having “sidewalls extending continuously in a vertical direction” does not equate to perpendicular sidewalls. For example, a screw has sidewalls that extend continuously in a vertical direction but the spirals result in sidewalls that are concave/convex rather than perpendicular.
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, 8-13 and 15 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by We et al., US Publication No. 2023/0163112 A1.
We anticipates:
1. A semiconductor device assembly comprising (see figs. 4-5 annotated below, also see fig. 1 and element labels in fig. 12):
a semiconductor die (e.g. 104 in fig. 1);
a substrate (400, 500) coupled to the semiconductor die, the substrate including:
a primary conductive layer (412(1), 542) including a first surface of the substrate;
a first solder mask layer (416(1), 516(2)) coupled to the first surface;
a secondary conductive layer (432(2), 512(2)) including a second surface of the substrate;
a second solder mask layer (416(2), 516(1)) coupled to the second surface; and
an inner conductive layer (432(1), 512(1)) positioned between the primary conductive layer and the secondary conductive layer,
wherein the inner conductive layer includes a bond pad (432(1), 512(1)) positioned at an end of an opening (1206, e.g. see fig. 12B) that extends from the second solder mask layer (416(2), 516(1)) through the secondary conductive layer (432(2), 512(2)) to the bond pad (432(1), 512(1)) of the inner conductive layer, wherein the opening (1206) includes sidewalls extending from the bond pad to an outer surface of the second solder mask layer (416(2), 516(1)), and wherein the sidewalls of the opening (416(2), 516(1)) are insulated ( 410/430, 510/540) from a conductive material in the secondary conductive layer (432(2), 512(2)); and
a solder ball (e.g. 136 in fig. 1) attached to the bond pad. See We at para. [0001] – [0079], figs. 1-15.
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2. The semiconductor device assembly of claim 1, wherein the substrate further includes:
a first insulating layer (410, 540) between the primary conductive layer and the inner conductive layer; and
a second insulating layer (430, 510) between the secondary conductive layer and the inner conductive layer, figs. 4-5.
3. The semiconductor device assembly of claim 1, wherein the semiconductor die (104) is coupled to the substrate by the solder ball (136), fig. 1.
8. The semiconductor device assembly of claim 1, wherein the opening (1206) is one of an array of a plurality of openings, and wherein the solder ball (136) is one of a plurality of solder balls that comprise a ball grid array (BGA), para. [0029], fig. 1.
Regarding claim 9:
We teaches the limitations as applied to claim 1 above.
We further teaches the added limitation:
wherein the opening (1206) includes sidewalls extending continuously in a vertical direction between the bond pad (432(1), 512(1)) and an outer surface of the second solder mask layer (416(2), 516(1)), figs. 4-5.
10. The semiconductor package substrate of claim 9, wherein the primary layer (412(1), 542), the secondary layer (432(2), 512(2)), and the inner layer (432(1), 512(1)) each include respective conductive structures, and wherein the conductive structures are vertically separated from each other by an insulator (410/430, 510/540).
11. The semiconductor package substrate of claim 9, wherein the bond pad is a first bond pad (432(1), 512(1)), the semiconductor package substrate further comprising: a second bond pad (e.g. an adjacent 432(1), 512(1) among the plurality) positioned on the secondary layer.
12. The semiconductor package substrate of claim 9, wherein the inner layer (432(1), 512(1)) is a first inner layer, the semiconductor package substrate further comprising: a second inner (e.g. an adjacent 432(1), 512(1) among the plurality) layer positioned between the primary layer (412(1), 542) and the first inner layer, figs. 4-5.
13. The semiconductor package substrate of claim 12, wherein the second inner layer (e.g. an adjacent 432(1), 512(1) among the plurality) includes a second bond pad that is configured to receive a second external connection (e.g. 136 in fig. 1) through a second opening (e.g. adjacent 1206) that extends from the second solder mask layer (416(2), 516(1)) through the secondary layer (432(2), 512(2)) and the first inner layer (412(1), 542) to the second bond pad, figs. 4-5.
15. The semiconductor package substrate of claim 9, wherein the secondary layer (432(2), 512(2)) includes a conductive portion that is exposed in one of the sidewalls of the opening (1205), figs. 4-5 and 12.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over We, as applied to claims 1 and 9 above, in view of Elsherbini et al., US Publication No. 2019/0044047 A1.
Regarding claim 6:
We teaches all the limitations of claim 1 above, and further teaches:
wherein the sidewalls of the opening comprise an insulating/dielectric material at para. [0032] – [0033].
We does not expressly teach prepreg material.
In an analogous art, Elsherbini teaches a package substrate can made “using reinforced dielectric materials as the insulating material 322 (e.g., dielectric materials with silicon dioxide fillers), or utilizing stiffer materials as the insulating material 322 (e.g., a prepreg material including glass cloth fibers).” See Elsherbini at para. [0070], fig. 3.
Regarding claim 7:
In We’s figs. 4-5, the secondary conductive layer (432(2), 512(2)) includes the insulating/dielectric material (410/430, 510/540) between the conductive material (432(2), 512(2)) and the opening (1206).
We does not expressly teach prepreg material.
Elsherbini teaches prepreg material as applied to claim 6 above.
Regarding claim 14:
Elsherbini teaches the limitations as applied to claim 6 above.
It would have been obvious to a person of ordinary skill in the art before the effective filling date of the claimed invention to modify the teachings of We with the teachings of Elsherbini because “…thermal expansion and contraction in the package substrate 314 may be managed by maintaining an approximately uniform density of the conductive material… using reinforced dielectric materials as the insulating material 322 (e.g., dielectric materials with silicon dioxide fillers), or utilizing stiffer materials as the insulating material 322 (e.g., a prepreg material including glass cloth fibers).” See Elsherbini at para. [0070].
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over We, as applied to claim 9 above.
Regarding claim 16:
We teaches all the limitations of claim 16 above, but is silent wherein the opening has a width of approximately 300 µm.
It would have been obvious to one having ordinary skill in the art to form the opening to have a width of approximately 300 µm, since discovering an optimum value of a result effective variable involves only routine skill in the art. See MPEP § 2144.05, Obviousness of Ranges and Optimization of Ranges.
“Generally, differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical.” (Emphasis added.)
In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969)…Claimed elastomeric polyurethanes which fell within the broad scope of the references were held to be unpatentable thereover because, among other reasons, there was no evidence of the criticality of the claimed ranges of molecular weight or molar proportions. (Emphasis added.)
Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree "will not sustain a patent").
Conclusion
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/Michele Fan/
Primary Examiner, Art Unit 2818
28 August 2026
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