Attorney’s Docket Number: P202201146US01
Filing Date: 08/26/2022
Claimed Foreign Priority Date: none
Applicants: Lanzillo et al.
Examiner: Younes Boulghassoul
DETAILED ACTION
This Office action responds to the Election filed on 11/17/2025.
Remarks
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election with traverse of Group Invention I, directed to a semiconductor structure, and further election with traverse of Species 2 (reading of Figs. 3A-B), in the reply filed on 11/17/2025, is acknowledged. Applicant indicated that claims 1 and 3-14 read on the elected Species. The examiner disagrees.
Claim 1 recites in part “the interconnect … extending through the dielectric material and below the first conductive feature and the second conductive feature” at L. 10-14, thus claims an arrangement of features that is exclusive to Species 1 (see, e.g., Figs. 2A-B: jumper 220 below metal lines 205, 210).
Furthermore, regarding the invention restriction between Groups I and II, and the Species restriction between Species 1 and 2, no grounds for traversal have been presented by applicant. Therefore, the traversal is not found persuasive.
As set forth in the restriction requirement mailed on 09/25/2025, alternative methods, different from the one in claims 15-19, may be used to make the devices in claims 1-14. The applicants have not provided any argument refuting the fact that a process materially different from that in claims 15-19 may be used to produce the claimed devices. As such, examining both groups of claims would most likely require different searching fields, as evinced by their separate classification, thereby creating a burden on the examiner.
In the same restriction requirement, the examiner additionally set forth that the application contained several species including mutually exclusive characteristics. Figs. 2A-B, for example, illustrates an interconnect VO formed below first and second conductive features M1 (e.g., by subtractive process). This arrangement of features, however are not present and/or illustrated in Figs. 3A-B. Figs. 3A-B, on the other hand, differently illustrates an interconnect V1 formed above first and second conductive features M1 (e.g., by damascene process). This arrangement of features, however, is not present and/or illustrated in Figs. 2A-B. Accordingly, Figs. 2A-B and 3A-B are not obvious variants of each other and they illustrate different interconnect arrangements (and processing steps thereof), and therefore the unpatentability of one species would not necessarily imply the unpatentability of the other species.
Because of the above, and because the applicant failed to distinctly and specifically point out that the species are not patentably distinct (emphasis added), and did not present evidence or identify evidence on record showing the species to be obvious variations of one another, the requirement is still deemed proper and is, therefore, made FINAL.
Accordingly, pending in the application are claims 1-19, with claims 15-19 standing withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group Invention; and claims 1-8 standing withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim.
Drawings
The drawings are objected to because the Drawings filed on 09/06/2022 seem to have an applicant’s note accidentally attached to the filing and partially obscuring Fig. 1A.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 9-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng et al. (US2021/0305090).
Regarding Claim 9, Cheng (see, e.g., Fig. 13 and Par. [0047]-[0048]) shows all aspects of the instant invention, including a semiconductor apparatus comprising:
- a substrate (e.g., substrate 22)
- a first conductive feature (e.g., left via 42 including metal fill layer 32′) disposed on the substrate, the first conductive feature comprising a conductive material
- a second conductive feature (e.g., right via 42 including metal fill layer 32′) disposed on the substrate, the second conductive feature comprising the conductive material
- a dielectric material (e.g., dielectric layer 24C) at least partially surrounding the first conductive feature and the second conductive feature
- an interconnect (e.g., trench 44 including metal fill layer 32′) between the first conductive feature and the second conductive feature, the interconnect comprising the conductive material integral with the first conductive feature and the second conductive feature and extending above the first conductive feature and the second conductive feature.
Regarding Claim 10, Cheng (see, e.g., Fig. 13 and Par. [0047]) discloses that trenches 44 and vias 42 in the ILD layer 24C are dual damascene openings filled with electroplated Cu. Therefore, Cheng shows that the first conductive feature and the second conductive feature (e.g., left and right vias 42 including metal fill layer 32′) are damascene features comprising the conductive material.
Regarding Claim 11, Cheng (see, e.g., Fig. 13 and Par. [0047]-[0048]) shows a metal barrier (e.g., barrier layer 28′) between the interconnect and the dielectric material and between each of the first conductive feature and the second conductive feature and the dielectric material.
Regarding Claim 12, Cheng (see, e.g., Fig. 13 and Par. [0047]-[0048]) shows that the metal barrier (e.g., 28’/28) comprises Ta, TaN, or TiN (see, e.g., Par. [0033]: barrier layer 28 including TaN or TiN).
Regarding Claim 13, Cheng (see, e.g., Fig. 13 and Par. [0042], [0047]-[0048]) shows that the dielectric material (e.g., 24C/24A) is silicon dioxide (see, e.g., Par. [0031]: ILD layer 24A include silicon dioxide).
Regarding Claim 14, Cheng (see, e.g., Fig. 13 and Par. [0047]-[0048]) shows that the conductive material (e.g., 32’) is selected from the group consisting of tungsten, aluminum, silver, cobalt, copper, gold, ruthenium, and alloys thereof (see, e.g., Par. [0047]: metal fill layer 32′ in formed by a step of electroplating of Cu) .
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional reference cited disclose barrier-less interconnections with a jumper-shaped configuration, and having feature arrangements anticipating the instant invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Younes Boulghassoul at (571) 270-5514. The examiner can normally be reached on Monday-Friday 9am-6pm EST (Eastern Standard Time), or by e-mail via younes.boulghassoul@uspto.gov. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at (571) 272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YOUNES BOULGHASSOUL/Primary Examiner, Art Unit 2814