Prosecution Insights
Last updated: July 17, 2026
Application No. 17/898,107

METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS

Non-Final OA §102§103§112
Filed
Aug 29, 2022
Examiner
TRAN, TONY
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology Inc.
OA Round
4 (Non-Final)
70%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
608 granted / 863 resolved
+2.5% vs TC avg
Strong +34% interview lift
Without
With
+33.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
47 currently pending
Career history
922
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
82.9%
+42.9% vs TC avg
§102
16.1%
-23.9% vs TC avg
§112
0.5%
-39.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 863 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 1 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the best mode contemplated by the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s) has not been disclosed. Evidence of concealment of the best mode is based upon the phrase “substantially free” wherein is it free at all? Appropriate action is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1 and 5-8 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by MATSUNO (Pub. No.: US 2023/0275026). PNG media_image1.png 645 1008 media_image1.png Greyscale Re claim 1, MATSUNO, FIG. 14A/19A teaches a microelectronic device, comprising: a stack structure comprising vertically alternating conductive structures (46) and insulative structures (32) arranged in tiers, each of the tiers individually comprising one of the conductive structures and one of the insulative structures; a staircase structure (134/146/144, ¶ [0139]) having steps comprising edges of at least some of the tiers of the stack structure, the stack structure comprising sidewalls horizontally bounding the staircase structure and extending upward from the steps of the staircase structure; a first liner material (134) on the steps of the staircase structure and the sidewalls of the stack structure, the first liner material comprising horizontally extending portions on the steps of the staircase structure and vertically extending portions on the sidewalls of the stack structure; an etch stop structure ([ESL], FIG. 12C [as shown below]) on the horizontally extending portions of the first liner material (134) and extending continuously in a first horizontal direction [FHD] and having a smaller width than the steps in a second horizontal direction [SHD] orthogonal to the first horizontal direction, the vertically extending portions of the first liner material on the sidewalls of the stack structure [VE] being substantially free of the etch stop structure [ESL]; and conductive contact structures (86/86, [0163]) vertically extending through the etch stop structure (144) and the first liner material (134) and to the conductive structures (46, FIG. 19A) of the stack structure. Re claim 5, MATSUNO, FIG. 19A teaches the microelectronic device of claim 1, wherein each conductive contact structure (84/86) is substantially horizontally surrounded by the etch stop structure (144). Re claim 6, MATSUNO, FIG. 19A teaches the microelectronic device of claim 1, wherein the etch stop structure (144) comprises a strip of material spanning multiple steps of the staircase structure in the first horizontal direction. Re claim 7, MATSUNO, FIG. 12C [as shown below] teaches the microelectronic device of claim 1, wherein the etch stop structure (144) is spaced apart from the vertically extending portions of the first liner material (134) in the second horizontal direction by at least some distance [SHD]. Re claim 8, MATSUNO, FIG. 19A teaches the microelectronic device of claim 1, wherein the first liner material comprises a dielectric oxide material (134, [0085]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-4 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over MATSUNO in view of Haratipour (Pub. No.: US 2024/0373644). Re claim 2-3, MATSUNO teaches all the limitation of claim 1. MATSUNO fails to teach the limitation of claims 2-3. Haratipour teaches wherein the etch stop structure comprises a doped nitride material; and wherein the doped nitride material comprises a carbon-doped nitride material (310/314/318, FIG. 3, [0103]). It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of preventing the electron migration as taught by Haratipour, [0103]. Re claim 4, in the combination, Haratipour teaches the microelectronic device of claim 1, wherein the etch stop structure comprises a substantially undoped dielectric material, the substantially undoped dielectric material comprising a dopant-free nitride material (silicon nitride, [0103]). Re claim 9, in the combination, Haratipour teaches wherein only upper regions of the etch stop structure (outermost layer 144, FIG. 17B) is doped with a chemical species. Response to Arguments Applicant's arguments filed 12/29/2025 have been fully considered but they are not persuasive. In response to Applicant’s argument that MATSUNO fails to teach "the vertically extending portions of the first liner material on the sidewalls of the stack structure being substantially free of the etch stop structure. " Additionally, claim 1 has been amended to recite the etch stop structure is "on the horizontally extending portions of the first liner material." PNG media_image2.png 200 400 media_image2.png Greyscale The Examiner respectfully submits that Matsuno discloses a an etch stop structure ([ESL], FIG. 12C [as shown below]) on the horizontally extending portions of the first liner material (134) and extending continuously in a first horizontal direction [FHD] and having a smaller width than the steps in a second horizontal direction [SHD] orthogonal to the first horizontal direction, the vertically extending portions of the first liner material on the sidewalls of the stack structure [VE] being substantially free of the etch stop structure [ESL]. For the above reasons, it is believed that the rejections should be sustained. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONY TRAN whose telephone number is (571)270-1749. The examiner can normally be reached Monday-Friday, 8AM-5PM, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TONY TRAN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Show 3 earlier events
Oct 16, 2025
Final Rejection mailed — §102, §103, §112
Dec 29, 2025
Response after Non-Final Action
Jan 06, 2026
Request for Continued Examination
Jan 22, 2026
Response after Non-Final Action
Feb 17, 2026
Non-Final Rejection mailed — §102, §103, §112
Mar 13, 2026
Response Filed
Apr 20, 2026
Final Rejection mailed — §102, §103, §112
Jun 12, 2026
Response after Non-Final Action

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12648268
LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME
3y 6m to grant Granted Jun 02, 2026
Patent 12648373
EPITAXIAL STRONTIUM TITANATE ON SILICON
3y 3m to grant Granted Jun 02, 2026
Patent 12648459
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
2y 11m to grant Granted Jun 02, 2026
Patent 12642065
METAL NITRIDE DIFFUSION BARRIER AND METHODS OF FORMATION
2y 9m to grant Granted May 26, 2026
Patent 12604527
DISPLAY PANEL AND DISPLAY DEVICE
3y 4m to grant Granted Apr 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

4-5
Expected OA Rounds
70%
Grant Probability
99%
With Interview (+33.8%)
2y 9m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 863 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month