DETAILED ACTION
Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,429,419 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because both methods comprise substantially the same elements. For example the function performed by claim 1 of the instant application are the same and obvious as the steps of claim 1 of patent ‘419.
The differences between the claims are shown in bold below.
Instant Application 17/898,904
U.S. Patent No. 11,429,419 B2
1. A method comprising:
recording, by a host controller, information indicating an occurrence of a storage event in which a virtual machine (VM) stores data in memory allocated to the VM, the recording being responsive to the host controller receiving a notification of the occurrence of the storage event;
in response to a command from a virtual machine manager (VMM) for the VMM to read the data stored in the memory, validating, by the host controller using the information, that the command was issued by the VMM after the VMM was notified of the occurrence of the storage event; and
providing, by the host controller and in response to the command, the VMM with read access to the data based at least on the validating.
1. A method comprising:
receiving, by a host controller firmware, a notification from a virtual machine (VM) in association with data stored in a memory comprised in a computing device and allocated to the VM, the notification defining one or more values;
receiving a command from a virtual machine manager (VMM), the command indicating a memory address corresponding to the data in the memory;
reading the data from the memory address based on the receiving of the command;
validating, by the host controller firmware, the data read from the memory address based at least on determining the data read from the memory represents content that includes the one or more values defined by the notification;
providing, by the host controller firmware, the VMM with access to the data read from the memory address based on the content including the one or more values; and
sending a command completion event to the VMM indicating the data read from the memory address is validated.
The difference in the independent claim 1 of the patent includes limitation of " sending a command completion event to the VMM indicating the data read from the memory address is validated " and the other similar limitations having more details functionality which further narrows the claim of the patent. It would have been obvious to a person of ordinary skill of the art at the time of invention to read the broader limitations of the instant application from the narrower limitation of the patent as the patent anticipates the broader limitation of the instant application.
Claims 10 and 16 are independent claims and have similar limitations as claim 1. Therefore, they are rejected under the same rationale.
Claims 2-9, 11-15 and 17-20 are dependent on claims 1, 10 and 16. They are rejected under the same rationale above.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (abstract idea) without significantly more.
As per claim 1, in step 1 of the 101 analysis, the examiner has determined that the claim is directed to an apparatus. Therefore, the claim is directed to one of the four statutory categories of invention.
In step 2A prong 1 of the 101 analysis, the examiner has determined that the claim recites a judicial exception. Specifically, the limitation “in response to a command… to read data… validating, by the host controller using the information, that the command was issued by the VMM after the VMM was notified of the occurrence of the storage event…providing, by the host controller and in response to the command, the VMM with read access to the data based at least on the validating” recite mental processes. Determining whether to allow access to a requestor constitutes a mental process of observation, evaluation, and judgement because a human can receive a request for access, verify whether access is allowed by the specific requestor and determine to allow access.
In step 2A prong 2 of the 101 analysis, the examiner has determined that the additional elements, alone or in combination do not integrate the judicial exceptions into a practical application for the following rationale:
The limitations “a host controller”, “a virtual machine”, “memory”, and “virtual machine manager (VMM)”, apply judicial exceptions on a generic computer. "Alappat 's rationale that an otherwise ineligible algorithm or software could be made patent-eligible by merely adding a generic computer to the claim was superseded by the Supreme Court's Bilski and Alice Corp. decisions" so therefore applying judicial exceptions on a generic computer do not integrate the judicial exceptions into a practical application (MPEP 2106.05(b)).
The limitation “recording,…information indicating the occurrence of a storage event… stores data in memory allocated”, “receiving a notification of the occurrence of the storage event”, and “providing…in response to the command, read access to the data based on the validating” represent insignificant, extra-solution activities. The term "extra-solution activity" can be understood as "activities incidental to the primary process or product that are merely a nominal or tangential addition to the claim" (MPEP 2106.05(g)). The examiner has determined that the limitation is directed to mere data gathering activities and data transmission which are categories of insignificant extra-solution activities (MPEP 2106.05(g)).
In step 2B of the 101 analysis, the examiner has determined that the additional elements, alone or in combination do not recite significantly more than the abstract ideas identified above for the following rationale:
The limitations “a host controller”, “a virtual machine”, “memory”, and “virtual machine manager (VMM)” apply judicial exceptions on a generic computer and therefore do not provide significantly more.
The limitation “recording,…information indicating the occurrence of a storage event… stores data in memory allocated”, “receiving a notification of the occurrence of the storage event” and “providing…in response to the command, read access to the data based on the validating” represent insignificant, extra-solution activities and are well-understood, routine, or conventional because they are directed to "receiving or transmitting data" (MPEP 2106.05(d)). These are additional elements that the courts have recognized as well understood, routine, or conventional (MPEP 2106.05(d)). The citation of court cases in the MPEP meets the Berkheimer evidentiary burden since citation of a court case in the MPEP is one of the 4 types of evidentiary support that can be used to prove that the additional elements are well-understood, routine, or conventional (see 125 USPQ2d 1649 Berkheimer v. HP, Inc.). Thus, the limitations do not amount to significantly more than the abstract idea.
Considering the additional elements individually and in combination and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. The claim is not patent eligible.
As per claims 10 and 16, they are system type claims of claim 1, so they are rejected for the same reasons as claim 1.
As per claims 2, 4, (and similarly for claims 13 and 19), they recite limitations that further discuss the generic computing components recited in claim 1. These limitations do not provide significantly more than the abstract idea and only describe the generic computing components.
As per claims 3, 6, 8, (and similarly for claims 12, 14, and 18), they recite limitations that further explain the abstract idea and extra solution activities performed in claim 1. Specifically the notifications received and how the validation is performed, which consist of matching commands which a human with the aid of pen and paper can compare values to determine whether access is granted. As such, these claims do not provide significantly more than the abstract idea and the analysis for claim 1 applies.
As per claims 5, 7, 9 (and similarly for claim 11, 15, 17 and 20), they recite limitations which further describes the extra solution activity and contents of the data gathered/transferred. As such, these do not provide significantly more to the abstract idea and do not integrate it into practical application.
Response to Arguments
Applicant’s arguments, see page 1 of Remarks, filed 04/06/2026, with respect to 35 USC 102 have been fully considered and are persuasive. The rejections under 35 USC 102 of claims 1-8, 10-14 and 16-19 have been withdrawn.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 20150317495 A1 teaches in at least the Abstract “When a processor on the hardware chip executes the hypervisor, at least one on-chip component continuously authenticates the hypervisor during execution. A hypervisor configures a processor with access rights associated with an operating system, where the access rights determine access of the operating system to an at least one resource. A transaction filter then uses the access rights associated with the operating system to monitor the access of the operating system to the at least one resource in real-time as the operating system executes on a processor.” Also Figure 4 and corresponding description
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/JORGE A CHU JOY-DAVILA/Primary Examiner, Art Unit 2195