DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-17 in the reply filed on 12/26/25 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 13-15 is/are rejected under 35 U.S.C. 102 (a2) as being anticipated by Hush et al., (Hush) US 2023/0051863.
Regarding claim 13, Hush shows in FIG. 1-4, and discloses a device comprising: a computing logic layer [0029] formed over a substrate (wafer 115), the computing logic arranged as a plurality of dies (102)[0029] having a first die edge direction and a second die edge direction perpendicular to the first die edge direction (shown in FIG. 1B); a first directional indicator (marks on wafer 114,115)[0029] formed in the substrate, the first directional indicator indicating the first die edge direction (see FIG. 1B); an interconnect layer [0039] formed over the computing logic [0039], the interconnect layer comprising an interconnect structure (see FIG. 1C) extending between two of the plurality of dies (102), the interconnect structure extending in an interconnect direction different from the first die edge direction and the second die edge direction (see figures); and a second directional indicator formed in the substrate (wafer 114,115), the second directional indicator indicating the interconnect direction [Id.].
Regarding claim 14, Hush shows in FIG. 1-4, a device, further comprising a local interconnect layer [0039] coupled to the computing logic layer, and a global interconnect layer [0048] coupled to at least one of the local interconnect layer and the computing logic layer [0039].
Regarding claim 15, Hush shows in FIG. 1-4, a device wherein interconnect structures [0039] in the local interconnect layer correspond to respective dies (102) of the computing logic.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5,10-12,16,17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hush as applied to claims 13-15, and further in view of Ueyama et al., (Ueyama) US 2020/0209164.
Regarding claim 1, Hush shows in FIG. 1-4, a device comprising: computing logic formed over a substrate (114,115)[0029], the computing logic arranged as a plurality of dies (102, 104) having a first die edge direction and a second die edge direction perpendicular to the first die edge direction (see FIG. 1B); a first directional indicator (marks)[0029] formed in the substrate, the first directional indicator (Angle marks on different sides of wafer 114,115) indicating the first die edge direction; and a second directional indicator (angled marks) formed in the substrate, the second directional indicator indicating the feature direction [0029].
Hush differs from the claimed invention because he does not explicitly disclose a device wherein the computing logic further comprising an angled feature extending in a feature direction, the feature direction different from the first die edge direction and the second die edge direction.
Ueyama discloses [0030-0032, 0035], and shows in FIG. 1,2, a device wherein the computing logic further comprising an angled feature extending in a feature direction (angle up to 0.5 degrees) [0031], the feature direction different from the first die edge direction and the second die edge direction.
Ueyama is evidence that ordinary workers skilled in the art would find reasons, suggestions or motivations to modify the device of Hush. Therefore, at the time the invention was made; It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the teaching of Ueyama in the device of Hush because it will reduce deterioration of the device [0004].
Regarding claim 2, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device, wherein the first directional indicator is a first notch (marks on the sides of wafer 114,115) [0029] formed in the substrate, the notch oriented substantially parallel or substantially perpendicular to the first die edge direction [0029,0037].
Regarding claim 3, Hush in view of Ueyama discloses and shows in FIG. 1-4, wherein the second directional indicator is a second notch (marks on the sides of wafer 114,115) formed in the substrate, the second notch (marks on the sides of wafer 114,115) substantially parallel or substantially perpendicular to the feature direction.
Regarding claim 4, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein the first notch (marks on the sides of wafer 114,115) extends a first distance into the substrate, and the second notch (marks on the sides of wafer 114,115) extends a second distance into the substrate, the first distance different from the second distance [0029].
Regarding claim 5, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein the first notch has a first arc (marks on the sides of wafer 114,115, with arcs) length along a perimeter of the substrate, and the second notch has a second arc length along the perimeter of the substrate (marks on the sides of wafer 114,115, with arcs), the first arc length different from the second arc length.
Regarding claim 10, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device further comprising a local interconnect layer [0029] coupled to the computing logic, and a global interconnect layer [0048] coupled to at least one of the local interconnect layer and the computing logic layer.
Regarding claim 11, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein interconnect structures in the local interconnect layer (120) correspond to respective dies of the computing logic [0029].
Regarding claim 12, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein a global interconnect structure [0048] of the global interconnect layer is coupled between two of the plurality of dies (102,104).
Regarding claim 16, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein a direction indicated by the second directional indicator is 0°±5° of the interconnect direction [Ueyama, 0031].
Ueyama is evidence that ordinary workers skilled in the art would find reasons, suggestions or motivations to modify the device of Hush. Therefore, at the time the invention was made; It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the teaching of Ueyama in the device of Hush because it will reduce deterioration of the device [0004].
Regarding claim 17, Hush in view of Ueyama discloses, a device wherein a direction indicated by the second directional indicator 90°±5° of the interconnect direction [Ueyama, 0031].
Ueyama is evidence that ordinary workers skilled in the art would find reasons, suggestions or motivations to modify the device of Hush. Therefore, at the time the invention was made; It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the teaching of Ueyama in the device of Hush because it will reduce deterioration of the device [0004].
Claim(s) 6-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hush as applied to claims 13-15, and further in view of Ueyama and Kirk US 2005/0273749.
Regarding claims 6-9, Hush in view of Ueyama discloses and shows in FIG. 1-4, a device wherein the substrate (114,115) is substantially circular, and the second directional indicator is a circular segment of the substrate (marks on the sides of wafer 114,115 have a circular segment); wherein the substrate is substantially circular, and the first directional indicator is a first circular segment of the substrate (114,115); wherein the second directional indicator is second circular segment of the substrate.
Hush in view of Ueyama differs from the claimed invention because he does not explicitly disclose a chord of the circular segment extending in a direction substantially parallel or substantially perpendicular to the feature direction; a chord of the first circular segment extending in a direction substantially parallel or substantially perpendicular to the first die edge direction; a chord of the second circular segment extending in a direction substantially parallel or substantially perpendicular to the feature direction; wherein a length of the chord of the first segment is different from a length of the chord of the second segment.
Kirk discloses and shows in FIG. 1A, 1B, a chord (flat portion shown in FIG. 1A, 1B), of the circular segment extending in a direction substantially parallel or substantially perpendicular to the feature direction; a chord (flat portion shown in FIG. 1A, 1B)of the first circular segment extending in a direction substantially parallel or substantially perpendicular to the first die edge direction; a chord (flat portion shown in FIG. 1A, 1B)of the second circular segment extending in a direction substantially parallel or substantially perpendicular to the feature direction; wherein a length of the chord (flat portion shown in FIG. 1A, 1B)of the first segment is different from a length of the chord of the second segment.
Kirk is evidence that ordinary workers skilled in the art would find reasons, suggestions or motivations to modify the device of Hush in view of Ueyama. Therefore, at the time the invention was made; It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the teaching of Kirk because it will provide a cost-efficient device [0006].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC-ANTHONY ARMAND whose telephone number is (571)272-5178. The examiner can normally be reached 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MARC - ANTHONY ARMAND
Examiner
Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813