Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-8, 14, 15, 17-19, 24-26, 28, 29, 31 and 32 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zampardi et al. (20130285121), hereafter called ZAMPARDI.
Regarding claims 1, 24 and 28, ZAMPARDI (Fig, 5) discloses a module comprising: a transistor (532/536) including a control (input) terminal and an output terminal; and a first partial matching circuit (530/534) on the transistor die (524) connected to at least one of the control terminal of the transistor and the output terminal of the transistor, the first partial matching circuit configured to tune an input impedance of the transistor die; the at least one of the control terminal and the output terminal of the transistor coupled to a package, see para. [0094], comprising the transistor die, the package including a second partial matching circuit (525) for the transistor die, wherein the second partial matching circuit is off the transistor die.
Regarding claims 2, 25, 31 and 32, wherein the first partial matching circuit (530/534) and the second partial matching circuit (525) being in electrical communication without an intervening impedance circuit component.
Regarding claims 3 and 26, wherein the second partial matching circuit (525) for the transistor die can be configure as tunable for the transistor die to operate at a plurality of frequencies.
Regarding claim 4, wherein to tune the input impedance of the transistor die is inherent to increase the input impedance of the transistor die.
Regarding claims 5 and 29, wherein the first partial matching circuit (530/534) comprises an input partial matching circuit connected to the control (input) terminal of the transistor.
Regarding claim 6, wherein the first partial matching circuit comprises an output partial matching circuit (534) connected to the output terminal of the transistor (532).
Regarding claim 7, wherein the first partial matching circuit comprises an input partial matching circuit (530) connected to the control terminal of the transistor (532) and/or an output partial matching circuit (534) connected to the output terminal of the transistor (532).
Regarding claim 8, wherein the first partial matching circuit comprises a resonator (LC) circuit, see para. [0091].
Regarding claim 14, see claims 1 and 3 combined.
Regarding claim 15, wherein the first partial matching circuit (530/534) comprises an input partial matching circuit connected to the control (input) terminal of the transistor.
Regarding claim 17, wherein the first partial matching circuit comprises an output partial matching circuit (534) connected to the output terminal of the transistor (532).
Regarding claim 18, wherein the first partial matching circuit comprises an input partial matching circuit (530) connected to the control terminal of the transistor (532) and/or an output partial matching circuit (534) connected to the output terminal of the transistor (532).
Regarding claim 19, wherein the first partial matching circuit comprises a resonator (LC) circuit, see para. [0091].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9, 12, 13, 16, 20, 23, 27 and 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over ZAMPARDI.
Regarding claims 9 and 20, ZAMPARDI does not disclose the resonator circuit comprises a series resonator circuit including an inductive element and a shunt capacitor connected in series to a ground terminal. This is one of many configurations of a resonator known in the art, wherein ZAMPARDI discloses parallel LC circuit. Therefore, configuring a resonator in parallel/series LC circuit is considered a matter of design engineering for desired intended use of the invention and thus would have been obvious to a person having ordinary skills in the art.
Regarding claims 12 and 23, ZZAMPARDI does not disclose the resonator circuit is selected to increase an input impedance of the transistor die. This is considered a matter of design engineering based on component value(s) of the capacitor and inductor, which are readily available for implementation to achieve desired input impedance.
Regarding claim 13, which discloses the first partial matching circuit terminates a second harmonic frequency of a signal at a fundamental operating frequency of the transistor die. This is based on the configuration of the matching circuit, which is considered within one of ordinary skills in the art based one component(s) selected.
Regarding claims 16, 27 and 30, ZZAMPARDI does not disclose tune input impedance of the transistor die comprises increasing the input impedance of the transistor die. This is considered a matter of design engineering based on component value(s) of the capacitor and inductor of the resonator, which are readily available for implementation to achieve desired input impedance.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Khanh V. Nguyen whose telephone number is (571) 272-1767. The examiner can normally be reached from 8:30 AM – 5:00 PM EST.
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/KHANH V NGUYEN/ Primary Examiner, Art Unit 2843
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