Prosecution Insights
Last updated: October 04, 2026

MACOM Technology Solutions Holdings Inc.

Technology area: Semiconductors, Circuits & Optics

21 pending office actions • 9 art units • 20 examiners • 0 of 21 (0%) have an AI response strategy ready • 51 patents granted in the last 365 days

Analysis

MACOM Technology Solutions Holdings Inc. maintains a substantial prosecution presence with 21 pending office actions. These matters are situated within the Semiconductors, Circuits & Optics technology area. The portfolio is distributed across 20 distinct examiners and 9 distinct art units, indicating a broad engagement with various examination groups at the patent office. This wide distribution suggests that the company's semiconductor and circuit innovations span a diverse array of technical classifications.

The busiest examiner identified in the data is BULLARD-CONNOR, GENEVIEVE GRACE, who handles 2 pending office actions. This low concentration of work per examiner, where the busiest individual manages only 2 out of 21 total actions, suggests a highly diversified prosecution strategy. Practitioners can expect to interact with a wide array of examiners across the 9 distinct art units involved. The ratio of 21 pending office actions to 20 distinct examiners highlights that almost every pending matter is being reviewed by a different official. This lack of examiner overlap requires practitioners to manage numerous individual relationships and adapt to a variety of examination styles.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

21
Total Pending OAs
14
Non-Final OAs
6
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 3 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

2
Overdue
0
Due this week
0
Due this month
1
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 3 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (2)Due ≤ 60 days (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

10
Hard (48%)
9
Medium (43%)
0
Easy (0%)
2
Unknown (10%)

Rejection Statute Mix

BucketCases
§103 only7 (33%)
§102 only2 (10%)
Multi-statute (no §101)10 (48%)
No statute on record2 (10%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
11
Semiconductors
52% of docket
0
Mechanical / Eng
0% of docket
10
Business / Other
48% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

210 h
Manual time on pending OAs
42 h
Time saved (low, 20%)
74 h
Time saved (mid, 35%)
1.8 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
BULLARD-CONNOR, GENEVIEVE GRACE 2 45.8% +41.4%
POOS, JOHN W 1 93.4% +4.6%
BERRY, PAUL ANTHONY 1 90.2% -1.3%
ULLAH, ELIAS 1 85.0% +7.8%
MARUF, SHEIKH 1 86.8% +9.2%
VU, VU A 1 92.4% +6.6%
SHAMIRYAN, NAREH 1 90.0% +13.3%
RAHMAN, HAFIZUR 1 93.3% +8.6%
SPRENGER, JAIME LYNN 1 100.0% +0.0%
DEGRASSE, IAN ISAAC 1 80.8% +1.8%

Quick Wins (3)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18775169 DEVICE HAVING A COUPLED INTERSTAGE TRANSFORMER AND PROCESS IMPLEMENTING THE SAME ULLAH, ELIAS —
18764815 SEMICONDUCTOR DIE WITH GROUP III NITRIDE-BASED AMPLIFIER CIRCUITS MARUF, SHEIKH —
18629726 DEVICE PACKAGE HAVING SIGNAL PADS CONFIGURED TO PROMOTE SELF ALIGNMENT OF LEADS AND PROCESS OF IMPLEMENTING THE SAME DEGRASSE, IAN ISAAC —

Hard Cases (10)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
18897995 GATE VOLTAGE LEVEL SHIFTING CIRCUIT POOS, JOHN W —
18816732 ATOMIC LAYER DEPOSITION OF BARRIER METAL LAYER FOR ELECTRODE OF GALLIUM NITRIDE MATERIAL DEVICE BERRY, PAUL ANTHONY —
18679754 HIGH-ELECTRON-MOBILITY TRANSISTOR HAVING GROUP-III-NITRIDE CAPPING LAYER SEPARATED FROM CONTACT VU, VU A —
18675839 HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS SHAMIRYAN, NAREH —
18659440 DOHERTY AMPLIFIER WITH IMPROVED VIDEO BANDWIDTH RAHMAN, HAFIZUR —
18657441 CAPACITOR HAVING IMPROVED QUALITY FACTOR AND/OR REDUCED PLATE RESISTANCE AND METHOD OF IMPLEMENTING THE SAME SPRENGER, JAIME LYNN —
18591875 III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES MUNOZ, ANDRES F —
18480336 ASYMMETRIC RESONATOR STACK FOR HIGH ELECTROMECHANICAL COUPLING GONZALEZ, JULIO CESAR —

Interview Candidates (3)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18675839 HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS SHAMIRYAN, NAREH —
17951366 PACKAGED FLIP CHIP RADIO FREQUENCY TRANSISTOR AMPLIFIER CIRCUITS BULLARD-CONNOR, GENEVIEVE GRACE —
17711084 SELECTIVE ETCHING OF SILICON LAYERS IN A SEMICONDUCTOR DEVICE BULLARD-CONNOR, GENEVIEVE GRACE —

Top Art Units

Art UnitApps
2813 2
2899 2
2818 1
2897 1
2898 1
2843 1
2800 1
2893 1
2828 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18897995 GATE VOLTAGE LEVEL SHIFTING CIRCUIT POOS, JOHN W — §102§103 Non-Final OA — Pending Sep 26, 2024
18816732 ATOMIC LAYER DEPOSITION OF BARRIER METAL LAYER FOR ELECTRODE OF GALLIUM NITRIDE MATERIAL DEVICE BERRY, PAUL ANTHONY — §103§112 Non-Final OA — Pending Aug 27, 2024
18775169 DEVICE HAVING A COUPLED INTERSTAGE TRANSFORMER AND PROCESS IMPLEMENTING THE SAME ULLAH, ELIAS — §102 Non-Final OA — Pending Jul 17, 2024
18764815 SEMICONDUCTOR DIE WITH GROUP III NITRIDE-BASED AMPLIFIER CIRCUITS MARUF, SHEIKH — §103 Non-Final OA — Pending Jul 05, 2024
18679754 HIGH-ELECTRON-MOBILITY TRANSISTOR HAVING GROUP-III-NITRIDE CAPPING LAYER SEPARATED FROM CONTACT VU, VU A — §102§103 Non-Final OA — Pending May 31, 2024
18675839 HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS SHAMIRYAN, NAREH — §102§103Other Non-Final OA — Pending May 28, 2024
18659440 DOHERTY AMPLIFIER WITH IMPROVED VIDEO BANDWIDTH RAHMAN, HAFIZUR — §102§103 Non-Final OA — Pending May 09, 2024
18657441 CAPACITOR HAVING IMPROVED QUALITY FACTOR AND/OR REDUCED PLATE RESISTANCE AND METHOD OF IMPLEMENTING THE SAME SPRENGER, JAIME LYNN — §102§103§112 Non-Final OA — Pending May 07, 2024
18629726 DEVICE PACKAGE HAVING SIGNAL PADS CONFIGURED TO PROMOTE SELF ALIGNMENT OF LEADS AND PROCESS OF IMPLEMENTING THE SAME DEGRASSE, IAN ISAAC — §102 Non-Final OA — Pending Apr 08, 2024
18591875 III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES MUNOZ, ANDRES F 2818 §102§103 Non-Final OA — Pending Feb 29, 2024
18407695 FIELD EFFECT TRANSISTOR INCLUDING FIELD PLATES NICELY, JOSEPH C 2813 §103 Final Rejection — Pending Jan 09, 2024
18480336 ASYMMETRIC RESONATOR STACK FOR HIGH ELECTROMECHANICAL COUPLING GONZALEZ, JULIO CESAR — §102§103§112 Non-Final OA — Pending Oct 03, 2023
18466300 PACKAGED FLIP CHIP INTEGRATED PASSIVE DEVICES BLACKWELL, ASHLEY NICOLE 2897 §103 Final Rejection 50d Pending Sep 13, 2023
18119795 METHODS OF FORMING HIGH ELECTRON MOBILITY TRANSISTORS WITH CONTROLLED GATE LENGTH AND HIGH ELECTRON MOBILITY TRANSISTORS WITH CONTROLLED GATE LENGTH MALEK, MALIHEH 2813 §102§103 Non-Final OA — Pending Mar 09, 2023
17952267 METAL-INSULATOR-METAL CAPACITOR DEVICE WITH INTEGRATED WIRE BONDING SURFACE MOJADDEDI, OMAR F 2898 §103 Non-Final OA — Pending Sep 25, 2022
17951366 PACKAGED FLIP CHIP RADIO FREQUENCY TRANSISTOR AMPLIFIER CIRCUITS BULLARD-CONNOR, GENEVIEVE GRACE 2899 §103 Non-Final OA — Pending Sep 23, 2022
17900652 TRANSISTOR DIE INCLUDING MATCHING CIRCUIT NGUYEN, KHANH V 2843 §102§103 Final Rejection — Pending Aug 31, 2022
17848500 MODULAR POWER TRANSISTOR COMPONENT ASSEMBLIES WITH FLIP CHIP INTERCONNECTIONS TUTTLE, ETHAN ALEXANDER 2800 — Final Rejection — Pending Jun 24, 2022
17711084 SELECTIVE ETCHING OF SILICON LAYERS IN A SEMICONDUCTOR DEVICE BULLARD-CONNOR, GENEVIEVE GRACE 2899 §103 Non-Final OA — Pending Apr 01, 2022
17364930 3D PRINTED INTERCONNECTS AND RESONATORS FOR SEMICONDUCTOR DEVICES CUNNINGHAM, KIERAN MURRAY 2893 §103 Final Rejection 23d overdue Pending Jul 01, 2021
17204550 SEMICONDUCTOR LASERS HAGAN, SEAN P 2828 — Final Rejection 45d overdue Pending Mar 17, 2021

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