Prosecution Insights
Prosecution Insights
19 pending office actions • 9 art units • 16 examiners • 0 of 19 (0%) have an AI response strategy ready • 48 patents granted in the last 365 days
Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 5 (26%) |
| §102 only | 2 (11%) |
| Multi-statute (no §101) | 11 (58%) |
| No statute on record | 1 (5%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| SHAMIRYAN, NAREH | 3 | 91.4% | +11.4% |
| BULLARD-CONNOR, GENEVIEVE GRACE | 2 | 50.0% | +35.1% |
| TSE, YOUNG TOI | 1 | 89.3% | +8.5% |
| LAMBERT, DAVID W | 1 | 76.5% | +12.7% |
| ULLAH, ELIAS | 1 | 84.9% | +7.8% |
| VU, VU A | 1 | 92.3% | +6.7% |
| SPRENGER, JAIME LYNN | 1 | 100.0% | +0.0% |
| DEGRASSE, IAN ISAAC | 1 | 79.2% | +1.4% |
| MUNOZ, ANDRES F | 1 | 76.4% | +18.3% |
| SQUIRES, BRETT STEPHEN | 1 | 48.1% | +48.5% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18775169 | DEVICE HAVING A COUPLED INTERSTAGE TRANSFORMER AND PROCESS IMPLEMENTING THE SAME | ULLAH, ELIAS | — |
| 18679754 | HIGH-ELECTRON-MOBILITY TRANSISTOR HAVING GROUP-III-NITRIDE CAPPING LAYER SEPARATED FROM CONTACT | VU, VU A | — |
| 18675839 | HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS | SHAMIRYAN, NAREH | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19015446 | WIDE DYNAMIC RANGE CONTINUOUS-TIME LINEAR EQUALIZER (CTLE) | TSE, YOUNG TOI | — |
| 18933884 | ONE-WIRE INTERFACE TO SUPPORT SHARING A LOSS OF SIGNAL EVENT | LAMBERT, DAVID W | — |
| 18657441 | CAPACITOR HAVING IMPROVED QUALITY FACTOR AND/OR REDUCED PLATE RESISTANCE AND METHOD OF IMPLEMENTING THE SAME | SPRENGER, JAIME LYNN | — |
| 18591875 | III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES | MUNOZ, ANDRES F | — |
| 18685616 | SEMICONDUCTOR MATERIAL WAFERS OPTIMIZED FOR LINEAR AMPLIFIERS | SQUIRES, BRETT STEPHEN | — |
| 18480336 | ASYMMETRIC RESONATOR STACK FOR HIGH ELECTROMECHANICAL COUPLING | GONZALEZ, JULIO CESAR | — |
| 18466921 | THREE-WAY DOHERTY AMPLIFIER | SHAMIRYAN, NAREH | — |
| 18461980 | TRANSISTOR WITH GATE LAYOUT, DEVICE IMPLEMENTING THE TRANSISTOR WITH OUTPUT PRE-MATCHING, AND PROCESS OF IMPLEMENTING THE SAME | ADHIKARI DAWADI, BIPANA | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18933884 | ONE-WIRE INTERFACE TO SUPPORT SHARING A LOSS OF SIGNAL EVENT | LAMBERT, DAVID W | — |
| 18675839 | HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS | SHAMIRYAN, NAREH | — |
| 18591875 | III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES | MUNOZ, ANDRES F | — |
| 18685616 | SEMICONDUCTOR MATERIAL WAFERS OPTIMIZED FOR LINEAR AMPLIFIERS | SQUIRES, BRETT STEPHEN | — |
| 18466921 | THREE-WAY DOHERTY AMPLIFIER | SHAMIRYAN, NAREH | — |
| 17951366 | PACKAGED FLIP CHIP RADIO FREQUENCY TRANSISTOR AMPLIFIER CIRCUITS | BULLARD-CONNOR, GENEVIEVE GRACE | — |
| 17766611 | EFFICIENCY IMPROVEMENTS FOR MULTI-STAGE POWER AMPLIFIERS | SHAMIRYAN, NAREH | — |
| 17711084 | SELECTIVE ETCHING OF SILICON LAYERS IN A SEMICONDUCTOR DEVICE | BULLARD-CONNOR, GENEVIEVE GRACE | — |
| Art Unit | Apps |
|---|---|
| 2899 | 3 |
| 2898 | 2 |
| 2800 | 2 |
| 2631 | 1 |
| 2634 | 1 |
| 2818 | 1 |
| 2843 | 1 |
| 2814 | 1 |
| 2828 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19015446 | WIDE DYNAMIC RANGE CONTINUOUS-TIME LINEAR EQUALIZER (CTLE) | TSE, YOUNG TOI | 2631 | §102§112 | Non-Final OA | — | Pending | Jan 09, 2025 |
| 18933884 | ONE-WIRE INTERFACE TO SUPPORT SHARING A LOSS OF SIGNAL EVENT | LAMBERT, DAVID W | 2634 | §102§112 | Non-Final OA | — | Pending | Oct 31, 2024 |
| 18775169 | DEVICE HAVING A COUPLED INTERSTAGE TRANSFORMER AND PROCESS IMPLEMENTING THE SAME | ULLAH, ELIAS | — | §102 | Non-Final OA | — | Pending | Jul 17, 2024 |
| 18679754 | HIGH-ELECTRON-MOBILITY TRANSISTOR HAVING GROUP-III-NITRIDE CAPPING LAYER SEPARATED FROM CONTACT | VU, VU A | — | §103 | Non-Final OA | — | Pending | May 31, 2024 |
| 18675839 | HYBRID POWER AMPLIFIER WITH GAN-ON-SI AND GAN-ON-SIC CIRCUITS | SHAMIRYAN, NAREH | — | §103 | Non-Final OA | — | Pending | May 28, 2024 |
| 18657441 | CAPACITOR HAVING IMPROVED QUALITY FACTOR AND/OR REDUCED PLATE RESISTANCE AND METHOD OF IMPLEMENTING THE SAME | SPRENGER, JAIME LYNN | — | §102§103§112 | Non-Final OA | — | Pending | May 07, 2024 |
| 18629726 | DEVICE PACKAGE HAVING SIGNAL PADS CONFIGURED TO PROMOTE SELF ALIGNMENT OF LEADS AND PROCESS OF IMPLEMENTING THE SAME | DEGRASSE, IAN ISAAC | — | §102 | Non-Final OA | — | Pending | Apr 08, 2024 |
| 18591875 | III-NITRIDE MATERIAL SEMICONDUCTOR STRUCTURES ON CONDUCTIVE SILICON SUBSTRATES | MUNOZ, ANDRES F | 2818 | §102§103§112Other | Non-Final OA | — | Pending | Feb 29, 2024 |
| 18685616 | SEMICONDUCTOR MATERIAL WAFERS OPTIMIZED FOR LINEAR AMPLIFIERS | SQUIRES, BRETT STEPHEN | 2899 | §102§103§112 | Non-Final OA | — | Pending | Feb 22, 2024 |
| 18480336 | ASYMMETRIC RESONATOR STACK FOR HIGH ELECTROMECHANICAL COUPLING | GONZALEZ, JULIO CESAR | — | §102§103§112 | Non-Final OA | — | Pending | Oct 03, 2023 |
| 18466921 | THREE-WAY DOHERTY AMPLIFIER | SHAMIRYAN, NAREH | 2843 | §103§112 | Non-Final OA | — | Pending | Sep 14, 2023 |
| 18461980 | TRANSISTOR WITH GATE LAYOUT, DEVICE IMPLEMENTING THE TRANSISTOR WITH OUTPUT PRE-MATCHING, AND PROCESS OF IMPLEMENTING THE SAME | ADHIKARI DAWADI, BIPANA | 2898 | §102§103§112 | Non-Final OA | — | Pending | Sep 06, 2023 |
| 18334527 | PACKAGED DEVICE HAVING AN INTEGRATED PASSIVE DEVICE WITH WAFER LEVEL FORMED CONNECTION TO AT LEAST ONE SEMICONDUCTOR DEVICE AND PROCESSES FOR IMPLEMENTING THE SAME | HANUMASAGAR, SHAMITA S | 2814 | §102§103 | Non-Final OA | — | Pending | Jun 14, 2023 |
| 17952267 | METAL-INSULATOR-METAL CAPACITOR DEVICE WITH INTEGRATED WIRE BONDING SURFACE | MOJADDEDI, OMAR F | 2898 | §102§103§112 | Non-Final OA | — | Pending | Sep 25, 2022 |
| 17951366 | PACKAGED FLIP CHIP RADIO FREQUENCY TRANSISTOR AMPLIFIER CIRCUITS | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §103 | Non-Final OA | — | Pending | Sep 23, 2022 |
| 17848500 | MODULAR POWER TRANSISTOR COMPONENT ASSEMBLIES WITH FLIP CHIP INTERCONNECTIONS | TUTTLE, ETHAN ALEXANDER | 2800 | — | Final Rejection | — | Pending | Jun 24, 2022 |
| 17766611 | EFFICIENCY IMPROVEMENTS FOR MULTI-STAGE POWER AMPLIFIERS | SHAMIRYAN, NAREH | 2800 | §102§103 | Final Rejection | — | Pending | Apr 05, 2022 |
| 17711084 | SELECTIVE ETCHING OF SILICON LAYERS IN A SEMICONDUCTOR DEVICE | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §103 | Final Rejection | — | Pending | Apr 01, 2022 |
| 17204550 | SEMICONDUCTOR LASERS | HAGAN, SEAN P | 2828 | §103 | Final Rejection | 45d overdue | Pending | Mar 17, 2021 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free Trial