DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 12, 2026, has been entered.
Response to Amendment
Applicant’s amendment dated April 13, 2026 in which claims 1 and 12 were amended, has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shank (U.S. Pat. 9922973) in view of Botula (U.S. Pub. 2012/0038024).
Regarding claim 12, Shank [Fig.2] discloses an integrated circuit comprising:
a multilayer structure comprising:
a substrate [12] formed from a semiconductor material having a resistivity greater than or equal to 500 Ω.cm [Col.2 line 60 – col.3 line 7];
a dielectric layer [16] disposed on the substrate;
trenches [24] extending through the dielectric layer to the substrate;
first cavities [24a] extending in the substrate; and
a mobile electrical charge-trapping layer [22] made of polycrystalline silicon (polysilicon) [Col.5 line 61 – col.6 line 3] lining walls of the first cavities arranged in the substrate;
passive components [32a,34] disposed on the multilayer structure, vertically with respect to the first cavities [24a].
Shank fails to explicitly disclose
first cavities [24a] extending in the substrate, from the interface between the substrate and the dielectric layer; and
the mobile electrical charge-trapping layer [22] entirely filling the trenches [24], thus closing the first cavities in the substrate.
However, Botula [Figs.19-24] discloses an integrated circuit comprising:
first cavities [155] extending in the substrate, from the interface between the substrate [15] and the dielectric layer [20] [Fig.23]; and
the mobile electrical charge-trapping layer [50] entirely filling the trenches [22], thus closing the first cavities in the substrate.
It would have been obvious to provide the dielectric layer above the substrate and the trench extending through the dielectric layer as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 13, Shank [Fig.2] discloses an integrated circuit wherein the multilayer structure further comprises:
an active layer [14] disposed on the substrate [12].
Shank fails to explicitly disclose
an active layer disposed on the dielectric layer;
second cavities arranged in the active layer and at least partially filled by the mobile electrical charge-trapping layer.
However, Botula [Figs.19-20] discloses an integrated circuit wherein the multilayer structure further comprises:
an active layer [25] disposed on the dielectric layer [20];
second cavities [135] arranged in the active layer and at least partially filled by the mobile electrical charge-trapping layer [50] [Para.21].
It would have been obvious to provide the claimed limitations, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shank (U.S. Pat. 9922973) in view of Botula (U.S. Pub. 2012/0038024), as applied above and further in view of Herbert (U.S. Pat. 9721833).
Regarding claim 14, Botula [Fig.1] discloses the integrated circuit further comprising an active layer [25] made of silicon, wherein the substrate [15], the dielectric layer [20] and the active layer form together a silicon on insulator (SOI) substrate [Para.14].
Adusumilli and Botula fail to explicitly disclose the active layer is made of monocrystalline silicon. However, various forms of silicon are obvious and well-known for use as an active layer in SOI substrates. Herbert discloses an SOI substrate comprises monocrystalline silicon [Col.3 line 58 – col.4 line 2]. It would have been obvious to include wherein the active layer is made of monocrystalline silicon, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Response to Arguments
Applicant’s arguments with respect to claim(s) 12 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Overall, Applicant’s arguments are not persuasive and the claims stand rejected.
Conclusion
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/BAC H AU/Primary Examiner, Art Unit 2898
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