Prosecution Insights
Last updated: April 18, 2026
Application No. 17/901,346

METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT

Final Rejection §103
Filed
Sep 01, 2022
Examiner
AU, BAC H
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
92%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
660 granted / 817 resolved
+12.8% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
31 currently pending
Career history
848
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
48.8%
+8.8% vs TC avg
§102
29.6%
-10.4% vs TC avg
§112
11.8%
-28.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 817 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Applicant’s amendment dated October 2, 2025 in which claim 14 was added, has been entered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adusumilli (U.S. Pub. 2020/0176304) in view of Botula (U.S. Pub. 2012/0038024). Regarding claim 12, Adusumilli [Fig.3B] discloses an integrated circuit comprising: a multilayer structure comprising: a substrate [12] formed from a semiconductor material having a resistivity greater than or equal to 500 Ω.cm [Para.20]; trenches [22] extending to the substrate; first cavities [24] extending in the substrate; and a mobile electrical charge-trapping layer [40] lining walls of the first cavities arranged in the substrate and entirely filling the trenches [22], thus closing the first cavities in the substrate; passive components [36] disposed on the multilayer structure, vertically with respect to the first cavities [Paras.18,28]. Adusumilli fails to explicitly disclose a dielectric layer disposed on the substrate; trenches [22] extending through the dielectric layer to the substrate; first cavities [24] extending in the substrate, from the interface between the substrate and the dielectric layer. However, Botula [Figs.19-20] discloses an integrated circuit comprising: a dielectric layer [20] disposed on the substrate [15]; trenches [135] extending through the dielectric layer [20] to the substrate; first cavities [155] extending in the substrate, from the interface between the substrate and the dielectric layer [Fig.23]. Adusumilli discloses substrate may comprise various substrates including an SOI substrate. It would have been obvious to provide the dielectric layer above the substrate and the trench extending through the dielectric layer as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Regarding claim 13, Adusumilli [Fig.3B] discloses an integrated circuit wherein the multilayer structure further comprises: an active layer [30] disposed on the substrate [12]. Adusumilli fails to explicitly disclose an active layer disposed on the dielectric layer; second cavities arranged in the active layer and at least partially filled by the mobile electrical charge-trapping layer. However, Botula [Figs.19-20] discloses an integrated circuit wherein the multilayer structure further comprises: an active layer [25] disposed on the dielectric layer [20]; second cavities [135] arranged in the active layer and at least partially filled by the mobile electrical charge-trapping layer [50] [Para.21]. It would have been obvious to provide the claimed limitations, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Adusumilli (U.S. Pub. 2020/0176304) in view of Botula (U.S. Pub. 2012/0038024), as applied above and further in view of Herbert (U.S. Pat. 9721833). Regarding claim 14, Botula [Fig.1] discloses the integrated circuit further comprising an active layer [25] made of silicon, wherein the substrate [15], the dielectric layer [20] and the active layer form together a silicon on insulator (SOI) substrate [Para.14]. Adusumilli and Botula fail to explicitly disclose the active layer is made of monocrystalline silicon. However, various forms of silicon is obvious and well-known for use as an active in SOI substrates. It would have been obvious to include wherein the active layer is made of monocrystalline silicon, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Response to Arguments Applicant's arguments filed October 2, 2025, have been fully considered but they are not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Applicant asserts “Claim 12 requires "first cavities extending in the substrate from the interface between the substrate and the dielectric layer." Adusumilli fails to disclose this feature. … The Office Action's mapping of Adusumilli to this claim element is therefore improper”. This assertion is not persuasive. As presented above, Adusumilli [Fig.3B] discloses trenches [22] extending to the substrate; and first cavities [24] extending in the substrate. Botula was relied on for the disclosure wherein the “trenches [135] extending through the dielectric layer [20] to the substrate; and first cavities [155] extending in the substrate, from the interface between the substrate and the dielectric layer [Fig.23].” In response to applicant's argument that “Neither Adusumilli nor Botula recognizes or addresses this PSC problem” and asserts the differences in processes and objectives of Adusumilli and Botula compared to the current invention, the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Applicant asserts “Nowhere does Botula teach forming cavities from a substrate/dielectric interface with a charge-trapping liner as a deliberate strategy to maximize substrate resistivity across an integrated circuit or to curb PSC under passive elements. In short, Botula does not recognize the substrate/dielectric interface as the key location to initiate a structural solution (cavities with charge trap) for enhancing substrate resistivity, and certainly not in the context of passive component performance”. This assertion is not persuasive and appears irrelevant, as Applicant does not argue that Botula does disclose the structure “first cavities extending in the substrate, from the interface between the substrate and the dielectric layer” as required by the claim and clearly presented above. In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). In response to applicant's argument that “Adusumilli and Botula teach fundamentally different fabrication sequences that do not mesh readily”, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971). Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made Final. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art is considered analogous art and discloses at least some of the claimed subject matter of the current invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BAC H AU whose telephone number is (571)272-8795. The examiner can normally be reached M-F 9:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BAC H AU/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Sep 01, 2022
Application Filed
Jun 28, 2025
Non-Final Rejection — §103
Oct 02, 2025
Response Filed
Jan 08, 2026
Final Rejection — §103
Apr 13, 2026
Response after Non-Final Action

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Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
92%
With Interview (+10.8%)
2y 6m
Median Time to Grant
Moderate
PTA Risk
Based on 817 resolved cases by this examiner. Grant probability derived from career allow rate.

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