Office Action Predictor
Application No. 17/905,192

LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME

Final Rejection §102§103
Filed
Aug 29, 2022
Examiner
KOLB, THADDEUS J
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Semiconductor Solutions Corporation
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
3y 7m
To Grant
99%
With Interview

Examiner Intelligence

88%
Career Allow Rate
15 granted / 17 resolved
Without
With
+18.2%
Interview Lift
avg trend
3y 7m
Avg Prosecution
49 pending
66
Total Applications
career history

Statute-Specific Performance

§103
58.6%
+18.6% vs TC avg
§102
26.1%
-13.9% vs TC avg
§112
14.4%
-25.6% vs TC avg
Black line = Tech Center average estimate • Based on career data

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment/Argument Applicant’s amendment to claim 18 regarding the rejection under 35 U.S.C. 112(b) filed on 06/25/2025 is acknowledged and resolves the issue raised in the office action mailed on 03/26/2025. Accordingly, this rejection is withdrawn. Applicant’s amendment to claim 3 regarding the rejection under 35 U.S.C. 112(d) filed on 06/25/2025 is acknowledged and resolves the issue raised in the office action mailed on 03/26/2025. Accordingly, this rejection is withdrawn. Applicant’s arguments, see remarks, filed 06/25/2025, with respect to the rejection(s) of claim(s) 1-20 under 35 U.S.C. 102 and 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of applicant’s amendment. Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-3, 5-7 and 10-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Osamu (JP-2019192888-A – hereinafter Osamu). Regarding claim 1, Osamu teaches a light-emitting device (Fig.4 200; ¶0069), comprising: a first substrate (Fig.4 52; ¶0070); a plurality of light-emitting elements (Fig.4 20; ¶0014) and a plurality of electrodes (Fig.4 32; ¶0069) sequentially on a first surface (bottom surface) of the first substrate (52); a first insulating film (Fig.4 40; ¶0077), wherein the first insulating film (40) and the plurality of light-emitting elements (20) are directly connected to the first surface (bottom surface) of the first substrate (52); and a film (Fig.4 the unlabeled white space surrounding LEDs 20 is believed to be an encapsulant or insulating layer) on the first surface of the first substrate (52) to surround the light-emitting elements (20), wherein in a state where the first surface is a bottom surface of the first substrate (52), the lowermost part of a bottom surface of the film (Fig.4 the encapsulant surrounding 20) is in a higher position than a bottom surface of each of the plurality of electrodes (32). Regarding claim 2, Osamu teaches the light-emitting device according to claim 1, further comprising a plurality of lenses (Fig.4 50; ¶0067) which are on a second surface (top surface) of the first substrate (52) as a part of the first substrate (52), wherein light emitted from the plurality of light-emitting elements (20) is incident on the plurality of lenses (50). Regarding claim 3, Osamu teaches the light-emitting device according to claim 2, wherein the plurality of lenses (50) includes at least one of a concave lens, a convex lens, or a flat lens (¶0111). Regarding claim 5, Osamu teaches the light-emitting device according to claim 1, wherein the film (Fig.4 the encapsulant surrounding 20) surrounds the plurality of light-emitting elements (20) through the first insulating film (40). Regarding claim 6, Osamu teaches the light-emitting device according to claim 1, wherein the film (Fig.4 the encapsulant surrounding 20) is a second insulating film (encapsulants are insulators). Regarding claim 7, Osamu teaches the light-emitting device according to claim 1, wherein the film is one of an organic film or an inorganic film (all encapsulants must be either organic or inorganic). Regarding claim 10, Osamu teaches the light-emitting device according to claim 1, wherein the first substrate (52) is on a second substrate (Fig.4 64; ¶0058), and the film (Fig.4 the encapsulant surrounding 20) is not in contact with the second substrate (64). Regarding claim 11, Osamu teaches the light-emitting device according to claim 10, wherein the second substrate (64) is a semiconductor substrate including silicon (¶0061). Regarding claim 12, Osamu teaches the light-emitting device according to claim 10, further comprising a fill film (Fig.4 70; ¶0062) between the film (Fig.4 the encapsulant surrounding 20) and the second substrate. (64) Regarding claim 13, Osamu teaches the light-emitting device according to claim 10, further comprising: a heat sink; (Fig.4 62; ¶0060) and a conductive adhesive (Fig.4 60; ¶0061) between the heat sink (62) and the film (Fig.4 the encapsulant surrounding 20). Regarding claim 14, Osamu teaches a method for manufacturing a light-emitting device (Fig.4 200; ¶0069), comprising: forming an insulating film (Fig.4 40; ¶0077) on a first surface (bottom surface) of a first substrate (Fig.4 52; ¶0070), sequentially forming a plurality of light-emitting elements (Fig.4 20; ¶0014) and a plurality of electrodes (Fig.4 32; ¶0069) on the first surface (bottom surface) of the first substrate (52), wherein the insulating film (40) and the plurality of light-emitting elements (20) are directly connected to the first surface (bottom surface) of the first substrate (52); and forming a film (Fig.4 the encapsulant surrounding 20) on the first surface (bottom surface) of the first substrate (52) to surround the light-emitting elements (20), wherein in a state where the first surface is an upper surface of the first substrate (52), the uppermost part of an upper surface of the film (Fig.4 the encapsulant surrounding 20) is formed to be lower than an upper surface of each of the plurality of electrodes (32). Regarding claim 15, Osamu teaches the method for manufacturing the light-emitting device according to claim 14, further comprising forming, on a second surface (top surface) of the first substrate (52), a plurality of lenses (Fig.4 50; ¶0067) as a part of the first substrate (52), wherein light emitted from the plurality of light-emitting devices (20) is incident on the plurality of lenses (50). Regarding claim 16, Osamu teaches the method for manufacturing the light-emitting device according to claim 15, wherein the plurality of lenses (50) includes at least one of a concave lens, a convex lens, or a flat lens (¶0111). Regarding claim 17, Osamu teaches the method for manufacturing the light-emitting device according to claim 16, wherein the convex lens (50) is formed by forming a convex portion at the second surface (top surface) of the first substrate (52). Regarding claim 18, Osamu teaches a method for manufacturing a light-emitting device (Fig.4 200; ¶0069), comprising: forming an insulating film (Fig.4 40; ¶0077) on a first surface (bottom surface) of a first substrate (Fig.4 52; ¶0070), sequentially forming a plurality of light-emitting elements (Fig.4 20; ¶0014) and a plurality of electrodes (Fig.4 32; ¶0069) on the first surface (bottom surface) of the first substrate (52), wherein the insulating film (40) and the plurality of light-emitting elements (20) are directly connected to the first surface (bottom surface) of the first substrate (52); forming a film (Fig.4 the encapsulant surrounding 20) on the first surface (bottom surface) of the first substrate (52) to surround the light-emitting elements (20); and providing the first substrate (52) on a second substrate (Fig.4 64; ¶0058) after forming the film (Fig.4 the encapsulant surrounding 20). Regarding claim 19, Osamu teaches the method for manufacturing the light-emitting device according to claim 18, wherein in a state where the first surface (bottom surface) is an upper surface of the first substrate (52), the uppermost part of the upper surface of each of the film (Fig.4 the encapsulant surrounding 20) is formed to be lower than an upper surface of each of the plurality electrodes (32). Regarding claim 20, Osamu teaches the method for manufacturing the light-emitting device according to claim 18, further comprising forming, on a second surface (top surface) of the first substrate (52), a plurality of lenses (Fig.4 50; ¶0067) as a part of the first substrate (52), wherein light emitted from the plurality of light-emitting elements (20) is incident on the plurality of lenses (50). Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osamu in view of Yoshihiro et al. (JP-2011228553-A – hereinafter Yoshi). Regarding claim 4, Osamu teaches the light-emitting device according to claim 1. Osamu does not teach wherein the first substrate is a semiconductor substrate including gallium (Ga) and arsenic (As). Yoshi teaches a substrate (Fig.2 3; ¶0015 of Yoshi) including gallium and/or arsenic (¶0017 of Yoshi). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include these elements (¶0017 of Yoshi) in the substrate of Osamu (52 of Osamu) because they are well known in the art as a material for semiconductor substrates. Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osamu in view of Li et al. (see NPL reference #1). Regarding claim 8, Osamu teaches the light-emitting device according to claim 1. Osamu does not teach wherein the film is a metal film. Li teaches a plurality of rare earth elements for use in a dielectric material, including yttrium, gadolinium, dysprosium, cerium, erbium, neodymium and ytterbium, all of which are metals but can be used in an insulating film (Last paragraph of introduction of Li, Page 2 of Li). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to use a rare earth element oxide (Pg.122 of Li) as the dielectric material of the film (Fig.4 of Osamu the encapsulant surrounding 20) instead of non-metal containing materials like silicon oxide because rare-earth metal oxides have a higher k value and excellent contact stability with semiconductor materials like silicon (Pg.122 of Li). By making this modification, any film can be considered a metal film. Regarding claim 9, Osamu teaches the light-emitting device according to claim 1. Osamu does not teach wherein the film has a thermal conductivity higher than a thermal conductivity of the first substrate. Accuratus teaches a ceramic material aluminum nitride which has a high thermal conductivity and good dielectric properties and may serve as a heat sink material (see page 1 of Accuratus). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to use aluminum nitride (Pg.1 of Accuratus) as the dielectric material of the insulating film (Fig.4 of Osamu the encapsulant surrounding 20) instead of lower thermal conductivity materials like silicon oxide because aluminum nitride provides higher heat dissipation while maintaining electrical insulation to avoid short circuiting. By making this modification, the limitations of claim 9 are met because aluminum nitride has a higher thermal conductivity (140-180 W/mK; Pg1 of Accuratus) than GaAs, which is the material of applicant’s substrate (¶0009 of Applicant’s disclosure) (GaAs thermal conductivity is 0.55W/cm°C or 23 W/mK, as evidenced by page 2 of NPL3). Claim(s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osamu in view of Kim et al. (US-20250070032-A1 – hereinafter Kim). Regarding claim 21, Osamu teaches the light-emitting device according to claim 12, further comprising: connection pads (Fig.4 80; ¶0063), wherein the fill film (70) surrounds the connection pads (80). Osamu does not teach the light-emitting device further comprising bumps; and wherein the fill film surrounds the bumps. Kim teaches bumps (Fig.1A 370; ¶0045 of Kim) on connection pads (Fig.1A 264; ¶0030 of Kim) for connecting chips to substrates. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include bumps for the interconnections between the LED chips of Osamu (20 of Osamu) and the second substrate of Osamu (64 of Osamu) as this is a well-known and often required but not explicitly disclosed feature of the connections between chips and substrates in semiconductor devices. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THADDEUS J KOLB whose telephone number is (571)272-0276. The examiner can normally be reached Monday - Friday, 8:30am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571) 272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /T.J.K./ Examiner, Art Unit 2817 /ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
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Prosecution Timeline

Aug 29, 2022
Application Filed
Mar 20, 2025
Non-Final Rejection — §102, §103
Jun 25, 2025
Response Filed
Aug 10, 2025
Final Rejection — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+18.2%)
3y 7m
Median Time to Grant
Moderate
PTA Risk
Based on 17 resolved cases by this examiner