DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action is in response to Applicant's amendments filed January 12, 2026. Claims 1 and 15 have been amended. Claim 16 has been added. No claims have been canceled. Currently, claims 1-16 are pending.
Applicant’s Amendments to claims 1 and 15 overcome the double patenting rejection outlined in the previous Office Action; however new double patenting rejections are presented below in view of the newly presented limitations.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 and 15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-12 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-11, and 13 of U.S. Patent No. 12,021,106 B2 in view of Park et al. (US 20190148423 A1) herein after “Park”.
Claim Limitations of Instant Application
Claim limitations of U.S. Patent 12,021,106 B2
1. A solid-state image element, comprising: a photoelectric conversion element that performs photoelectric conversion; a front full trench isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element; and a first conductor part, wherein at least a portion of the first conductor part is in contact with a first main surface side of the front full trench isolation.
1. A solid-state image sensor, comprising: a photoelectric conversion element that performs photoelectric conversion; a front full trench isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element; and a first conductor part provided in close contact with a first main surface side of the front full trench isolation,
U.S. Patent No. 12,021,106 B2 does not disclose a contact, wherein the contact extends through the first conductor part, wherein a first portion of the contact is in direct contact with the first conductor part, and wherein a second portion of the contact is in contact with the front full trench isolation.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses a contact (Fig. 4, front-side contact plugs 54, ¶ [0081]), wherein the contact (54) extends through the first conductor part (Fig. 4, second conductive pattern 38b, ¶ [0047]), wherein a first portion of the contact (54) is in direct contact with the first conductor part (38b), and wherein the contact (54) is in contact with the front full trench isolation (Fig. 4, insulating capping pattern 40b, ¶ [0097]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of U.S. Patent No. 12,021,106 B2 with the contact as disclosed by Park, as part of a circuit required for device operation (see Park, ¶ [0081]).
Claim Limitations of Instant Application
Claim limitations of U.S. Patent 12,021,106 B2
2. The solid-state image element according to claim 1, wherein the first conductor part is embedded in a trench formed in the first main surface of the substrate, and the solid-state image element further comprises: a high-concentration impurity diffusion layer that is formed on the first main surface of the substrate; and an insulating part that is provided between the first conductor part and the high- concentration impurity diffusion layer.
1. A solid-state image sensor, comprising: a photoelectric conversion element that performs photoelectric conversion; a front full trench isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element; and a first conductor part provided in close contact with a first main surface side of the front full trench isolation, wherein the first conductor part is embedded in a trench formed in the first main surface of the substrate, and the solid-state image sensor further comprises: a high-concentration impurity diffusion layer formed on the first main surface of the substrate; and an insulating part provided between the first conductor part and the high-concentration impurity diffusion layer.
3. The solid-state image element according to claim 2, wherein the first conductor part is formed deeper than the insulating part, and the high-concentration impurity diffusion layer is formed shallower than the insulating part.
2. The solid-state image sensor according to claim 1, wherein the first conductor part is formed deeper than the insulating part, and the high-concentration impurity diffusion layer is formed shallower than the insulating part.
4. The solid-state image element according to claim 2, comprising a well layer that is formed in a region deeper than the high-concentration impurity diffusion layer, wherein the first conductor part is disposed in close contact with the well layer in a region deeper than the insulating part.
3. The solid-state image sensor according to claim 1, further comprising: a well layer formed in a region deeper than the high-concentration impurity diffusion layer, wherein the first conductor part is disposed in close contact with the well layer in a region deeper than the insulating part.
5. The solid-state image element according to claim 4, comprising a cap layer that is provided in close contact with a first main surface side of the first conductor part, wherein the first conductor part is disposed in close contact with the well layers of a plurality of adjacent pixels.
4. The solid-state image sensor according to claim 3, further comprising: a cap layer provided in close contact with a first main surface side of the first conductor part, wherein the first conductor part is disposed in close contact with the well layer of a plurality of adjacent pixels.
6. The solid-state image element according to claim 5, comprising a contact electrode that is electrically connected to the well layer and that is formed in the pixel, wherein the contact electrode fixes the well layers of the plurality of adjacent pixels at an input potential via the first conductor part.
5. The solid-state image sensor according to claim 4, further comprising: a contact electrode electrically connected to the well layer and formed within each of the pixels, wherein via the first conductor part, the contact electrode is fixed to a potential input to the well layers of the plurality of adjacent pixels.
7. The solid-state image element according to claim 1, wherein the front full trench isolation is provided surrounding the pixel in plan view, and the first conductor part is disposed in close contact with all or part of an upper surface of the front full trench isolation.
6. The solid-state image sensor according to claim 1, wherein the front full trench isolation is provided surrounding the pixel in plan view, and the first conductor part is disposed in close contact with all or part of an upper surface of the front full trench isolation.
8. The solid-state image element according to claim 7, wherein the first conductor part is provided in at least one of above the front full trench isolation interposed between two adjacent pixels or above the front full trench isolation located at a center of four pixels arranged in a 2x2 matrix.
7. The solid-state image sensor according to claim 6, wherein the first conductor part is provided in at least one of (a) above the front full trench isolation interposed between two adjacent pixels or (b) above the front full trench isolation located at a center of four pixels arranged in a 2×2 matrix.
9. The solid-state image element according to claim 1, wherein the first conductor part has a shape in which part or all of a trench is embedded by a conductive material, the trench taking the front full trench isolation as a bottom surface.
8. The solid-state image sensor according to claim 1, wherein the first conductor part has a shape in which part or all of the trench is embedded by a conductive material, the trench taking the front full trench isolation as a bottom surface.
10. The solid-state image element according to claim 2, wherein the insulating part is formed having an insulating material at least on a surface of the insulating part.
9. The solid-state image sensor according to claim 1, wherein the insulating part is formed having an insulating material at least on a surface of the insulating part.
11. The solid-state image element according to claim 10, wherein the insulating part has a two-layer structure constituted by an insulating film that covers a surface of a trench provided between the first conductor part and the high- concentration impurity diffusion layer, and pure polysilicon or an oxide embedded in the trench or an air layer.
10. The solid-state image sensor according to claim 9, wherein the insulating part has a two-layer structure constituted by an insulating film that covers a surface of a trench provided between the first conductor part and the high-concentration impurity diffusion layer, and pure polysilicon or an oxide embedded in the trench or an air layer.
12. The solid-state image element according to claim 1, wherein the first conductor part is a contact electrode shared between adjacent pixels.
11. The solid-state image sensor according to claim 1, wherein the first conductor part is a contact electrode shared between adjacent pixels.
15. An electronic device, comprising: a solid-state imaging device that includes a solid-state image element including a photoelectric conversion element that performs photoelectric conversion, a front full trench isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element, and a first conductor part, wherein at least a portion of the first conductor part is in contact with a first main surface side of the front full trench isolation; an optical lens that forms image light from a subject on an imaging surface of the solid-state imaging device; and a signal processing circuit that performs signal processing on a signal output from the solid-state imaging device.
13. An electronic device, comprising: a solid-state imaging device including a solid-state image sensor having a photoelectric conversion element that performs photoelectric conversion, a front full trench isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element, and a first conductor part provided in close contact with a first main surface side of the front full trench isolation; an optical lens that forms an image of image light from a subject on an image capturing surface of the solid-state imaging device; and a signal processing circuit that performs signal processing on a signal output from the solid-state imaging device, wherein the first conductor part is embedded in a trench formed in the first main surface of the substrate, and the solid-state image sensor further comprises: a high-concentration impurity diffusion layer formed on the first main surface of the substrate; and an insulating part provided between the first conductor part and the high-concentration impurity diffusion layer.
U.S. Patent No. 12,021,106 B2 does not disclose a contact, wherein the contact extends through the first conductor part, wherein a first portion of the contact is in direct contact with the first conductor part, and wherein a second portion of the contact is in contact with the front full trench isolation.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses a contact (54), wherein the contact (54) extends through the first conductor part (38b), wherein a first portion of the contact (54) is in direct contact with the first conductor part (38b), and wherein the contact (54) is in contact with the front full trench isolation (40b).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of U.S. Patent No. 12,021,106 B2 with the contact as disclosed by Park, as part of a circuit required for device operation (see Park, ¶ [0081]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 7-10, 12, and 14-16 are rejected under 35 U.S.C. 103 as being unpatentable over Ohguro (US 20160043130 A1) in view of Park (US 20190148423 A1).
Regarding claim 1, Fig. 2A of Ohguro discloses a solid-state image element (Fig. 2A, solid-state imaging device, ¶ [0029]), comprising:
a photoelectric conversion element (Fig. 2A, photoelectric conversion element PD, ¶ [0032]) that performs photoelectric conversion (“photodiode that converts incident light to a charge in an amount corresponding to the received light amount”, ¶ [0032]);
a front full trench isolation (Fig. 2A, FDTI (Front side Deep Trench Isolation) 11, ¶ [0031]) that penetrates (“FDTI 11 is a DTI formed in the semiconductor substrate 1 from the first main surface side”, ¶ [0031]) from a first main surface to a second main surface of a substrate (Fig. 2A, semiconductor substrate 1, ¶ [0030]) and that is formed between pixels (“regions surrounded by the FDTI 11 are pixel regions”, ¶ [0031]) including the photoelectric conversion element (PD); and
a first conductor part (Fig. 2A, substrate contact electrodes 51, ¶ [0038]) wherein at least a portion of the first conductor part (51) is in contact with a first main surface side of the front full trench isolation (11) (“active regions are formed as parts of the FDTI 11 on the first main surface side, and the active regions are respectively used as substrate contact electrodes 51”, ¶ [0038]).
Ohguro fails to disclose a contact, wherein the contact extends through the first conductor part, wherein a first portion of the contact is in direct contact with the first conductor part, and wherein a second portion of the contact is in contact with the front full trench isolation.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses a contact (54), wherein the contact (54) extends through the first conductor part (38b), wherein a first portion of the contact (54) is in direct contact with the first conductor part (38b), and wherein the contact (54) is in contact with the front full trench isolation (40b).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the contact as disclosed by Park, as part of a circuit required for device operation (see Park, ¶ [0081]).
Regarding claim 2, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, and Figs. 2A and 4C of Ohguro further disclose wherein the first conductor part (51) is embedded in a trench (“trenches 102 are formed at positions for forming the substrate contact electrodes 51”, ¶ [0084]) formed in the first main surface of the substrate (1), and
the solid-state image element (see Fig. 2A) further comprises:
a high-concentration impurity diffusion layer (Fig. 2A, floating diffusion portion 41, ¶ [0032]) that is formed on the first main surface of the substrate (1).
Ohguro fails to disclose an insulating part that is provided between the first conductor part and the high-concentration impurity diffusion layer.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses an insulating part (Fig. 4, second insulating spacer 36b, ¶ [0047]) that is provided between the first conductor part (38b) and the high- concentration impurity diffusion layer (Fig. 4, storage node regions 15, ¶ [0067]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the insulating part as disclosed by Park, to reduce interference between adjacent pixels (see Park, ¶ [0134]).
Regarding claim 3, Ohguro and Park together disclose the solid-state image element according to claim 2 as applied above, but Ohguro fails to disclose wherein the first conductor part is formed deeper than the insulating part, and
the high-concentration impurity diffusion layer is formed shallower than the insulating part.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses wherein the first conductor part (38b) is formed deeper than the insulating part (36b), and
the high-concentration impurity diffusion layer (15) is formed shallower than the insulating part (36b).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the insulating part as disclosed by Park, to reduce interference between adjacent pixels (see Park, ¶ [0134]).
Regarding claim 7, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, and Figs, 1 and 2A of Ohguro further disclose wherein the front full trench isolation (11) is provided surrounding the pixel in plan view (Fig. 1, “regions surrounded by the FDTI 11 are pixel regions”, ¶ [0031]), and
the first conductor part (51) is disposed in close contact with all or part of an upper surface of the front full trench isolation (11) (“the substrate contact electrodes 51 are arranged on the FDTI 11”, ¶ [0040]).
Regarding claim 8, Ohguro and Park together disclose the solid-state image element according to claim 7 as applied above, and Fig. 1 of Ohguro further discloses wherein the first conductor part (51) is provided in at least one of above the front full trench isolation (11) interposed between two adjacent pixels (Fig. 1, “substrate contact electrodes 51 are provided at three points on each of the sides”, ¶ [0039]) or above the front full trench isolation (11) located at a center of four pixels arranged in a 2x2 matrix (“The solid-state imaging device has a configuration in which a plurality of pixels are arrayed on a semiconductor substrate”, ¶ [0030]).
Regarding claim 9, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, and Fig. 2A of Ohguro further discloses wherein the first conductor part (51) has a shape in which part or all of a trench is embedded by a conductive material, the trench taking the front full trench isolation (11) as a bottom surface (Fig. 2A, “substrate contact electrodes 51 are arranged on the FDTI 11”, ¶ [0040]).
Regarding claim 10, Ohguro and Park together disclose the solid-state image element according to claim 2 as applied above, Ohguro fails to disclose wherein the insulating part is formed having an insulating material at least on a surface of the insulating part.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses wherein the insulating part (36b) is formed having an insulating material at least on a surface of the insulating part (“second insulating spacer 36b may be formed of silicon oxides”, ¶ [0073]).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the insulating part as disclosed by Park, to reduce interference between adjacent pixels (see Park, ¶ [0134]).
Regarding claim 12, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, and Fig. 1 of Ohguro further wherein the first conductor part (51) is a contact electrode shared between adjacent pixels (Fig. 1, “the substrate contact electrodes 51 are used in common for pixels adjacent to each other”, ¶ [0039]).
Regarding claim 14, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, and Fig. 4G of Ohguro further disclose comprising a contact electrode (72) that is provided on the first conductor part (51).
Ohguro fails to disclose that the contact electrode penetrates the first conductor part.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses a contact electrode (Fig. 4, back-side contact plugs 76, ¶ [0086]) that is provided penetrating the first conductor part (38b).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the contact electrode penetrating the first conductor part as disclosed by Park, to provide between electrodes and conductive patterns (see Park, ¶ [0086]).
Regarding claim 15, Fig. 2A of Ohguro disclose an electronic device, comprising:
a solid-state imaging device (Fig. 2A, solid-state imaging device, ¶ [0029]) that includes a solid-state image element including a photoelectric conversion element (PD) that performs photoelectric conversion (“photodiode that converts incident light to a charge in an amount corresponding to the received light amount”, ¶ [0032]), a front full trench isolation (11) that penetrates from a first main surface to a second main surface of a substrate (1) and that is formed between pixels (“regions surrounded by the FDTI 11 are pixel regions”, ¶ [0031]) including the photoelectric conversion element (PD), and
a first conductor part (51), wherein at least a portion of the first conductor part (51) is in contact with a first main surface side of the front full trench isolation (11);
an optical lens (“each of the pixels includes a color filter and a micro-lens arranged on the second main surface side”, ¶ [0031]) that forms image light from a subject on an imaging surface of the solid-state imaging device (“The micro-lens condenses light to be incident onto the pixel”, ¶ [0031]); and
a signal processing circuit (“outputs a signal corresponding to the accumulated charge amount to a logic part”, ¶ [0030]) that performs signal processing on a signal output from the solid-state imaging device.
Ohguro fails to disclose a contact, wherein the contact extends through the first conductor part, wherein a first portion of the contact is in contact with the first conductor part, and wherein a second portion of the contact is in contact with the front full trench isolation.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses a contact (54), wherein the contact (54) extends through the first conductor part (38b), wherein a first portion of the contact (54) is in direct contact with the first conductor part (38b), and wherein the contact (54) is in contact with the front full trench isolation (40b).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the contact as disclosed by Park, as part of a circuit required for device operation (see Park, ¶ [0081]).
Regarding claim 16, Ohguro and Park together disclose the solid-state image element according to claim 1 as applied above, but Ohguro fails to disclose wherein the contact extends across an interface between the first main surface of the front full trench isolation and the first conductor part.
In the similar field of endeavor of photodiode structures, Fig. 4 of Park discloses wherein the contact (54) extends across an interface between the first main surface of the front full trench isolation (40b) and the first conductor part (38b).
It would have been obvious to one of ordinary skill in the art before the time of the effective filling date of the invention to modify the solid-state image sensor of Ohguro with the contact as disclosed by Park, to provide connection between the wiring and conductive patterns (see Park, ¶ [0091]).
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Ohguro (US 20160043130 A1) and Park (US 20190148423 A1) in further view of Kim et al. (US 20200077055 A1) herein after “Kim”.
Regarding claim 4, Ohguro and Park together disclose the solid-state image element according to claim 2 as applied above, and Fig. 2A of Ohguro discloses comprising a well layer (Fig. 2A, P-type well 31W, ¶ [0034]) that is formed in a region deeper than the high-concentration impurity diffusion layer (41), wherein the first conductor part (51) is disposed in close contact with the well layer (31W).
Ohguro and Park fail to disclose the first conductor part is disposed in close contact with the well layer in a region deeper than the insulating part.
In the similar field of endeavor of imaging sensors, Fig. 10A of Kim discloses comprising a well layer (In Fig. 10A of Kim, the area surrounding the photoelectric conversion regions 110 form a PN junction in the same way as the well layer of the instant application) (“the semiconductor substrate 100 of the first conductivity type and the photoelectric conversion region 110 of the second conductivity type may constitute a p-n junction photodiode”, ¶ [0046]) that is formed in a region deeper than the high-concentration impurity diffusion layer (FD), wherein the first conductor part (105) is disposed in close contact with the well layer (area surrounding 110) in a region deeper than the insulating part (103).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the insulating part as disclosed by Kim, to isolate the active areas (see Kim, ¶ [0068]).
Regarding claim 5, Ohguro, Park and Kim together disclose the solid-state image element according to claim 4 as applied above, Ohguro and Park fail to disclose comprising a cap layer that is provided in close contact with a first main surface side of the first conductor part, wherein the first conductor part is disposed in close contact with the well layers of a plurality of adjacent pixels.
In the similar field of endeavor of imaging sensors, Fig. 10A of Kim discloses comprising a cap layer (Fig. 10A, insulating layer 221, ¶ [0052]) that is provided in close contact with a first main surface (Fig. 10A, first or front surface 100a, ¶ [0039]) side of the first conductor part (105), wherein the first conductor part (105) is disposed in close contact with the well layers (area surrounding 110) of a plurality of adjacent pixels (Fig. 10A, pixels PX, ¶ [0041]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the cap layer as disclosed by Kim, to isolate the components (see Kim, ¶ [0069]).
Regarding claim 6, Ohguro, Park and Kim together disclose the solid-state image element according to claim 5 as applied above, and Fig. 4G of Ohguro further disclose comprising a contact electrode (Fig. 4G, substrate contacts 72, ¶ [0038]) that is electrically connected to the well layer (31W) and that is formed in the pixel, wherein the contact electrode (72) fixes the well layers (31W) of the plurality of adjacent pixels at an input potential (“the substrate contacts 72 are formed to be electrically connected to the substrate contact electrodes 51”, “the potential of each of the pixels is fixed by the substrate contacts 72”, ¶ [0051]) via the first conductor part (51).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Ohguro (US 20160043130 A1) and Park (US 20190148423 A1) in further view of Kim (US 20200077055 A1) and Yanagita (US 20140054662 A1).
Regarding claim 11, Ohguro and Park together disclose the solid-state image element according to claim 10 as applied above, Ohguro and Park fail to disclose wherein the insulating part has a two-layer structure constituted by an insulating film that covers a surface of a trench provided between the first conductor part and the high-concentration impurity diffusion layer, and pure polysilicon or an oxide embedded in the trench or an air layer.
In the similar field of endeavor of imaging sensors, Fig. 10A of Kim discloses wherein the insulating part (103) covers a surface of a trench (“formation of the second device isolation pattern 103 may include forming shallow trenches in the first surface 100a of the semiconductor substrate 100”, ¶ [0067]) provided between the first conductor part (105) and the high-concentration impurity diffusion layer (FD), and pure polysilicon or an oxide (“The second device isolation pattern 103 may be formed of or include at least one of a silicon oxide layer, a silicon oxynitride layer, or a silicon nitride layer.”, ¶ [0048]) embedded in the trench or an air layer.
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the insulating part as disclosed by Kim, to isolate the active areas (see Kim, ¶ [0068]).
Kim fails to disclose wherein the insulating part has a two-layer structure constituted by an insulating film.
In the similar field of endeavor of imaging devices, Fig. 17 of Yanagita discloses wherein the insulating part (Fig. 17, element separating unit 53, ¶ [0153]) has a two-layer structure constituted by an insulating film (Fig. 17, insulating film 54, hollow portion 58, ¶ [0153]).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the two-layer structure as disclosed by Yanagita, to improve light blocking (see Yanagita, ¶ [0158]).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ohguro (US 20160043130 A1), Park (US 20190148423 A1) and Kim (US 20200077055 A1) in further view of Lee et al. (US 20180190691 A1) herein after “Lee”.
Regarding claim 13, Ohguro, Park and Kim together disclose the solid-state image element according to claim 4 as applied above, Ohguro, Park and Kim fail to disclose comprising a second conductor part that is disposed in close contact with all or part of an upper surface of the front full trench isolation and that is provided deeper than the insulating part and in contact with the well layer, the second conductor part attracting and trapping electrons accumulated in the photoelectric conversion element when a positive voltage is applied to the second conductor part.
In the similar field of endeavor of imaging devices, Figs. 2 and 4 of Lee disclose comprising a second conductor part (Fig. 2, trap patterns TP, ¶ [0026]) that is disposed in close contact with all or part of an upper surface of the front full trench isolation (Fig. 2, device isolation layer 110, ¶ [0034]) and that is provided deeper than the insulating part (Fig. 2, insulating layer IL, ¶ [0026]) and in contact with the well layer (Fig. 2, well region 108, ¶ [0031]), the second conductor part (TP) attracting and trapping electrons accumulated (Fig. 4, “if high positive voltage V is applied to the conductive layer CL through the second via 128, due to an electric field produced by the positive voltage V, some of electrons (e) may pass through the tunneling layer TL and may be trapped in the trap patterns TP”, ¶ [0037]) in the photoelectric conversion element (Fig. 2, photoelectric conversion device PD, ¶ [0021]) when a positive voltage is applied to the second conductor part (TP).
It would have been obvious to one of ordinary skill in the art at the time of effective filing of the invention to modify the image element disclosed by Ohguro to include the second conductor part as disclosed by Lee, to improve the optical characteristics of the image sensor (see Lee, ¶ [0061]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/C.A.N./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893