DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5, 7-9 and 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation of "a semiconductor layer including a first layer and a second layer that are stacked in an order as follows: a plane containing the first electrode and the second electrode, the first layer, the second layer, and the photoelectric conversion layer", as recited in claim 1, is unclear as to whether the plane containing the first electrode and the second electrode, and the photoelectric conversion layer are parts of the semiconductor layer applicant refers.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-5, 7-9 and 11-20, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Moriwaki (WO202002902A1) in view of Yoneda (2016/0356645).
As for claims 1, 3, 12 and 13, Moriwaki shows in Figs 1, 2, 7, 8, 72 and related text an imaging element 10 comprising:
a first electrode 24 and a second electrode 21 that are disposed in parallel;
a third electrode 22 that is disposed to be opposed to the first electrode and the second electrode;
a photoelectric conversion layer 23A that is provided between the first electrode and the third electrode and between the second electrode and the third electrode, the photoelectric conversion layer including an organic material; and
a semiconductor layer 23B including a first layer 23C and a second layer (lower portion of) 23D that are stacked in an order as follows: a plane containing the first electrode and the second electrode, the first layer, the second layer, and the photoelectric conversion layer, and
an insulating layer 82 that is provided between the first electrode and the semiconductor layer and between the second electrode and the semiconductor layer, and has an opening 85 above the second electrode, wherein
the second layer has a value for a second layer EVO indicating oxygen deficiency generation energy or a value for a second layer EVN indicating nitrogen deficiency generation energy greater than a value of the first layer for a first layer EVO or a first layer EVN (Table 2, comparative example 1C),
wherein the second layer includes a material that satisfies the second layer EVO>2.4eV (comparative example 1C),
wherein the second layer includes the material that satisfies the second layer EVO>2.8eV (comparative example 1C), and
wherein the first and the second layer each include an oxide semiconductor (Moriwaki: Table 2, comparative example 1C; abstract).
Moriwaki does not disclose the first layer has a value for a first layer C5s indicating a contribution ratio of a 5s orbital to a first layer conduction band minimum greater than a value of the second layer for a second layer C5s, wherein the first layer includes a material that satisfies the first layer C5s>60% (claim 1); the first layer includes the material that satisfies the first layer C5s>80% (claim 3); the first layer has a value for [Symbol font/0x44]EN indicating a first layer value obtained by subtracting an average electronegativity value of cation species included in the oxide semiconductor from an average electronegativity value of anion species included in the oxide semiconductor smaller than a second layer value of the second layer for [Symbol font/0x44]EN (claim 12).
Yonda et al. teach in Figs. 40D, 40E and related text:
As for claim 1, the first layer 430b has a value for a first layer C5s indicating a contribution ratio of a 5s orbital to a first layer conduction band minimum greater than a value of the second layer 430c for a second layer C5s ([0444], [0456]).
As for claim 12, the first layer has a value for [Symbol font/0x44]EN indicating a first layer value obtained by subtracting an average electronegativity value of cation species included in the oxide semiconductor from an average electronegativity value of anion species included in the oxide semiconductor smaller than a second layer value of the second layer for [Symbol font/0x44]EN ([0456]: i.e. 3:1:2 vs 1:3:3).
Yonda et al. do not disclose the first layer includes a material that satisfies the first layer C5s>60%; and the first layer includes the material that satisfies the first layer C5s>80%.
Moriwaki and Yonda et al. are analogous art because they are directed to a semiconductor oxide film including a first layer and a second layer and one of ordinary skill in the art would have had a reasonable expectation of success to modify Moriwaki with the specified feature(s) of Yonda et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the first layer having a value for a first layer C5s indicating a contribution ratio of a 5s orbital to a first layer conduction band minimum greater than a value of the second layer for a second layer C5s, as taught by Yonda et al., the first layer including the material that satisfies the first layer C5s>(60%) 80%, in Moriwaki's device, in order to increase mobility, improve and optimize the performance of the device. Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
As for claim 2, the combined device shows the second layer includes the material that satisfied EVO > 2.3 eV (Moriwaki: Table 2, comparative example 1C; abstract).
As for claim 4, the combined device shows the first layer includes an amorphous layer (Moriwaki: [0032]).
As for claim 5, the combined device shows the second layer has a film thickness that is four times or more and eight times or less as large as a film thickness of the first layer (Moriwaki: Table 1).
As for claim 7, the combined device shows the first layer and the second layer are each formed by using an IGTO-based oxide semiconductor, a GZTO-based oxide semiconductor, an ITZO-based oxide semiconductor, or an ITGZO-based oxide semiconductor (Moriwaki: [0034]-[0037]).
As for claim 8, the combined device shows the first layer is formed by using ITO, IZO, indium-rich ITZO, IGO, or tin-rich SnZnO (Moriwaki: [0034]-[0037]).
As for claim 9, the combined device shows the second layer is formed by using IGZO, IGZTO, ZTO, GZTO, or IGTO (Moriwaki: [0034]-[0037]).
As for claim 11, the combined device shows the semiconductor layer further includes a third layer (upper portion of) 23D that is provided between the first electrode and second electrode and the first layer, the third layer having a third layer conduction band minimum that is shallower than a first layer conduction band minimum of the first layer (Moriwaki: Fig. 1 combined with Yonda: [0444]).
As for claim 13, the combined device shows and an LUMO level E1 of a material of the photoelectric conversion layer included near the semiconductor layer and an LUMO level E2 of a material included in the semiconductor layer satisfy E2 – E1> 0.1 eV ([0024]).
As for claim 14, the combined device shows the semiconductor layer includes a material having a carrier mobility of 10 cm2/V[Symbol font/0xD7]s or more (Moriwaki: [0030]).
As for claim 15, the combined device shows the second layer has a carrier concentration of 1x1014/cm-3 or more and less than 1x1017/cm-3 (Moriwaki: [0030]).
As for claim 16, the combined device shows the first electrode and the second electrode are disposed on the photoelectric conversion layer on an opposite side to a light incidence surface (Moriwaki: Fig. 1; [0080]).
As for claim 17, the combined device shows respective voltages are individually applied to the first electrode and the second electrode (Moriwaki: Fig. 2).
As for claim 18, the combined device shows one or more organic photoelectric conversion sections and one or more inorganic photoelectric conversion sections are stacked, the one or more organic photoelectric conversion sections each including the first electrode, the second electrode, the third electrode, the photoelectric conversion layer, and the semiconductor layer, the one or more inorganic photoelectric conversion sections each performing photoelectric conversion in a wavelength range different from a wavelength range of each of the one or more organic photoelectric conversion sections (Moriwaki: Fig. 1; [0113]-[0114]).
As for claim 19, the combined device shows the one or more inorganic photoelectric conversion section is formed to be buried in a semiconductor substrate 70, and
the one or more organic photoelectric conversion section is formed on a first surface side 70b of the semiconductor substrate (Moriwaki: Fig. 1).
As for claim 20, the combined device shows the semiconductor substrate has a first surface and a second surface side that are opposed to each other and has a multilayer wiring layer (not shown) 76 formed on the second surface side 70A (Moriwaki: Fig. 1; [0162]).
Response to Arguments
Applicant's arguments filed February 9, 2026 have been fully considered but they are not persuasive.
Applicant argues that “the combination of Moriwaki and Yoneda fails to teach, suggest, or motivate the features of amended Claim 1” and “claim 1 is in condition for allowance and requests withdrawal of the 35 U.S.C. § 103 rejection” because “Yoneda fails to disclose "an order as follows: a plane containing the first electrode and the second electrode, the first layer, the second layer, and the photoelectric conversion layer"”.
The examiner respectfully disagrees because Applicant did not provide evidence that why Yoneda fails to disclose “an order as follows: a plane containing the first electrode and the second electrode, the first layer, the second layer, and the photoelectric conversion layer”, as recited in claim 1.
Yoneda clearly shows in Figs. 1, 7 and 8 the limitation of “… an order as follows: a plane containing the first electrode 24 and the second electrode 21 (Figs. 7-8), the first layer 23C, the second layer (lower portion of) 23D, and the photoelectric conversion layer 23A”, as recited in claim 1.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MEIYA LI/Primary Examiner, Art Unit 2811