DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the Examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 11, 12, 15, 16, 19, 20, 23, and 24 are rejected under 35 U.S.C. 103 as being unpatentable over JP2017062462A (Hoon) in view of US 2021/0305444 A1 (Seo), US 2021/0124233 A1 (Liang) and US 2018/0374863 A1 (Purayath).
Regarding claim 11, Hoon discloses, A method for etching a substrate (substrate (1); FIG. 1; [0054]—transparent substrate) having an oxide film (oxide film (2); FIG. 1; [0054] and [0060]), comprising:
evaluating a film quality ([0051] and [0109]) of the oxide film (2) on the substrate (1) and determining a time for performing the etching on a basis of results of the evaluation in advance ([0051] and [0109]).
But, Applicant may argue that Hoon does not appear to explicitly disclose,
a semiconductor substrate; and
evaluation by a channeling mode of Rutherford Backscattering Spectroscopy and that the etching is dry-etching.
However, in analogous art, Seo discloses that it was well known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor substrate can be a transparent material ([0002]). Seo also discloses, that “there is a growing interest in the development of next-generation devices such as transparent electronic devices (for example, transparent semiconductors)” ([0004]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hoon and Seo before him/her that it was well-known that the transparent material of substrate (1) of Hoon can be a semiconductor substrate and also that there is a growing interest in the development of transparent electronic devices utilizing transparent semiconductors. Please see, MPEP 2144(I)—Rational May Be In A Reference, Or Reasoned From Common Knowledge In The Art, Scientific Principles, Art-Recognized Equivalents, Or Legal Precedent. The rationale to modify or combine the prior art does not have to be expressly stated in the prior art; the rationale may be expressly or impliedly contained in the prior art or it may be reasoned from knowledge generally available to one of ordinary skill in the art, established scientific principles, or legal precedent established by prior case law. Please also see, MPEP 2144(IV)—Rational Different From Applicant’s Is Permissible—The reason or motivation to modify the reference may often suggest what the inventor has done, but for a different purpose or to solve a different problem. It is not necessary that the prior art suggest the combination to achieve the same advantage or result discovered by applicant.
But, Applicant may argue that Hoon in view of Seo does not appear to explicitly disclose, evaluation by a channeling mode of Rutherford Backscattering Spectroscopy and that the etching is dry-etching.
However, in analogous art, Liang discloses evaluation by a channeling mode of Rutherford Backscattering Spectroscopy can predicably evaluate a film quality, such as crystal quality improvement ([0069]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hoon, Seo, and Liang before him/her to evaluat[e] a film quality of oxide film (2) of Hoon in view of Seo by a channeling mode of Rutherford Backscattering Spectroscopy, as taught by Liang, because this technique is a well-known method that can be utilized with a reasonable expectation of success to predicably evaluate a film quality, such as crystal quality improvement, as also taught by Liang. See, MPEP 2143(A)—Combining Prior Art Elements According To Known Methods To Yield Predicable Results.
But, Applicant may argue that the combination of Hoon, Seo, and Liang does not appear to explicitly disclose, that the etching is dry-etching.
However, in analogous art, Purayath discloses that:
Dry etch processes are increasingly desirable for selectively removing material from semiconductor substrates. The desirability stems from the ability to gently remove material from miniature structures with minimal physical disturbance. Dry etch processes also allow the etch rate to be abruptly stopped by removing the gas phase reagents. Extremely selective etches have been developed recently to etch silicon nitride, silicon oxide or silicon while retaining the other materials ([0004])
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hoon, Seo, Liang, and Purayath before him/her to perform a dry-etching process in the method of Hoon, Seo, and Liang, as taught by Purayath, thereby gently removing oxide film (2) with minimal physical disturbance and allowing the etch rate to be abruptly stopped.
Regarding claim 12, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate (1) according to claim 11, wherein a distribution of crystallinity in a depth direction of the oxide film (2) is evaluated as the film quality ([0051]and [0109] of Hoon—depth direction of oxide film (2) and [0069] of Liang—distribution of crystallinity).
Regarding claim 15, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 11, wherein the oxide film (2) is a natural oxide film due to storage in the atmosphere or a chemical oxide film due to cleaning ([0056] of Purayath—pre-clean).
Regarding claim 16, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 12, wherein the oxide film is a natural oxide film due to storage in the atmosphere or a chemical oxide film due to cleaning ([0056] of Purayath—pre-clean).
Regarding claim 19, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 11, wherein the semiconductor substrate (1) is a silicon semiconductor substrate and the oxide film (2) is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 20, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 12, wherein the semiconductor substrate (1) is a silicon semiconductor substrate and the oxide film (2) is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 23, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 15, wherein the semiconductor substrate (1) is a silicon semiconductor substrate and the oxide film (2) is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 24, Hoon in view of Seo, Liang, and Purayath discloses, The method for dry-etching a semiconductor substrate according to claim 16, wherein the semiconductor substrate is a silicon semiconductor substrate (1) and the oxide film (2) is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Claims 13, 14, 17, 18, 21, 22, 25, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Hoon in view of Seo, Liang, and Purayath as respectively applied to claims 11 and 12, above, and further in view of US 2011/0240990 A1 (Yamazaki).
Regarding claim 13, Hoon in view of Seo, Liang, and Purayath does not appear to explicitly disclose, wherein a proportion of constituent elements of the oxide film is evaluated as the film quality.
However, in analogous art, Yamazaki discloses, that a proportion of constituent elements of an oxide film (204) and oxide film (210) can predicably be used to evaluate their quality as components in the fabrication of a semiconductor device that utilizes dry etching ([0049] and [0094]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hoon, Seo, Liang, Purayath, and Yamazaki before him/her to evaluate a film quality based on a proportion of constituent elements of the oxide film (2) of Hoon, Seo, Liang, and Purayath, as taught by Yamazaki, because this technique is a well-known method that can be utilized with a reasonable expectation of success to predicably evaluate a quality of an oxide film for use in the fabrication of a semiconductor device that utilizes dry etching, as also taught by Yamazaki. See, MPEP 2143(A), above.
Regarding claim 14, Hoon in view of Seo, Liang, and Purayath does not appear to explicitly disclose, wherein a proportion of constituent elements of the oxide film is evaluated as the film quality.
However, in analogous art, Yamazaki discloses, that a proportion of constituent elements of an oxide film (204) and oxide film (210) can predicably be used to evaluate their quality as components in the fabrication of a semiconductor device that utilizes dry etching ([0049] and [0094]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Hoon, Seo, Liang, Purayath, and Yamazaki before him/her to evaluate a film quality based on a proportion of constituent elements of the oxide film (2) of Hoon, Seo, Liang and Purayath, as taught by Yamazaki, because this technique is a well-known method that can be utilized with a reasonable expectation of success to predicably evaluate a quality of an oxide film for use in the fabrication of a semiconductor device that utilizes dry etching, as also taught by Yamazaki.
Regarding claim 17, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 13, wherein the oxide film is a natural oxide film due to storage in the atmosphere or a chemical oxide film ([0056] of Purayath—pre-clean).
Regarding claim 18, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 14, wherein the oxide film is a natural oxide film due to storage in the atmosphere or a chemical oxide film due to cleaning ([0056] of Purayath—pre-clean).
Regarding claim 21, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 13, wherein the semiconductor substrate is a silicon semiconductor substrate and the oxide film is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 22, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 14, wherein the semiconductor substrate is a silicon semiconductor substrate and the oxide film is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 25, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 17, wherein the semiconductor substrate is a silicon semiconductor substrate and the oxide film is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Regarding claim 26, Hoon in view of Seo, Liang, Purayath, and Yamazaki discloses, The method for dry-etching a semiconductor substrate according to claim 18, wherein the semiconductor substrate is a silicon semiconductor substrate and the oxide film is a silicon oxide film ([0046] of Liang—substrate may include a semiconductor substrate, such as a silicon wafer and [0060] of Hoon—oxide film (2) contains silicon).
Claims 27-30 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0214608 A1 (Shishido) in view of US2015/03225435 A1 (Hollister), “Determination of the Oxygen Content in Amorphous SiOx Thin Films”, Journal of Non-Crystalline Solids (518), A.O. Zamchiy et al., May 17, 2019, pages 43-50 (Zamchiy) and Hoon.
Regarding claim 27, Shishido discloses, A method for dry-etching ([0128]) a silicon oxide film (silicon oxide film (4); FIG. 1; [0107]; [0125]) to remove the silicon oxide film (4) on a surface of a silicon semiconductor substrate (semiconductor substrate (1); FIG. 1; [0107]; [0155]) by dry etching ([0128]), the method comprising:
providing a plurality of silicon semiconductor substrates (1) each having a silicon oxide film SiOx (4) having a different oxygen proportion (x) provided that 0 < x ≤ 2 ([0072]), and etching each silicon oxide film (4) ([0128]) of the plurality of silicon semiconductor substrates (1) under identical dry- etching conditions ([0141]), and determining a correlation between the index indicating the oxygen proportion (x) and etching rate ([0072]); and
dry-etching the silicon oxide film (4) of the silicon semiconductor substrate (1) to be etched ([0128]).
But, Applicant may argue that Shishido does not appear to explicitly disclose,
a silicon semiconductor substrate;
obtaining an index indicating the oxygen proportion (x) regarding each silicon oxide film of the plurality of silicon semiconductor substrates;
obtaining an index indicating the oxygen proportion (x) regarding a silicon oxide film on a silicon semiconductor substrate to be etched; and
determining an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film on the silicon semiconductor substrate to be etched and the correlation.
However, in analogous art, Hollister discloses, that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that: “The term ‘semiconductor substrate’ as used herein refers to substrates that include exposed or unexposed semiconductor materials (e.g., silicon wafers or chips)” (emphasis added) ([0032]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shishido and Hollister before him/her that the semiconductor substrate (1) of Shishido can be a silicon semiconductor substrate. Please see, MPEP 2144(I), above.
But, Applicant may argue that Shishido does not appear to explicitly disclose,
obtaining an index indicating the oxygen proportion (x) regarding each silicon oxide film of the plurality of silicon semiconductor substrates;
obtaining an index indicating the oxygen proportion (x) regarding a silicon oxide film on a silicon semiconductor substrate to be etched; and
determining an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film on the silicon semiconductor substrate to be etched and the correlation.
However, in analogous art, Zamchiy discloses, it is well known that a variety of methods can be predicably used to obtain an index indicating the oxygen proportion (x) in SiOx films (page 43, Introduction). Zamchiy also discloses that an index (x) between 0 < x < 2 has attracted increasing attention for both scientific and technological reasons (page 43, Introduction). Zamchiy additionally discloses that SiOx films have extensive applications in fields related to the fabrication of silicon-based semiconductor devices (page 43, Introduction).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shishido, Hollister, and Zamchiy before him/her that an index indicating the oxygen proportion (x) regarding each silicon oxide film (4) of the plurality of silicon semiconductor substrates (1) of Shishido and Hollister can predicably be obtain[ed], as taught by Zamchiy, and that obtaining an index indicating the oxygen proportion (x) regarding the silicon oxide film (4) on a silicon semiconductor substrate (1) of Shishido and Hollister would be useful in the fabrication of semiconductor devices, as also taught by Zamchiy, such as etch[ing] of oxide film (4) of Shishido and Hollister, because, as noted above, Shishido recognizes the correlation between etching rate and the index indicating the oxygen proportion (x) ([0072] of Shishido). See, e.g., MPEP 2143(A), above.
But, Applicant may argue that Shishido in view of Hollister and Zamchiy does not appear to explicitly disclose, determining an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film on the silicon semiconductor substrate to be etched and the correlation.
However, in analogous art, Hoon discloses, that an etching time can be determined based on a film quality and this determination helps minimize dimensional variations due to etching ([0051] and [0109]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Shishido, Hollister, Zamchiy, and Hoon before him/her that an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film (4) on the silicon semiconductor substrate (1) of Shishido, Hollister, and Zamchiy to be etched and the correlation and dry-etching the silicon oxide film (4) of the silicon semiconductor substrate (1) to be etched could be determin[ed], as taught by Hoon, because the index and the correlation are both film (4) qualities which are helpful to know in order to minimize dimensional variations during etching, as also disclosed by Hoon.
Regarding claim 28, Shishido in view of Hollister, Zamchiy, and Hoon disclose, The method for dry-etching a silicon oxide film according to claim 27, wherein the index indicating the oxygen proportion (x) is one or more selected from a density of SiO, measured by X-ray reflectometry, a peak wave number of an infrared absorption spectrum around a wave number of 1050 cm-1 obtained by a transmission FT-IR method, a proportion of suboxide SiOx to SiO2 measured by X-ray photoelectron spectroscopy, provided that 0 < x < 2, or a proportion of constituent elements of the silicon oxide film measured by Rutherford Backscattering Spectroscopy (page 43 , Introduction of Zamchiy).
Regarding claim 29, Shishido in view of Hollister, Zamchiy, and Hoon discloses, The method for dry-etching a silicon oxide film according to claim 27, wherein the silicon oxide film (4) is a natural oxide film due to storage in the atmosphere or a chemical oxide film due to cleaning (page 44, Section 2.1 of Zamchiy).
Regarding claim 30, Shishido in view of Hollister, Zamchiy, and Hoon discloses, The method for dry-etching a silicon oxide film according to claim 28, wherein the silicon oxide film (4) is a natural oxide film due to storage in the atmosphere or a chemical oxide film due to cleaning (page 44, Section 2.1 of Zamchiy).
Response to Amendment and Arguments
Applicant’s amendment of independent claims 11 and 27, dependent claims 19-26, and arguments on pages seven (7)–ten (10) of the “Amendment With Request For Continued Examination” filed on January 16, 2026 (hereinafter the “Reply”) with respect to the rejection of claims 10-30 under 35 U.S.C. 103 in the Final Office Action dated September 19, 2025 (hereinafter the “Final Office Action”) have been fully considered, but they are not persuasive, as indicated above and for at least the following reasons. For example, regarding amended independent claim 11, page seven (7) of the Reply states: “However, Hoon does not disclose or suggest about ‘semiconductor substrate’”. Also regarding amended independent claim 11, page seven (7) of the Reply states:
Hoon describes in paragraph [0055]: “As a transparent substrate 1, a flat, and smoothly polished transparent material made of quartz glass, etc is used.”
“Quartz glass” is not a semiconductor substrate. The invention of Hoon is “A method of manufacturing photomask”, so that it is not possible to make “a transparent substrate 1” as “a semiconductor substrate”.
The Examiner respectfully notes that paragraph [0055] of Hoon, quoted by the Reply on page seven (7) thereof, actually states that “substrate 1 is made of a transparent material such as quartz glass” (emphasis added), not that substrate 1 can only be made of quartz glass. The Examiner additionally respectfully notes that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that “a semiconductor substrate” can be a transparent material, as disclosed by Hoon. See, e.g., paragraph [0002] of US 2021/0305444 A1 (Seo) which states, in part: “The present invention relates to a transparent semiconductor substrate”. Also, it was well known to one of ordinary skill in the art before the effective filing date of the claimed invention that “there is a growing interest in the development of next-generation devices such as transparent electronic devices (for example, transparent semiconductors)” ([0004] of Seo). For at least these reasons, the Examiner respectfully submits that Hoon and/or the combination of Hoon in view of Seo does disclose “a semiconductor substrate”.
Also regarding amended independent claim 11 and in response to the Final Office Action, page eight (8) of the Reply states:
In reply, the Office’s conclusion is illogical. The Office illogically concludes that because there are known transparent semiconductor substrates, then Hoon’s transparent substrate, which may be made of a transparent semiconductor substrates, then Hoon’s transparent substrate, which may be made of a transparent material such as quartz glass, is a semiconductor substrate. Quartz glass has no known semiconductor properties nor is Hoon at all concerned with semiconductors.
The Examiner respectfully disagrees. Hoon contains disclosure that is related to semiconductors. For example, paragraph [0115] of Hoon states: “The present invention is advantageously applied as a photomask for use in a process for forming a semiconductor layer and a source/drain layer in a single exposure in a bottom gate type TFT using amorphous silicon or an oxide semiconductor.”
Additionally regarding amended independent claim 11, page seven (7) of the Reply states:
In addition, Hoon shows only that the etching of a first thin film and a second thin film of which film quality are known are performed for different times respectively, calculating the time for performing the etching of each film. Hoon does not disclose or suggest that “evaluating a film quality of the oxide film” and determining a time for performing the etching on a basis of results of the evaluation in advance.
The Examiner respectfully disagrees with this argument. As detailed above in this Office Action and a previously detailed in the Final Office Action and the Office Action dated May 28, 2025 (hereinafter the “Initial Office Action”), paragraphs [0051] and [0109] of Hoon are relied on for disclosing the steps of “evaluating a film quality ([0051] and [0109]) of the oxide film (2) and determining a time for performing the etching on a basis of results of the evaluation in advance ([0051] and [0109]) recited in amended independent claim 11. Paragraph [0051] of Hoon states: “In particular, if a single film is etched in each of the etching steps, the etching time can be calculated in advance based on the film quality”. The Examiner respectfully submits that at least this portion of paragraph [0051] of Hoon discloses the above-quoted limitations recited in amended independent claim 11. The Examiner respectfully notes that the Reply fails to address the above-quoted disclosure of paragraph [0051] of Hoon.
Further, regarding amended independent claim 11, pages seven (7)—eight (8) of the Reply state:
In addition, Hoon describes in paragraph [0016]: “Wet etching is applied as an etching method. This is because wet etching can be applied extremely advantageously to photomasks for producing display apparatus. This is because for photomasks for producing display apparatus, which have a relatively large area (e.g., 300 nm or more on each side) and there exist a variety of substrates of various sizes, wet etching is very advantageous in terms of its equipment and efficiency as compared to dry etching, which requires a vacuum apparatus.” As described above, Hoon has a negative teaching about applying dry etching. A person skilled in the art would not apply the dry etching process taught by Purayath in Hoon.
The Examiner respectfully disagrees with this argument. For example, [0016] is limited to the example of photomasks for producing display apparatus which have a relatively large area ([0016]—"In this case, wet etching is used as the etching method” (emphasis added)). There is nothing currently recited in amended independent claim 11 that limits it to dry-etching of photomasks with a relatively large area. Also, [0016] of Hoon doesn’t have “a negative teaching about applying dry-etching”; it only discloses that wet-etching is advantageous for photomasks with a relatively large area because dry-etching in such cases requires a vacuum. Additionally, the Examiner respectfully notes that paragraph [0114] of Hoon states: “there is no restriction on the use of the photomask of the present invention.”
The Examiner respectfully submits that a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to reach out to Purayath, as described above in this Office Action and as previously described in the Final Office Action and the Initial Office Action, for its teaching of a well-known method of predicably using dry-etching in Hoon to gently remove oxide film (2) with minimal physical disturbance and to allow the etch rate to be abruptly stopped. The Examiner also respectfully submits that Applicant’s Reply does not address the motivation for combining Hoon in view of Seo, Liang, and Purayath, as required. See, e.g., MPEP 2145(IV)—" One cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., Inc., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Where a rejection of a claim is based on two or more references, a reply that is limited to what a subset of the applied references teaches or fails to teach, or that fails to address the combined teaching of the applied references may be considered to be an argument that attacks the reference(s) individually.” "[T]he test for obviousness is what the combined teachings of the references would have suggested to [a PHOSITA]." In re Mouttet, 686 F.3d 1322, 1333, 103 USPQ2d 1219, 1226 (Fed. Cir. 2012).
Regarding amended independent claim 27, page nine (9) of the Reply states: “First, in paragraphs [0107]-[0108] of Shishido, various glass substrates as materials for a transparent substrate 1 are described. However, there is no description or suggestion about “a silicon semiconductor substrate”. The Examiner respectfully notes that paragraph [0155] of Shishido states: “At first, the substrate to be provided with the semiconductor device is prepared. The substrate may be, for example, a semiconductor substrate” (emphasis added). The Examiner also respectfully notes that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor substrate can be a silicon substrate as disclosed by Shishido. See, e.g., US 2015/0325435 A1 (Hollister) paragraph [0032] of which states, in part: “The term ‘semiconductor substrate’ as used herein refers to substrates that include exposed or unexposed semiconductor materials (e.g., silicon wafers or chips)” (emphasis added). For at least these reasons, the Examiner respectfully submits that Shishido does describe and/or suggest “providing a plurality of silicon substrates”, as recited in amended independent claim 27.
Also regarding amended independent claim 27, page nine (9) of the Reply states:
In addition, Shishido also describes that an etching rate varies depending on the content ratio of silicon and oxygen in hard masks and the ratio of Si-O bonds. However, details of how this relationship was found are not described nor suggested.
Therefore, it is neither disclosed nor suggested about "providing a plurality of silicon semiconductor substrates each having a silicon oxide film SiOx having a different oxygen proportion (x) provided that 0 <x≤2, obtaining an index indicating the oxygen proportion (x) regarding each silicon oxide film of the plurality of silicon semiconductor substrates and etching each silicon oxide film of the plurality of silicon semiconductor substrates under identical dry-etching conditions, and determining a correlation between the index indicating the oxygen proportion (x) and etching rate;
obtaining an index indicating the oxygen proportion (x) regarding a silicon oxide film on a silicon semiconductor substrate to be etched; and
determining an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film on the silicon semiconductor substrate to be etched and the correlation; and, dry-etching the silicon oxide film of the silicon semiconductor substrate to be etched".
The Examiner respectfully disagrees with this argument. For example, there is nothing recited in claim 27 that excludes the silicon oxide film from being a hard mask film Also, paragraph [0072] of Shishido discloses:
First it has been found out that, in a hard mask film made of a material containing silicon and oxygen, if a content ratio (atomic %) of silicon (Si) and oxygen (O) is Si:O=1: less than 2 (oxygen-deficient SiO2 film) <Condition 1>, an etching rate for a fluorine-based gas is high and the hard mask film can be etched rapidly and excellently, as compared with the case of Si:O=1:2 (SiO2 film which is not oxygen-deficient).
The Examiner respectfully submits, as indicated in this Office Action and previously indicated in the Final Office Action and the Initial Office Action, this quoted language of Shishido discloses the limitations of “each having a silicon oxide film SiOx having a different oxygen proportion (x) provided that 0 < x ≤ 2” and “determining a correlation between the index indicating the oxygen proportion (x) and the etching rate” recited in amended independent claim 27.
Additionally, Paragraph [0128] of Shishido discloses: “dry etching of the hard mask film 4.” The Examiner also respectfully submits, as indicated in this Office Action and previously indicated in the Final Office Action and the Initial Office Action, this quoted language of Shishido discloses the limitations of “etching each silicon oxide film of the plurality of silicon semiconductor substrates” and “dry-etching the silicon oxide film on the silicon semiconductor substrate to be etched” recited in amended independent claim 27.
Further, Paragraph [0141] of Shishido discloses: “the hard mask film 4 is dry etched using a fluorine-based gas”. The Examiner additionally respectfully submits, as indicated in this Office Action and previously indicated in the Final Office Action and the Initial Office Action, this quoted language of Shishido discloses the limitations of “under identical dry-etching conditions” recited in amended independent claim 27.
Additionally regarding amended independent claim 27, page ten (10) of the Reply states: “Zamchiy enumerates methods only for obtaining an index of the oxygen content (x) in the SiOx thin film.” The Examiner also respectfully disagrees with this argument and submits that a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to reach out to Zamchiy, as described above in this Office Action and as previously described in the Final Office Action and the Initial Office Action, for its teaching of a well-known method of predicably “obtaining an index indicating the oxygen proportion (x) regarding a silicon oxide film on a silicon substrate to be etched”. The Examiner further respectfully submits that Applicant’s Reply does not address the motivation for combining Shishido in view of Hollister and Zamchiy, as required. See, e.g., MPEP 2145(IV), above.
Further regarding amended independent claim 27, page ten (10) of the Reply states: “In addition, as described above, Hoon shows only that the etching of a first thin film and a second thin film of which film quality are known are performed for different times respectfully, calculating the time for performing the etching of each film.” The Examiner additionally respectfully disagrees with this argument. The Examiner respectfully submits that a person of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to reach out to Hoon, as described above in this Office Action and as previously described in the Final Office Action and Initial Office Action, for its teaching of a well-known method of predicably “determining an etching time based on the index indicating the oxygen proportion (x) of the silicon oxide film on the silicon substrate to be etched and the correlation, as recited in amended independent claim 27, because the index and the correlation are both film (4) qualities which are helpful to know in order to minimize dimensional variations during etching, as disclosed by Hoon. The Examiner also respectfully submits that Applicant’s Reply does not address the motivation for combining Shishido, Hollister, and Zamchiy in view of Hoon, as required. See, e.g., MPEP 2145(IV), above.
Still further regarding amended independent claim 27, page ten of the Reply states:
In reply, while Shishido is concerned with semiconductors, the transparent substrate for Shishido's mask blank is not a semiconductor. Shishido discloses at paragraph [0109]:
The transparent substrate 1 is made of a material excellent in transmissivity for exposure light used in an exposure process in lithography. As the material of the type, synthetic quartz glass, aluminosilicate glass, soda lime glass, low-thermal- expansion glass (SiO2-TiO2 glass or the like), and other various types of glass substrates may be used. In particular, a substrate using synthetic quartz glass has a high transmissivity for ArF excimer laser light (having a wavelength of about 193 nm) and, therefore, may suitably be used as the transparent substrate 1 of the mask blank 100.
The Examiner respectfully disagrees at least because paragraph [0155] of Shishido provides that: “The substrate may be, for example, a semiconductor substrate”. Also, as noted above in this Office Action, Seo discloses that it was well-known to one of ordinary skill in the art before the effective filing date of the claimed invention that a semiconductor substrate can be a transparent material ([0002]). Seo also discloses that “there is a growing interest in the development of next-generation devices such as transparent electronic devices (for example, transparent semiconductors)” ([0004]).
Finally, page ten (10) of the Reply states:
In the Advisory Action, for the first time, the Office cites WO2020111422A1 (Seo) as disclosing that a semiconductor substrate can be a transparent material. Even if true, it is irrelevant herein. In any event, However, the opaque semiconductor substrate of Seo has some transparency only because through-holes are formed therein.
There would have been no motivation to combine the material of the "photomask" disclosed in Hoon or the material of the "mask blank" disclosed in Shishido with the opaque semiconductor substrate having transparent through-holes disclosed in Seo.
The Examiner respectfully disagrees at least because, as indicated above in this Office Action, Seo indicates that these is a motivation to combine Hoon and Seo, because “there is a growing interest in the development of next-generation devices such as transparent electronic devices (for example, transparent semiconductors)” ([0004] of Seo). The Examiner respectfully submits that the same motivation to combine Shishido and Seo would apply.
Notwithstanding the above, to advance prosecution, the Examiner respectfully requests that Applicant please consider a telephone interview with the Examiner to discuss proposed claim amendments to at least independent claims 11 and 27 to overcome the rejection of claims 11-30 under 35 U.S.C. 103 prior to submitting a written response to this Office Action. The Examiner would welcome such a proposed discussion of these claim amendments and is available at the number provided below.
Conclusion
Any inquiry concerning this communication or earlier communications from the Examiner should be directed to Erik A. Anderson whose telephone number is (703) 756-1217. The Examiner can normally be reached Monday-Friday 8:30 a.m.-4:30 p.m. (Pacific Time Zone).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, William B. Partridge, can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/ERIK A. ANDERSON/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
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