Prosecution Insights
Last updated: April 19, 2026
Application No. 17/926,505

LIGHT EMITTING DEVICE ARRAY

Non-Final OA §103
Filed
Nov 18, 2022
Examiner
YEMELYANOV, DMITRIY
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Plessey Semiconductors Limited
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
92%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
393 granted / 538 resolved
+5.0% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
43 currently pending
Career history
581
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
52.4%
+12.4% vs TC avg
§102
23.2%
-16.8% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 538 resolved cases

Office Action

§103
CTNF 17/926,505 CTNF 87644 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions 08-25-02 Applicant’s election of Group II, Species A, Sub-Species AA (Fig. 8, Claims 16-21, 24 and 25) in the reply filed on 10/16/2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). 08-06 AIA Claim 1-15, 22-23 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group and/or Species , there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/16/2025 Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “forming a light emitting stack on a substrate surface of a substrate , the light emitting stack having a light emitting surface orientated towards the substrate surface ” “a first semiconducting layer provided towards the substrate surface” and “ removing the substrate from the light emitting stack” of Claim 1 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. 06-22 Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections 07-29-01 AIA Claims 17-21, 24 and 25 o bjected to because of the following informalities: D ependent Claims 17-21, 24 and 25 recite “ A method according to” instead of --The method according to— . Appropriate correction is required. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 16-20, 24 and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson et al. (US 2011/0156616 A1) in view of Han (US 2016/0197151) . Regarding Claim 16, Anderson (Fig. 3, 4) discloses a method of forming a light emitting device array comprising: forming a light emitting stack (430, 420, 410) on a substrate surface of a substrate (480), the light emitting stack (430, 420, 410) having a light emitting surface (surface closer to 430) orientated towards the substrate surface (480) and a contact surface on an opposing side of the light emitting stack (430, 420, 410), forming the light emitting stack (430, 420, 410) comprising forming a plurality of Group III-nitride layers (430, 420, 410) including: a first semiconducting layer (n-doped layer 430) provided towards the substrate surface (480); a second semiconducting layer (p-doped layer 410) provided towards a contact surface (surface closer to 410) of the light emitting stack (430, 420, 410); and an active layer (quantum well layer 420) provided between the first semiconducting layer (430) and the second semiconducting layer (410), the active layer configured to generate light having a first wavelength (“Alternating the two materials in, e.g. a multiple quantum well, creates a bandgap corresponding to a particular emission wavelength” [0042-0044]; wherein the light emitting surface and the contact surface of the light emitting stack (430, 420, 410) are formed parallel to each other and aligned with the plurality of Group III-nitride layers (430, 420, 410) (Fig. 4); forming an array of second electrical contacts (individually addressable electrodes 440) on the contact surface of the light emitting stack (surface closer to 410), each second electrical contact (440) defining a light emitting device (“electrically pixelated luminescent devices “, “spatial control of the light output by electrical pixelation”) [0027-0028, 0064, 0090-0092] between the first semiconducting layer (430) and the second electrical contact (440), wherein each of the second electrical contacts (440) are spaced apart from the other second electrical contacts to form a two-dimensional array of the light emitting devices (“electrically pixelated luminescent devices”); removing the substrate (480) from the light emitting stack [0080]; forming a first electrical contact layer (450) on the light emitting stack (430, 420, 410), the first contact layer (430) configured to be in electrical contact with the first semiconducting layer (450); and Anderson does not explicitly disclose forming an anti-reflection layer on the light emitting surface, the anti-reflection layer configured to increase a light extraction efficiency of light generated by the light emitting device layer. Han (Fig. 11) discloses forming an anti-reflection layer (“nanoporous GaN”) on a light emitting surface, the anti-reflection layer (“nanoporous GaN”) configured to increase a light extraction efficiency of light generated by the light emitting device layer. (“This index difference and the scattering nature of the porous structure can improve the extraction efficiency of light from a light-emitting device.”) [0061] It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a method of forming a light emitting device in Anderson in view of Han such that an anti-reflection layer on the light emitting surface, the anti-reflection layer configured to increase a light extraction efficiency of light generated by the light emitting device layer in order to improve the extraction efficiency of light from a light-emitting device. [0061] Regarding Claim 17, Anderson in view of Han discloses a method according to claim 16, further comprising forming an absorbing layer (“light blocking elements placed between each specific light emission region of continuous light emitter layer.” And “mask may be positioned over all or part of the top surface of the EPLD in order to selectively absorb”) on at least a portion of the light emitting stack, the absorbing configured to absorb light of the first wavelength generated by the active layer. [0101 and Claim 24 Anderson] Regarding Claim 18, Anderson in view of Han discloses the method according to claim 16, wherein forming the anti-reflection layer (“nanoporous GaN” Han) comprises: forming a third semiconducting layer comprising a Group III-nitride (GaN) and a donor density of at least 1 × 10.sup.18 cm.sup.-3 on the light emitting surface (“doping density between approximately 5×10.sup.18 cm.sup.−3 and approximately 2×10.sup.20 cm.sup.−3 [0032-0034 Han]; and subjecting the third semiconducting layer (GaN) to a porosity treatment process to increase an areal porosity of the third semiconducting layer (GaN) to at least 30%. (“porosity of 40%”) [0042, 0047, 0048, 0050 Han] Regarding Claim 19, Anderson in view of Han discloses a method according to claim 16, wherein a pitch of each second electrical contact formed in the light emitting device array. (“the individually addressable electrodes are separated by a pixel pitch of 10 .mu.m or less.”) [0100, Claim 18] Anderson further discloses that optimizing pitch of each second electrical contact formed in the light emitting device array the individually addressable electrodes be separated by a desired pixel pitch. (“The pixel pitch may also be varied according to placement of the electrodes in a manner that is desired for the end use”).[0100] Anderson in view of Han does not explicitly disclose a pitch of each second electrical contact formed in the light emitting device array is no greater than 5 µm, or 2 µm. Therefore, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a method of forming a light emitting device in Anderson in view of Han such that an anti-reflection layer on the light emitting surface, the anti-reflection layer configured to increase a light extraction efficiency of light generated by the light emitting device layer in order to optimize a pitch of each second electrical contact formed in the light emitting device array to be no greater than 5 µm, or 2 µm for direct-viewing or illumination systems [0100, Claim 18] and since it has been held that the general conditions of a claim are disclosed in a prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller , 105 USPQ 233 and since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 276 (CCPA 1980). Regarding Claim 20, Anderson in view of Han discloses a method according to claim 16, wherein forming the first electrical contact layer comprises forming a transparent conductive oxide on the light emitting surface (“a transparent conductor, e.g., Indium Tin Oxide (ITO)” [0085 Anderson]. Regarding Claim 24, Anderson in view of Han discloses a method according to claim 16, wherein forming the first semiconducting layer comprises a forming n-type doped Group III-nitride (“n-doped layer 430” 0075); and/or forming the second semiconducting layer comprises forming a p-type doped Group III-nitride (“ p-doped layer 410”) [0079] ; and/or forming the active layer comprises forming multiple quantum well layers comprising Group III-nitrides. (quantum well layer 420 (“single or double quantum well)” [0076] Regarding Claim 25, Anderson in view of Han discloses a method according to claim 16, wherein the active layer (quantum well layer 420) is formed as a continuous layer extending between at least two adjacent light emitting devices of the light emitting device array. (See Fig. 4) 07-21-aia AIA Claim (s) 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson et al. (US 2011/0156616 A1) in view of Han (US 2016/0197151) and further in view of Yuri (US 2005/0161696 A1) . Regarding Claim 21, Anderson in view of Han discloses a method according to claim 20, wherein the anti-reflection layer (“nanoporous GaN” Han) is formed on the light emitting surface (Han) Anderson in view of Han does not explicitly disclose followed by forming the first electrical contact layer on the anti-reflection layer Yuri (Fig. 11, 12, 13) discloses forming an anti-reflection layer (porous structure 9) is formed on an light emitting surface (2) followed by forming a first electrical contact layer (transparent conductive film (transparent electrode) 13) on the anti-reflection layer. (9) [0115-0117] It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a method of forming a light emitting device in Anderson in view of Han and Yuri such that the anti-reflection layer (is formed on the light emitting surface followed by forming the first electrical contact layer on the anti-reflection layer so that the reliability of the device is improved more greatly and the efficiency of light emission of the device can be still further improved. [0116] Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DMITRIY YEMELYANOV/Examiner, Art Unit 2891 Application/Control Number: 17/926,505 Page 2 Art Unit: 2891 Application/Control Number: 17/926,505 Page 3 Art Unit: 2891 Application/Control Number: 17/926,505 Page 4 Art Unit: 2891 Application/Control Number: 17/926,505 Page 5 Art Unit: 2891 Application/Control Number: 17/926,505 Page 6 Art Unit: 2891 Application/Control Number: 17/926,505 Page 7 Art Unit: 2891 Application/Control Number: 17/926,505 Page 8 Art Unit: 2891 Application/Control Number: 17/926,505 Page 9 Art Unit: 2891 Application/Control Number: 17/926,505 Page 10 Art Unit: 2891
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Prosecution Timeline

Nov 18, 2022
Application Filed
Dec 13, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
92%
With Interview (+18.7%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 538 resolved cases by this examiner. Grant probability derived from career allow rate.

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