Prosecution Insights
Last updated: April 19, 2026
Application No. 17/927,601

ENCAPSULATION TECHNIQUES

Final Rejection §102§103§DP
Filed
Nov 23, 2022
Examiner
GUMEDZOE, PENIEL M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Elta Systems Ltd.
OA Round
2 (Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
2y 4m
To Grant
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
1080 granted / 1302 resolved
+14.9% vs TC avg
Minimal +4% lift
Without
With
+3.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
1325
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
40.7%
+0.7% vs TC avg
§102
31.3%
-8.7% vs TC avg
§112
25.2%
-14.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1302 resolved cases

Office Action

§102 §103 §DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant’s amendment filed on 12/22/25 is acknowledged and papers submitted have been placed in the records. Claim Objections Claims 21-22 are objected to because of the following informalities: claim 21 is dependent on claim 20 which has been canceled, so, the dependency must be changed. The expression “of any one” must be deleted from the first lines of claims 30 and 31. Appropriate correction is required. Double Patenting Claim 29 is objected to under 37 CFR 1.75 as being a substantial duplicate of claim 30. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 4-5, 11-13 and 29-31 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Sherrer et al. (US 2012/0067871, cited on IDS and previously used). a. Re claim 1, Sherrer et al. disclose an integrated circuit (IC) assembly, comprising: an IC substrate (substrate of component 85; see fig. 2 and related text; see [0012] and remaining of disclosure for more details) having one or more micro-devices (the micro devices are not shown, but [0021] discloses that the microwave devices in the invention and which are implicitly components 85 on fig. 2, comprises transistors, which would be the micro devices, formed in in silicon, which would be the IC substrate of component 85; in the alternative, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided components 85 as the microwave devices disclosed in [0021] and structurally pointed out above, and this as a non-inventive step of provided such devices as intended by the invention to obtain a microwave device assembly; see at least [0003]); at least one dielectric matrix element 65 ([0012], [0028]-[0032]) placed on said IC substrate over at least one of its one or more micro-devices (explicit on fig. 2 noting that anything formed over 85 is over anything formed in 85); and an encapsulation element 115&70 ([0012]) applied over said IC substrate and said at least one dielectric matrix element placed thereon to enclose and seal said IC substrate; at least one spacer element 60 (or 60&55; [0012]) placed on the at least one dielectric matrix element for partitioning between said at least one dielectric matrix element and the encapsulation element (explicit on fig. 2), “and the at least one spacer element is a detached portion removed from an aligning element configured to accurately place the at least one dielectric matrix element on the IC substrate” (see remarks below for the quoted product-by-process limitation). The Examiner notes that the process limitations of “and the at least one spacer element is a detached portion removed from an aligning element configured to accurately place the at least one dielectric matrix element on the IC substrate” found in product claim(s) 3 invoke the product-by-process doctrine. Product-by-process claims are not limited to the manipulations of the recited steps, only the structure implied by the steps (MPEP § 2113). For example, anticipation of claim 3 does not require the at least one spacer element be a detached portion removed from an aligning element configured to accurately place the at least one dielectric matrix element on the IC substrate. All that underlined product-by-process limitation is calling for is a piece of material that serves as a spacer regardless of how it was obtained as there is nothing recited as structural characteristic to structurally distinguish the claimed spacer from spacer 60 Sherrer et al. ‘871. b. Re claim 4, [0037] states “Next a 0.5 mm thick electronics grade silicone may be applied directly to the syntactic foam and baked” and [0034] states that the microwave (thus RF) absorbing material can be made of silicone, and it can inferred from those statements that layer 60, which is directly formed on the syntactic foam layer 65, is implicitly the layer being mentioned in the quote above and has a thickness of 0.5mm. However, it would have been obvious to one skilled in the before the effective filing date of the invention to have reduced such a thickness down to 0.3mm or to a value falling in the range of 0.1-0.3mm, and this in order minimize the height profile of the package on fig. 2 (thus obtaining a slimmer and lighter package) while also saving cost by using less material of layer 60 (see MPEP 2144.I&II). c. Re claim 5, the at least one dielectric matrix element is made of at least one of: a thin film (65 is a thin film) or foil, a breathable material (65 has hollow portions as per [0029] and therefore is breathable), a permeable material (65 has hollow portions as per [0029] and therefore is permeable), a cellular material (65 has hollow portions as per [0029] and therefore is a cellular material wherein the cells are the hollow portions), or a fibrous material. d. Re claim 11, the encapsulation element comprises plastic or resin mold. e. Re claim 12, the IC assembly of claim 1, further comprises a circuit board 75 ([0012]) electrically coupled to the IC substrate and its one or more micro-devices (even if the electrical coupling between component 85 and circuit board 75 is not explicitly disclosed, it is implicit that it must exists in order for the electronic components to be electrically integrated to circuit board 75; see for example [0037] where wirebonds are mentioned in combination with devices (MMICs) and printed wiring board (PWB), or [0011] that describes wirebonds interconnecting a device with wiring layers of a wiring substrate; in the alternative, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the components 85, thus the IC substrate and its one or more micro-devices, to be electrically coupled to the circuit board 75 through at least wirebonds in order to electrically integrate the said components 85 with the circuit board 75 as conventionally done in the art; see MPEP 2143.E&G). f. Re claim 13, the IC assembly of claim 12, further comprises one or more electrical conductors 90 ([0012]) electrically coupled to the circuit board and extending through the encapsulation element ([0012] discloses that 70 is formed around 90, and that implicitly means that 90 extend through 70, thus through encapsulation element 115&70) to provide electrical connectivity to said circuit board. g. Re claims 29, 30 and 31, see claim 5 rejection above. Allowable Subject Matter Claims 14-16 are allowed. Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 17-18 are allowable but are indicated as objected to, pending the resolution of the improper dependency issue of claim 21 which, it is believed, should have normally be made dependent on claim 17 since claim 20 was canceled. Response to Arguments Applicant's arguments filed 12/22/25 have been fully considered but they are not persuasive with respect to the product-by-process doctrine. The way the spacer element is characterized by the process used to obtain it does not make the claim recite anything structurally distinguishing over the spacer 60 of Sherrer et al. ‘871. The structural element called for by the claim is a piece of material that acts as a spacer regardless of if it was cut or detached from a carrier or discretely produced (i.e. produced as a single piece of material) or detached from an aligning element (as Applicants are claiming). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Nov 23, 2022
Application Filed
Nov 28, 2022
Response after Non-Final Action
Sep 20, 2025
Non-Final Rejection — §102, §103, §DP
Dec 22, 2025
Response Filed
Jan 22, 2026
Final Rejection — §102, §103, §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604736
SHIELD TO REDUCE SUBSTRATE ELECTROMAGNETIC INTERFERENCE AND WARPAGE
2y 5m to grant Granted Apr 14, 2026
Patent 12593394
HEAT TRANSFER FROM NON-GROUNDABLE ELECTRONIC COMPONENTS
2y 5m to grant Granted Mar 31, 2026
Patent 12593698
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Mar 31, 2026
Patent 12593581
DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12593673
SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+3.7%)
2y 4m
Median Time to Grant
Moderate
PTA Risk
Based on 1302 resolved cases by this examiner. Grant probability derived from career allow rate.

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