DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claims presented have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Lin et al. (US8445990B2).
Regarding claim 1, Fig.1 of Degani teaches a teaches a dual sided molded package comprising:
a substrate 200 (col.3, lines 40-41) having a first side and an opposite second side;
a plurality of pads 221/222/223/224 (col.6, lines 19 and 33) attached to the second side of the substrate 200 and including one or more first pads 221/224 (col.6, line 19) having a first width (see annotated Fig.1) and one or more second pads 222/223 (col.6, line 33) having a second width (see annotated Fig.1) that is smaller than the first width; and
a plurality of electrically conductive interconnect members 201/202/203/204 (col.6, line 46) attached to the plurality of pads 221/222/223/224 and including one or more first interconnect members 201/204 (col.6, line 46) attached to the one or more first pads 221/224 and having a third width (wherein third width is equal to second width W2) and one or more second interconnect members 202/203 (col.6, line 46) attached to the one or more second pads 222/223 and having a fourth width (see annotated Fig.1), the third width being smaller than the first width and the fourth width being substantially equal to the second width (see annotated Fig.1).
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Degani does not teach wherein the one or more first interconnect members positioned with respect to the one or more first pads such that, at a connection interface between each of the first pads and each of the corresponding first interconnect members, on opposing sides of the corresponding first interconnect member, the first pad extends beyond the first interconnect member.
Fig.4K of Lin, col.9, lines 12-13, of Lin teaches a semiconductor die has bumps formed over an active surface of the semiconductor die; wherein an electrically conductive bump material is deposited over the exposed conductive layer 166a, 166c, and 166h and wherein conductive layer 166a extends beyond bumps 170 on the opposing sides of bump 170.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the conductive layer 166a of Lin, which extends beyond bump 170 at the interface, in the teachings of Degani because it provides more surface area which can accommodate bump 170 when it is reflowed the second time to improve electrical contact and it can also enable bump 170 to be compression bonded to conductive layer 166 (col.9, lines 23-26).
Regarding claim 2, Degani further teaches the dual sided molded package of claim 1 wherein the third width is substantially equal to the fourth width (wherein third and fourth widths are equal to second width W2).
Regarding claim 3, Degani further teaches the dual sided molded package of claim 1 further comprising a shielded package 300 (col.3, line 43) attached to or formed on the first side of the substrate 200 (col.3, lines 40-41).
Regarding claim 21, Fig.1 of Degani teaches a dual sided molded package comprising:
a substrate 200 (col.3, lines 40-41) having a first side and an opposite second side;
a plurality of pads 221/222/223/224 (col.6, lines 19 and 33) attached to the second side of the substrate 200 and including one or more first pads 221/224 (col.6, line 19) having a first width (see annotated Fig.1) and one or more second pads 222/223 (col.6, line 33) having a second width (see annotated Fig.1) that is smaller than the first width; and
a plurality of electrically conductive interconnect members 201/202/203/204 (col.6, line 46) attached to the plurality of pads 221/222/223/224 and including one or more first interconnect members 201/204 (col.6, line 46) attached to the one or more first pads 221/224 and having a third width (see annotated Fig.1) and one or more second interconnect members 202/203 (col.6, line 46) attached to the one or more second pads 222/223 and having a fourth width (see annotated Fig.1), the third width being substantially equal to the first width and the fourth width being substantially equal to the second width (see annotated Fig.1).
Degani does not teach wherein the one or more first interconnect members positioned with respect to the one or more first pads such that, at a connection interface between each of the first pads and each of the corresponding first interconnect members, on opposing sides of the corresponding first interconnect member, the first pad extends beyond the first interconnect member.
Fig.4K of Lin, col.9, lines 12-13, of Lin teaches a semiconductor die has bumps formed over an active surface of the semiconductor die; wherein an electrically conductive bump material is deposited over the exposed conductive layer 166a, 166c, and 166h and wherein conductive layer 166a extends beyond bumps 170 on the opposing sides of bump 170.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the conductive layer 166a of Lin, which extends beyond bump 170 at the interface, in the teachings of Degani because it provides more surface area which can accommodate bump 170 when it is reflowed the second time to improve electrical contact and it can also enable bump 170 to be compression bonded to conductive layer 166 (col.9, lines 23-26).
Regarding claim 22, Degani further teaches the dual sided molded package of claim 21 wherein the third width is substantially equal to the fourth width (see annotated Fig.1).
Regarding claim 23, Degani further teaches the dual sided molded package of claim 21 further comprising a shielded package 300 (col.3, line 43) attached to or formed on the first side of the substrate 200 (col.3, lines 40-41).
Claims 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Lin et al. (US8445990B2) and in further view of Chen et al. (US20180096951A1).
Regarding claim 4, the combination of Degani and Lin does not teach wherein dual sided molded package of claim 3 further comprising a second package attached to or formed on the second side of the substrate and disposed between two or more of the plurality of interconnect members.
Fig. 17 of Chen teaches a dual-sided package 100 with a semiconductor die 104 that is mounted under a packaging substrate 402; the semiconductor die 104 can be a die having one or more LNAs and one or more switches (para.0156).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to include the semiconductor die of Chen in
the teachings of Degani, as modified by Lin, in order to provide more RF amplifiers, low-noise amplifiers
(LNAs) and switches which can be configured to facilitate transmission and reception of RF signals (Chen, [para.0155]).
Regarding claim 5, Chen further teaches the dual sided molded package of
claim 4 wherein the second package 104 (para.0155) is overmolded.
Regarding claim 6, the combination of Degani and Lin does not teach wherein the substrate has a square or rectangular shape in plan view, the first pads located at or proximate one or more
corners of the substrate.
Fig.6B of Chen teaches a dual-sided package 100 with a shielded package 102;
shielded package 102 has inner and outer rows of solder balls 106a and 106b which
form a full perimeter on the underside of the shielded package 102 (para.0087).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to include the inner and outer rows of solder
balls that form full perimeter, as taught by Chen, in order to provide shielding
functionality (Chen, [para.0087]).
Claims 7 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Lin et al. (US8445990B2) and in further view of Kuo et al. (US20190348379A1).
Regarding claim 7, the combination of Degani and Lin does not teach wherein the pads have a square shape in plan view.
Fig. 1C of Kuo discloses wherein chip 101 is inverted to bring the solder dots
down onto connectors (e.g., connector pad 105) on the underlying electronics or circuit
board 104; wherein connector pads 105 have square shapes (para.0003).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to have the pads of Degani be square as
taught by Kuo because a pad having a square shape is known to be receptive to solder
(Kuo, para.0002) and mere changes not affecting the function is known to be obvious
(MPEP 2144.04(IV)(B); see also In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA
1966)).
Regarding claim 25, the combination of Degani and Lin does not teach wherein the pads have a square
shape in plan view.
Fig. 1C of Kuo discloses wherein chip 101 is inverted to bring the solder dots
down onto connectors (e.g., connector pad 105) on the underlying electronics or circuit
board 104; wherein connector pads 105 have square shapes (para.0003).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to have the pads of Degani be square as
taught by Kuo because a pad having a square shape is known to be receptive to solder
(Kuo, para.0002) and mere changes not affecting the function is known to be obvious
(MPEP 2144.04(IV)(B); see also In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA
1966)).
Claims 8-13 are rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Chen et al. (US20180096951A1) and in further view of Lin et al. (US8445990B2).
Regarding claim 8, annotated Fig.1 of Degani teaches a wireless device comprising:
a circuit 100 (col.6, line 28) board having a plurality of metal pads 101/102/103/104 (col.6, line 38) with a uniform surface area; and
a dual sided molded package mounted on the circuit board 100, the dual sided molded package including a substrate 200 (col.3, lines 40-41) having a first side and an opposite second side, a plurality of pads 221/222/223/224 (col.6, lines 19 and 33) attached to the second side of the substrate 200 and including one or more first pads 221/224 (col.6, line 19) having a first width (see annotated Fig.1) and one or more second pads 222/223 (col.6, line 33) having a second width (see annotated Fig.1) that is smaller than the first width, and a plurality of electrically conductive interconnect members 201/202/203/204 (col.6, line 46) attached to the plurality of pads 221/222/223/224 and including one or more first interconnect members 201/204 (col.6, line 46) attached to the one or more first pads 221/224 and having a third width (wherein third width is equal to second width W2) and one or more second interconnect members 202/203 (col.6, line 46) attached to the one or more second pads 222/223 (col.6, line 33) and having a fourth width (see annotated Fig.1), the third width being smaller than the first width and the fourth width being substantially equal to the second width (see annotated Fig.1), the first interconnect members 201/204 and the second interconnect members 202/203 being connected to the plurality of metal pads 101/102/103/104 of the circuit board 100.
Degani does not teach wherein the third width and the fourth width being substantially equal to the uniform surface area of the plurality of metal pads.
Fig.2 of Chen teaches a dual-sided package 100 that is attached to circuit board 110 using the solder ball 106. The solder ball 106 may be attached to the circuit board 110 (e.g., may be installed, mounted, fixed, etc., to the circuit board 110) via connection 116. As illustrated in the close-up view of the solder ball 106, the connection 116 may include solder material 121 and pad 119; wherein the width of pad 119 is substantially equal to the uniform surface area of solder ball 106 (para.0068).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to include the pad of Chen, which has the
same width as the solder ball, in the teachings of Degani in order to uniformly hold the
solder material 121 that is melted from the solder ball 106 the pad 119 when the dual-sided package 100 is attached to the circuit board (Chen, [para.0068]).
However, Degani, as modified by Chen, does not expressly disclose wherein the one or more first interconnect members positioned with respect to the one or more first pads such that, at a connection interface between each of the first pads and each of the corresponding first interconnect members, on opposing sides of the corresponding first interconnect member, the first pad extends beyond the first interconnect member.
Fig.4K Lin, col.9, lines 12-13, of Lin teaches a semiconductor die has bumps formed over an active surface of the semiconductor die; wherein an electrically conductive bump material is deposited over the exposed conductive layer 166a, 166c, and 166h and wherein conductive layer 166a extends beyond bump 170 on the opposing sides of bump 170.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include the conductive layer 166a of Lin, which extends beyond bump 170 at the interface, in the teachings of Degani, as modified by Chen, because it provides more surface area which can accommodate bump 170 when it is reflowed the second time to improve electrical contact and it can also enable bump 170 to be compression bonded to conductive layer 166 (col.9, lines 23-26).
Regarding claim 9, Degani further teaches the wireless device of claim 8
wherein the third width is substantially equal to the fourth width (wherein third and fourth
widths are equal to second width W2).
Regarding claim 10, Degani further teaches the wireless device of claim 8
further comprising a shielded package 300 (col.3, line 3) attached to or formed on the
first side of the substrate 200 (col.3, lines 40-41).
Regarding claim 11, Degani does not teach wherein the wireless device of claim
10 further comprising a second package attached to or formed on the second side of
the substrate and disposed between two or more of the plurality of interconnect members.
Fig.17 of Chen teaches a dual-sided package 100 with a semiconductor die 104
that is mounted under a packaging substrate 402; the semiconductor die 104 can be a
die having one or more LNAs and one or more switches (para.0156).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to include the semiconductor die of Chen in
the teachings of Degani in order to provide more RF amplifiers, low-noise amplifiers
(LNAs) and switches which can be configured to facilitate transmission and reception of
RF signals (Chen, [para.0155]).
Regarding claim 12, Chen further teaches the wireless device of claim 11
wherein the second package 104 (para.0155) is overmolded.
Regarding claim 13, Degani does not teach wherein the substrate has a
square or rectangular shape in plan view, the first pads located at or proximate one or
more corners of the substrate.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Chen et al. (US20180096951A1) and in further view of Kuo et al. (US20190348379A1).
Regarding claim 14, the combination of Degani and Chen does not teach
wherein the pads have a square shape in plan view.
Fig. 1C of Kuo discloses wherein chip 101 is inverted to bring the solder dots
down onto connectors (e.g., connector pad 105) on the underlying electronics or circuit
board 104; wherein connector pads 105 have square shapes (para.0003).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to have the pads of Degani, as modified by
Chen, be square as taught by Kuo because a pad having a square shape is known to
be receptive to solder (Kuo, para.0002) and mere changes not affecting the function is
known to be obvious (MPEP 2144.04(IV)(B); see also In re Dailey, 357 F.2d 669, 149
USPQ 47 (CCPA 1966)).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Degani et al. (US5473512A) in view of Chen et al. (US20180096951A1).
Regarding claim 24, Degani does not teach wherein the substrate has a square
or rectangular shape in plan view, the first pads located at or proximate one or more
corners of the substrate.
Fig.6B of Chen teaches a dual-sided package 100 with a shielded package 102;
shielded package 102 has inner and outer rows of solder balls 106a and 106b which
form a full perimeter on the underside of the shielded package 102 (para.0087).
It would have been obvious to one of ordinary skill in the art before the
effective filing date of the claimed invention to include the inner and outer rows of solder
balls that form full perimeter, as taught by Chen, in order to provide shielding
functionality (Chen, [para.0087]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT KIPKEMOI RONO whose telephone number is (571)270-5977. The examiner can normally be reached Mon-Fri, 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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VINCENT KIPKEMOI. RONO
Examiner
Art Unit 2891
/V.K.R./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891
Prosecution Insights