DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I (semiconductor device), reflected in claims 1-16 in the reply filed on 12/22/2025 is acknowledged. Claims 17-20 are withdrawn from further consideration pursuant to 37 CFR 1.142 (b), as being drawn to the nonelected group.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore elements, ‘a via’ cited in claim 11, must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 11 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 11 recites the limitation ‘a bottom dielectric isolation’ in line 3 and ‘the bottom dielectric isolation layer’ in line 5. There is insufficient antecedent basis for this limitation in the claim.
For examination purpose, the limitataion ‘a bottom dielectric isolation’ in line 3 will be replaced by ‘a bottom dielectric isolation layer’.
As claims 12-20 depend on the above rejected claim 11, they are also being rejected on the same reason.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xie et al. (US 20210391222 A1, hereinafter Xie‘222).
Regarding independent claim 1, Xie‘222 teaches, “A microelectronic structure (fig. 1-17; ¶ [0030] - ¶ [0066]) comprising:
a first nano device (fig. 17), wherein the first nano device includes a plurality of transistors (PFET, NFET);
a bottom dielectric isolation layer (702) located on a backside of each of the plurality of transistors of the first nano device; and
a separating dielectric layer (BOX layer of SOI wafer 202, ¶ [0031]) located on a backside of the bottom dielectric isolation layer (702), wherein the separating dielectric layer is a continuous layer on the backside of each of the plurality of transistors of the first nano device”.
Claims 11 and 12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Smith et al. (US 20230036597 A1, hereinafter Smith‘597).
Regarding independent claim 11, Smith‘597 teaches, “A microelectronic structure (fig. 1-52; ¶ [0029] - ¶ [0115]) comprising:
a nano device comprising a plurality of transistors (NMOS, PMOS, in fig. 1);
a bottom dielectric isolation layer (1610, 2210, fig. 16) located on a backside of each of the plurality of transistors of the nano device;
a separating dielectric layer (712, ‘silicon oxide’, fig. 7, ¶ [0090]) located on a backside of the bottom dielectric isolation layer,
wherein the separating dielectric (712) layer is a continuous layer on the backside of each of the plurality of transistors of the nano device;
a contact (2650, 3510, 3110, fig. 37) connected to a frontside surface of a source/drain of one of the transistors (NMOS),
wherein the contact includes a via (3110, fig. 37) that extends to the backside of the nano device (bottom side);
a shallow trench isolation layer (708) located around a portion of the via of the contact (3110)”.
Regarding claim 12, Smith‘597 further teaches, “The microelectronic structure of claim 11, wherein the separating dielectric layer (712, fig. 37) is in contact with a first sidewall of the shallow trench isolation layer (708)”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 2 and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Xie‘222.
Regarding claim 2, “The microelectronic structure of claim 1, wherein the separating dielectric layer has a hexagonal cross-section across the first nano device”, Xie‘222 teaches, the separating dielectric layer (BOX layer of SOI wafer 202, ¶ [0031]) has a cross-section across the first nano device. Xie‘222 may not be explicit of the hexagonal shape of the separating dielectric layer. However, the applicant does not cite any evidence showing the criticality of this shape. The shape of the separating dielectric layer is a matter of choice which a person skilled in the art would have found obvious absent persuasive evidence that the particular shape of the claimed limitation was significant, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP 2144.04.
Regarding claim 7, “The microelectronic structure of claim 1, further comprising: a second nano device located adjacent and parallel to the first nano device, wherein the second nano device includes a plurality of second transistors; a second bottom dielectric isolation layer located on the backside of each of the plurality of second transistors of the second nano device; a second separating dielectric layer located on a backside of the second bottom dielectric isolation layer, wherein the second separating dielectric layer is a continuous layer on the backside of each of the plurality of second transistors of the second nano device”, Xie‘222 teaches a first nano device in fig 17A-17B. The instant claim describes another similar nano device next to the first nano device. Duplicating the structure made by Xie‘222 to accommodate more similar transistors next to each other is usual operation and will not be a novelty or hindsight reconstruction. In reHarza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) (Claims at issue were directed to a water-tight masonry structure wherein a water seal of flexible material fills the joints which form between adjacent pours of concrete. The claimed water seal has a "web" which lies in the joint, and a plurality of "ribs" projecting outwardly from each side of the web into one of the adjacent concrete slabs. The prior art disclosed a flexible water stop for preventing passage of water between masses of concrete in the shape of a plus sign (+). Although the reference did not disclose a plurality of ribs, the court held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced.).
Regarding claim 8, Xie‘222 further teaches, “The microelectronic structure of claim 7, further comprising: a shallow trench isolation layer (802, fig. 17B) located between the separating dielectric layer (702) located on backside of the first nano device and the second separating dielectric layer (702) located on the backside of the second nano device”.
Regarding claim 9, “The microelectronic structure of claim 8, wherein the separating dielectric layer and the second separating dielectric layer each have a rounded backside surface across a gate region of the first nano device and the second nano device, respectively”, Xie‘222 teaches, wherein the separating dielectric layer and the second separating dielectric layer (BOX layer of SOI wafer 202, ¶ [0031]) each have (a rounded) backside surface across a gate region of the first nano device and the second nano device, respectively. Xie‘222 may not be explicit of the rounded shape of the separating dielectric layer. However, the applicant does not cite any evidence showing the criticality of this shape. The shape of the separating dielectric layer is a matter of choice which a person skilled in the art would have found obvious absent persuasive evidence that the particular shape of the claimed limitation was significant, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP 2144.04.
Regarding claim 10, Xie‘222 further teaches, “The microelectronic structure of claim 9, further comprising: a portion of the substrate (bulk substrate of the SOI 202) remaining on the rounded backside surfaces of each of the separating dielectric layer and the second separating dielectric layer (702)”.
Claims 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Xie‘222 as applied to claim 2 as above, and further in view of Yeh et al. (US 20200312956 A1, Yeh‘956).
Regarding claim 3, Xie‘222 teaches all the limitations described in claim 2.
But Xie‘222 is silent upon the provision of wherein a triangular shaped portion of a substrate is located on the backside of the bottom dielectric isolation layer.
However, Yeh‘956 teaches a similar device (fig. 12) comprises: a triangular shaped portion of a substrate (24) is located on the backside of the bottom dielectric isolation layer (below the gate stack 58 as shown in Xie‘222).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Xie‘222 and Yeh‘956 to use substrate having a triangular shape portion according to the teachings of Yeh‘956 as the shape of the substrate portion is a matter of choice which a person skilled in the art would have found obvious absent persuasive evidence that the particular shape of the claimed limitation was significant, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See MPEP 2144.04.
Regarding claim 4, Xie‘222 modified with Yeh‘956 further teaches, “The microelectronic structure of claim 3, wherein the triangular shaped portion of the substrate (24, fig. 12, Yeh‘956) has one surface in direct contact with the backside surface of the bottom dielectric isolation layer (702, Xie‘222), and the triangular shaped portion of the substrate has two surfaces in contact with the separating dielectric layer (52, Yeh‘956)”.
Regarding claim 5, Xie‘222 modified with Yeh‘956 further teaches, “The microelectronic structure of claim 3, wherein the separating dielectric layer (52, Yeh‘956) is located between a peak of the triangular shaped portion of the substrate (24) and a second peak of a second triangular shaped portion of the substrate (24)”.
Regarding claim 6, Xie‘222 modified with Yeh‘956 further teaches, “The microelectronic structure of claim 3, wherein the separating dielectric layer (52, Yeh‘956) is in contact with a backside surface of a source/drain (56) of each of the plurality of transistors of the first nano device”.
Claims 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over Smith‘597.
Regarding claim 13, “The microelectronic structure of claim 12, wherein the separating dielectric layer has a rounded backside surface across a source/drain region of the nano device”, Smith‘597 further teaches, wherein the separating dielectric layer (712) has ((a rounded)) backside surface across a source/drain region (1640/2650) of the nano device. Smith‘597 may not be explicit of the rounded shape of the backside surface of the separating dielectric layer. However, the applicant does not cite any evidence showing the criticality of this shape. The shape of the backside surface of the separating dielectric layer is a matter of choice which a person skilled in the art would have found obvious absent persuasive evidence that the particular shape of the claimed limitation was significant, In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). MPEP 2144.04.
Regarding claim 14, Smith‘597 further teaches, “The microelectronic structure of claim 13, further comprising: a portion of a substrate (710, fig. 7) remaining on the rounded backside surface of the separating dielectric layer (712)”.
Regarding claim 15, Smith‘597 further teaches, “The microelectronic structure of claim 14, wherein the portion of the substrate (710, fig. 7) is in contact with the first sidewall of the shallow trench isolation layer (708)”.
Regarding claim 16, Smith‘597 further teaches, “The microelectronic structure of claim 15, wherein the shallow trench isolation layer (708) is located between the via of the contact (3110) and the separating dielectric layer (712), and the shallow trench isolation layer (708) is located between the via of the contact (3110) and the portion of the substrate (710, fig. 37)”.
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached on (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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