Prosecution Insights
Last updated: April 19, 2026
Application No. 17/931,306

SEMICONDUCTOR DEVICE

Final Rejection §102§103
Filed
Sep 12, 2022
Examiner
PURVIS, SUE A
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kabushiki Kaisha Toshiba
OA Round
3 (Final)
61%
Grant Probability
Moderate
4-5
OA Rounds
3y 3m
To Grant
77%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allow Rate
40 granted / 66 resolved
-7.4% vs TC avg
Strong +16% interview lift
Without
With
+16.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
14 currently pending
Career history
80
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
41.4%
+1.4% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
24.3%
-15.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 66 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2 and 10 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Lee et al. (US 11,037,888). Regarding claim 1, Lee (see ––portion of Fig 3 below) discloses a semiconductor device, comprising: a semiconductor part (11, col. 4, lines 4-5); a first electrode (20) provided on the semiconductor part (11); a first protective film (30) provided on the semiconductor part (11), the first protective film (30) covering an outer edge of the first electrode (20); a second electrode (40 – electrode pad which is a type of electrode) provided on the first electrode (20), the second electrode (40) including an outer edge partially covering the first protective film (30) (shown in annotated Figure below); and a second protective film (50, 60) provided on the semiconductor part (11), the second protective film (50, 60) covering an outer edge of the first protective film (30) and the outer edge of the second electrode (40), wherein the outer edge of the second electrode (40) is positioned inward of the outer edge of the first electrode (20) in a plan view parallel to a front surface of the semiconductor part facing the first electrode. PNG media_image1.png 176 178 media_image1.png Greyscale Regarding claim 2, Lee discloses the device according to claim 1, wherein the second electrode (40) includes at least one bonding area (Col. 6, lines 16-25, center portion of 40 considered a “bonding area”) surrounded with the second protective film (50, 60). Regarding 10, Lee discloses the device according to claim 1, wherein the second protective film (50, 60) extends inward from the outer edge of the second electrode (40) along a front surface of the second electrode, and the second protective film (50, 60) partially covers a contact portion of the second electrode (40) at which the second electrode contacts the first electrode (20). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 7-11, 13, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Okabe et al. (US 10,643,967). Regarding claim 1, Okabe (see Fig. 5 below) discloses a semiconductor device, comprising: a semiconductor part (11, col. 4, lines 4-5); a first electrode (1, AI electrode) provided on the semiconductor part (11); a first protective film (18) provided on the semiconductor part (11), the first protective film (18) covering an outer edge of the first electrode (1); a second electrode (13) provided on the first electrode (1), the second electrode (13) including an outer edge partially covering the first protective film (18) (shown in annotated Figure below); and a second protective film (sealant 15 and film 12) provided on the semiconductor part (11), the second protective film (15, 12) covering an outer edge of the first protective film (18) and the outer edge of the second electrode (13), wherein the outer edge of the second electrode (13) is positioned inward of the outer edge of the first electrode (1) in a plan view parallel to a front surface of the semiconductor part facing the first electrode. Okabe teaches the polyimide film (12) with a sealant (15) results in the second protective film of the claim. It would have been obvious to one of ordinary skill in the art before the effective filing date of the application that these combined teachings of Okabe are equivalent to the second protective film and thus the film is within the purview of the artisan. Regarding claim 2, Okabe discloses the device according to claim 1, wherein the second electrode (13) includes at least one bonding area surrounded with the second protective film (15, 12). PNG media_image2.png 283 497 media_image2.png Greyscale Regarding claim 3, Okabe et al. discloses a device according to claim 2 and demonstrates a bonding area on top of a second electrode (13) on top of a first electrode (1) where the area has 2 wires (14) bonded thereto, thus being two bonding areas. Regarding claim 7, Okabe discloses the device according to claim 1, wherein the semiconductor part includes silicon carbide (SiC, Col. 7, lines 35-38). Regarding claims 8 and 9, Okabe discloses the device according claim 1, where the second electrode (13, Cu) has a hardness greater than a hardness of the first electrode (1, aluminum). Regarding 10, Okabe discloses the device according to claim 1, wherein the second protective film (15, 12) extends inward from the outer edge of the second electrode (13) along a front surface of the second electrode, and the second protective film (15, 12) partially covers a contact portion of the second electrode (13) at which the second electrode contacts the first electrode (1). Regarding claim 11, Okabe discloses the device according to claim 1, wherein the first protective film (18 – silicon nitride) includes a first resin, and the second protective film (15, 12 – sealant, polyimide) includes a second resin. Regarding claim 13, Okabe et al. discloses a device according claim 1, further comprising a terminal (14 – copper wires) electrically connected to the second electrode (13), the second electrode (13) and the terminal being connected by a plurality of metal wires (14). Regarding claim 14, Okabe discloses the device according to claim 1, further comprising: a terminal electrically (14) connected to the second electrode (13), the second electrode (13) and the terminal being connected by a metal connector. It would have been obvious to one having ordinary skill in the art before the effective filing date of the application that purpose of the metal wires in Okabe is to connect the device to a metal connector as set forth in the claim. This is an obvious feature to one having ordinary skill in the art. Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. as applied to claim 1 above, and further in view of Okura (US 2021/0028085). Regarding claim 5, Lee discloses the device according to claim 1, wherein the first protective film (30) extends along the outer edge of the first electrode (20), the first protective film (30) including an outer edge and an inner edge, the outer edge contacting the semiconductor part (11, top of outer edge is sufficient), the inner edge contacting the first electrode (20), the inner edge being positioned further inward than the outer edge of the second electrode (40) in a plan view parallel to a front surface of the semiconductor part (11) facing the first electrode (20). Lee only shows cross-sectional view so does not explicitly show a frame shape as required by the claim. Okura discloses a layered semiconductor with 2 electrodes and 2 protective films like Lee, but shows the frame shape in Figure 3. It would have been obvious to one having ordinary skill in the art before the effective filing date that the shape of Lee plan view would be as shown in Okura where the electrode is surrounded by the protective films. Regarding claim 6, Lee in view of Okura discloses the device according to claim 5 as described above, wherein the second protective film (50, 60) is provided with a frame shape and extends along the outer edge of the second electrode (40), the second protective film (50, 60) including a second outer edge and a second inner edge, the second outer edge contacting the semiconductor part (11), the second inner edge contacting the second electrode (40); the second inner edge of the second protective film (50, 60) is positioned inward of the inner edge of the first protective film (30) in the plan view parallel to the front surface of the semiconductor part (11); and the second outer edge of the second protective film (50, 60) is positioned outward of the outer edge of the first protective film (30). Claims 5, 6, 12, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Okabe et al. as applied to claim 1, 11, and 14 above, and further in view of Okura (US 2021/0028085). Regarding claim 5, Okabe discloses the device according to claim 1, wherein the first protective film (18) extends along the outer edge of the first electrode (1), the first protective film (18) including an outer edge and an inner edge, the outer edge contacting the semiconductor part (11), the inner edge contacting the first electrode (1), the inner edge being positioned further inward than the outer edge of the second electrode (13) in a plan view parallel to a front surface of the semiconductor part (11) facing the first electrode (1). Okabe only shows cross-sectional view so does not explicitly show a frame shape as required by the claim. Okura discloses a layered semiconductor with 2 electrodes and 2 protective films like Okabe, but shows the frame shape in Figure 3. It would have been obvious to one having ordinary skill in the art before the effective filing date that the shape of Okabe plan view would be as shown in Okura where the electrode is surrounded by the protective films. Regarding claim 6, Okabe in view of Okura discloses the device according to claim 5 as described above, wherein the second protective film (15, 12) is provided with a frame shape and extends along the outer edge of the second electrode (13), the second protective film (15, 12) including a second outer edge and a second inner edge, the second outer edge contacting the semiconductor part (11), the second inner edge contacting the second electrode (13); the second inner edge of the second protective film (15, 12) is positioned inward of the inner edge of the first protective film (18) in the plan view parallel to the front surface of the semiconductor part (11); and the second outer edge of the second protective film (15, 12) is positioned outward of the outer edge of the first protective film (18). Regarding claim 12, Okabe discloses device according to claim 11, but does not disclose that the second resin includes a component same as a component of the first resin, since the first resin in Okabe is silicon nitride. Okura discloses a layered semiconductor with 2 electrodes and 2 protective films like Okabe, but shows that same resin is used in multiple layers. It would have been obvious to one having ordinary skill in the art before the effective filing date that to use polyimide resins as taught by Okura in the device of Okabe, because those types of protective resins are taught and well known in the art to be used in semiconductor devices. Regarding claim 15, Okabe discloses the device according to claim 14, and Okura discloses the connection wherein the metal connector (40) is connected to the second electrode via a conductive connection member (80). It would have been obvious to one having ordinary skill in the art before the effective filing date that to use metal connector as taught by Okura in the device of Okabe, because those types of protective resins are taught and well known in the art to be used in semiconductor devices. Response to Arguments Applicant's arguments filed November 24, 2025 have been fully considered but they are not persuasive. With respect to applicant’s assertion that the office action is deficient because claim 10 was addressed on page 4 of the office action. While claim 10 was not listed in the preamble, it was listed on PTO-326 and the language of claim 10 is in the body of the rejection on page 4 as being taught by the reference Okura. And the applicant should have been familiar with the prior art as it is from the European Written Opinion which details how the Okura teaches that limitation and since the claim was rejected previously, it is clear that the missing from the preamble was a typo. Furthermore, this argument is moot because the amendment of claim 1 from which claim 10 depends changes the scope of claim 10 and those the rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUE A PURVIS whose telephone number is (571)272-1236. The examiner can normally be reached M-F 0830 to 1630. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
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Prosecution Timeline

Sep 12, 2022
Application Filed
Mar 15, 2025
Non-Final Rejection — §102, §103
Jun 11, 2025
Applicant Interview (Telephonic)
Jun 11, 2025
Examiner Interview Summary
Jun 18, 2025
Response Filed
Aug 28, 2025
Non-Final Rejection — §102, §103
Nov 24, 2025
Response Filed
Feb 10, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

4-5
Expected OA Rounds
61%
Grant Probability
77%
With Interview (+16.4%)
3y 3m
Median Time to Grant
High
PTA Risk
Based on 66 resolved cases by this examiner. Grant probability derived from career allow rate.

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