DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see pages 2-5 made in the pre-appeal brief filed on 06/09/2026, with respect to the rejection of claims 1-20 under 103 have been fully considered and are persuasive. Thus, the finality of the office action dated 04/10/2026 is withdrawn and prosecution is re-opened. Further, the previous rejection of claims 1-20 has been withdrawn. However, upon further consideration, a new grounds of 102 and 103 rejections is made in view of previously applied prior art references and newly found prior reference of Kim et al. and Nofen et al.. Kim et al. and Nofen et al. each teach conductive contacts with different heights on a planar surface and cures the deficiencies of Sun et al. as outlined in the rejection below.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nofen et al. (US 20190393112 A1).
Regarding Claim 1, Nofen et al. teaches a microelectronic assembly, comprising:
a substrate 102 having a surface (see annotated Fig. 1: 102, paragraph 0025),
the surface 105 including: a first conductive contact 141, 120 (connected to die 105) having a first thickness; and a second conductive contact 141, 120 (connected to die 106) having a second thickness different than the first thickness (see annotated Fig. 1: 141, 120, paragraph 0029),
Note that the interconnects 141 and the solder ball 120 are together interpreted as the claimed conductive contacts. Further note that the solder ball 120 illustrated in Fig. 1 has different thickness.
the second conductive contact 141, 120 including a solder material 120 on a top surface of the second conductive contact 141, 120 (see annotated Fig. 1: 141, 120, paragraph 0029);
and a bridge die 107 embedded in a dielectric material of the substrate 102 and electrically coupled to the first and second conductive contacts 141, 120 at the surface of the substrate 102 (see annotated Fig. 1: 107 paragraph 0031).
Note that the die 107 of Fig. 1 is an embedded multi-die interconnect bridge which inherently comprises an embedded silicon bridge die.
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Annotated Fig. 1 of Nofen et al. (US 20190393112 A1)
Regarding Claim 2, Nofen et al. teaches the microelectronic assembly of claim 1, wherein the first thickness is greater than the second thickness (see annotated Fig. 1) (H.
Note that the solder ball 120 on the left of Fig. 1 has a greater thickness than that on the right.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized claim limitations are limitations not explicitly disclosed in the primary
reference but disclosed in the secondary references.
Claims 1-4 and 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Sun et al. (US 20220270976 A1), in view of Chang et al. (US 20210210423 A1) and Kim et al. (US 20230035032 A1).
Regarding Claim 1, Sun et al. teaches a microelectronic assembly, comprising:
a substrate 183 having a surface 105 (see annotated Fig. 13: 183, 105 paragraph 0051),
the surface 105 including: a first conductive contact 109_1 having a first thickness t1; and a second conductive contact 109_2 having a second thickness t2 different than the first thickness t1 (see annotated Fig. 13: 109_1, 109_2, 105, t1, t2, paragraph 0049),
the second conductive contact 109_2 including a solder material 106 on a top surface of the second conductive contact 109_2 (see annotated Fig. 13: 106, 105, 109_2, paragraph 0049);
and a bridge die 175 embedded in a dielectric material of the substrate 183 and electrically coupled to the first and second conductive contacts 109_1, 109_2 at the surface 105 of the substrate 183 (see annotated Fig. 13: 175, 105, 109_1, 109_2, paragraph 0049).
Sun et al. fails to teach the bridge component 175 is a bridge die and the second thickness t2 different than the first thickness t1. However, Chang et al. teaches a microelectronic assembly, comprising a bridge die 10 (see Fig. 4: 10, paragraph 0040).
Therefore, it would have been obvious to a person of ordinary skill in the art to have combined the teachings of Sun et al. and Chang et al. in order to replace the bridge component of Sun et al. with the bridge die of Chang et al.. One of ordinary skill in the art would have been able to carry out such a substitution and achieve predictable results. Doing so would ensure higher performance and signal integrity.
Furthermore, Kim et al. teaches a microelectronic assembly, comprising a first conductive contact 182 having a first thickness 182H; and a second conductive contact 181 having a second thickness 181H different than the first thickness 182H (see Fig. 1C: 181, 182, 181H, 182H, paragraph 0040, 0043).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Kim et al. in order to have the second thickness different than the first thickness. Doing so would enhance electrical characteristic and improve overall reliability of the semiconductor package by reducing the possibility of short circuiting between adjacent bump structures during certain semiconductor fabrication processes, as recognized by Kim et al. (paragraph 0004).
Regarding Claim 2, Kim et al. teaches the microelectronic assembly of claim 1, wherein the first thickness 182H is greater than the second thickness 181H (paragraph 0043) (H.
Regarding Claim 3, Kim et al. teaches the microelectronic assembly of claim 1, wherein the first thickness T22A is between 7 microns and 9 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 5 microns and 50 microns,
according to MPEP § 2144.05 (II-A), differences in dimension will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such dimension is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality of the claimed range of ratio, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 5 microns and 50 microns.
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Annotated Fig 13 of Sun et al. (US 20220270976 A1)
Regarding Claim 4, Kim et al. teaches the microelectronic assembly of claim 1, wherein the second thickness T181H is between 13 microns and 15 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 2 microns and 35 microns, the disclosed range overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 2 microns and 35 microns.
Regarding Claim 9, Sun et al. teaches the microelectronic assembly of claim 1, further comprising: a first microelectronic component 130-1 having a third conductive contact 132_1 electrically coupled, by a first interconnect 106, to the first conductive contact 109_1, wherein the first interconnect 106 includes solder; and a second microelectronic component 130-2 having a fourth conductive contact 132_2 electrically coupled, by a second interconnect 106, to the second conductive contact 109_2, wherein the second interconnect 106 includes solder (see annotated Fig. 13: 130-1, 130-2, 106, 132_2, 132_1, paragraph 0050).
Sun et al. fails to explicitly teach, wherein the solder of the first interconnect 106 having a thickness between 2 microns and 35 microns and wherein the solder of the second interconnect 106 having a thickness between 5 microns and 50 microns.
However, Lin et al. teaches wherein the first interconnect 26A includes solder having a thickness T26A between 2 microns and 7 microns and wherein the second interconnect 26D includes solder having a thickness T26D less than 10 microns (paragraph 0042, 0045).
Note that even though Lin et al. fails to explicitly teach the thickness T26A is between 2 microns and 35 microns and the thickness T26D between 5 microns and 50 microns, these thickness ranges overlap the disclosed ranges by Lin et al. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Lin et al. in order to have the first interconnect include solder having a thickness between 2 microns and 35 microns the second interconnect 106 include solder having a thickness between 5 microns and 50 microns. Doing so would compensate for the difference in height between the first and second conductive contact ensuring proper alignment of microelectronic components.
Regarding Claim 10, Sun et al. teaches the microelectronic assembly of claim 9, wherein the surface 105 of the substrate 183 further includes a fifth conductive contact 109_3 and the first microelectronic component 130-1 is electrically coupled to the fifth conductive contact 109_3, and the microelectronic assembly further comprising: a conductive pillar 177 through the dielectric material of the substrate 183 and electrically coupled to the fifth conductive contact 109_3 (see annotated Fig. 13: 134_1, 177, 130-1, 183, 105, paragraph 0049).
Regarding Claim 11, Sun et al. teaches the microelectronic assembly of claim 1, wherein the surface 105 of the substrate 183 is a second surface 105, the substrate 183 further including a first surface 103 opposite the second surface 105, and the microelectronic assembly further including: a package substrate 102 electrically coupled to the second surface 103 of the substrate 183 (see annotated Fig. 13: 102, 103, 105, paragraph 0035, 0051).
Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Sun et al. (US 20220270976 A1), in view of Chang et al. (US 20210210423 A1) and Kim et al. (US 20230035032 A1), as applied to Claim 1 above, further in view of Lin et al. (US 20150171038 A1).
Regarding Claim 5, the combination of Sun et al., Chang et al. and Kim et al. fails to teach the microelectronic assembly of claim 1, wherein the first conductive contact includes a first material on a top surface; and wherein the second conductive contact includes a second material between the solder material and the second conductive contact.
However, Lin et al. teaches a microelectronic assembly, wherein the first conductive contact 22A includes a first material 24A on a top surface; and wherein the second conductive contact 22D includes a second material 24D between the solder material 26D and the second conductive contact 22D (See Fig. 3C: 22A, 24A, Fig. 3D: 22D, 24D, 26D, paragraph 0040, 0043).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Lin et al. in order to come up with the claimed invention. Doing so would prevent the diffusion of copper into the bonding material such as the solder alloy, as recognized by Lin et al. (paragraph 0041).
Regarding Claim 6, Lin et al. teaches the microelectronic assembly of claim 5, wherein the first material 24A includes gold, palladium, nickel, an organic surface protection layer, or a combination thereof (see paragraph 0041).
Regarding Claim 7, Lin et al. teaches the microelectronic assembly of claim 5, wherein the second material 24D includes nickel, cobalt, iron, or a combination thereof (see paragraph 0044).
Regarding Claim 8, Lin et al. teaches the microelectronic assembly of claim 5, wherein a thickness T24D of the second material 24D is between 0.5 micron and 3 microns.
Note that while Lin et al. fails to explicitly teach a thickness between 1 microns and 8 microns, the disclosed range overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 1 microns and 8 microns.
Claims 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over Sun et al. (US 20220270976 A1), in view of Lin et al. (US 20150171038 A1) and Kim et al. (US 20230035032 A1).
Regarding Claim 12, Sun et al. teaches a microelectronic assembly, comprising:
a substrate 183 having a surface 105 (see annotated Fig. 13: 183, 105 paragraph 0051),
the surface 105 including: a first conductive contact 109_3 having a first thickness t1; and a second conductive contact 109_4 having a second thickness t2 different than the first thickness t1 (see annotated Fig. 13: 109_3, 109_4, 105, t1, t2, paragraph 0049),
a first microelectronic component 130-1 having a third conductive contact 134_1 electrically coupled, by a first interconnect 106, to the first conductive contact 109_3, wherein the first interconnect 109 includes solder having a thickness between 2 microns and 35 microns (see annotated Fig. 13: 130-1, 106, 134_1, paragraph 0050);
and a second microelectronic component 130-2 having a fourth conductive contact 134_2 electrically coupled, by a second interconnect 106, to the second conductive contact 109_4, wherein the second interconnect 106 includes solder having a thickness between 5 microns and 50 microns (see annotated Fig. 13: 130-2, 134_2, 106, paragraph 0050).
Sun et al. fails to teach the second thickness t2 is different than the first thickness t1, wherein the solder of the first interconnect 109 having a thickness between 2 microns and 35 microns, wherein the solder of the second interconnect 109 having a thickness between 5 microns and 50 microns.
However, Kim et al. teaches a microelectronic assembly, comprising a first conductive contact 182 having a first thickness 182H; and a second conductive contact 181H having a second thickness 181H different than the first thickness T22A (see Fig. 1C: 22A, T22A, Fig. 3D: 22D, T22D, paragraph 0040, 0043).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Kim et al. in order to have the second thickness different than the first thickness. Doing so would enhance electrical characteristic and improve overall reliability of the semiconductor package by reducing the possibility of short circuiting between adjacent bump structures during certain semiconductor fabrication processes, as recognized by Kim et al. (paragraph 0004).
Lin et al. teaches a microelectronic assembly, wherein the first interconnect 26A includes solder having a thickness T26A between 2 microns and 7 microns and wherein the second interconnect 26D includes solder having a thickness T26D less than 10 microns (paragraph 0042, 0045).
Note that even though Lin et al. fails to explicitly teach the thickness T26A is between 2 microns and 35 microns and the thickness T26D between 5 microns and 50 microns, these thickness ranges overlap the disclosed ranges by Lin et al. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose the above thicknesses to be within the claimed ranges.
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al., Kim et al. and Lin et al. in order to include solder in the claimed thickness ranges. Doing so would compensate for the difference in height between the first and second conductive contacts of Sun/Kim ensuring proper alignment of microelectronic components.
Regarding Claim 13, Kim et al. teaches the microelectronic assembly of claim 12, wherein the first thickness T22A is between 7 microns and 9 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 5 microns and 50 microns,
according to MPEP § 2144.05 (II-A), differences in dimension will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such dimension is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality of the claimed range of ratio, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 5 microns and 50 microns.
Regarding Claim 14, Kim et al. teaches the microelectronic assembly of claim 12, wherein the second thickness T181H is between 13 microns and 15 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 2 microns and 35 microns, the disclosed range overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 2 microns and 35 microns.
Regarding Claim 15, Sun et al. fails to teach the microelectronic assembly of claim 12, further comprising: a material between the second conductive contact and the solder of the second interconnect, wherein the material includes nickel, cobalt, iron, or a combination thereof.
However, Lin et al. teaches the microelectronic assembly further comprising: a material 24D between the second conductive contact 22D and the solder of the second interconnect 26D, wherein the material includes nickel, cobalt, iron, or a combination thereof (see Fig. 3D: 24D, 22D, 26D, paragraph 0044).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Lin et al. in order to have a material between the second conductive contact and the solder of the second interconnect, wherein the material includes nickel, cobalt, iron, or a combination thereof. Doing so would prevent the diffusion of copper into the bonding material such as the solder alloy, as recognized by Lin et al. (paragraph 0041).
Regarding Claim 16, Sun et al. teaches the microelectronic assembly of claim 12, further comprising: a bridge component 177 embedded in a dielectric material of the substrate 183 and electrically coupled, by conductive pathways through the substrate 183, to the first and second conductive contacts 190_3, 190_4 at the surface 105 of the substrate 183 (see annotated Fig. 13: 109_3, 109_4, 177, 183, 105, paragraph 0049).
Regarding Claim 17, Sun et al. teaches a microelectronic assembly, comprising:
a substrate 183 having a surface 105 (see annotated Fig. 13: 183, 105 paragraph 0051),
the surface 105 including first conductive contacts 109_3 and second conductive contacts 109_4, wherein the first conductive contacts 109_3 have a first thickness t1 and the second conductive contacts 109_4 have a second thickness t2 different than the first thickness t1 (see annotated Fig. 13: 109_3, 109_4, 105, t1, t2, paragraph 0049);
a first microelectronic component 130-1 having third conductive contacts 134_1, wherein respective ones of the third conductive contacts 134_1 are coupled to respective ones of the first conductive contacts 190_3 by first interconnects 106 (see annotated Fig. 13: 130-1, 106, 134_1, paragraph 0050),
wherein the first interconnects 106 include solder having a thickness between 2 microns and 35 microns (paragraph 0050);
and a second microelectronic component 130-2 having fourth conductive contacts 134_2, wherein respective ones of the fourth conductive contacts 134_2 are coupled to respective ones of the second conductive contacts 109_4 by second interconnects 106 (see annotated Fig. 13: 130-2, 106, 134_2, paragraph 0050),
wherein the second interconnects 106 include solder having a thickness between 5 microns and 50 microns.
Sun et a. fails to teach the second thickness t2 is different than the first thickness t1, wherein the solder of the first interconnects 106 having a thickness between 2 microns and 35 microns, wherein the solder of the second interconnects 106 having a thickness between 5 microns and 50 microns.
However, Kim et al. teaches a microelectronic assembly, comprising a first conductive contact 182 having a first thickness 182H; and a second conductive contact 181H having a second thickness 181H different than the first thickness T22A (see Fig. 1C: 22A, T22A, Fig. 3D: 22D, T22D, paragraph 0040, 0043).
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al. and Kim et al. in order to have the second thickness different than the first thickness. Doing so would enhance electrical characteristic and improve overall reliability of the semiconductor package by reducing the possibility of short circuiting between adjacent bump structures during certain semiconductor fabrication processes, as recognized by Kim et al. (paragraph 0004).
Lin et al. teaches a microelectronic assembly, wherein the first interconnect 26A includes solder having a thickness T26A between 2 microns and 7 microns and wherein the second interconnect 26D includes solder having a thickness T26D less than 10 microns (paragraph 0042, 0045).
Note that even though Lin et al. fails to explicitly teach the thickness T26A is between 2 microns and 35 microns and the thickness T26D between 5 microns and 50 microns, these thickness ranges overlap the disclosed ranges by Lin et al. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose the above thicknesses to be within the claimed ranges.
Therefore, it would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to have combined the teachings of Sun et al., Kim et al. and Lin et al. in order to include solder in the claimed thickness ranges. Doing so would compensate for the difference in height between the first and second conductive contacts of Sun/Kim ensuring proper alignment of microelectronic components.
Regarding Claim 18, Kim et al. teaches the microelectronic assembly of claim 17, wherein the first thickness T22A is between 7 microns and 9 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 5 microns and 50 microns,
according to MPEP § 2144.05 (II-A), differences in dimension will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such dimension is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality of the claimed range of ratio, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 5 microns and 50 microns.
Regarding Claim 19, Kim et al. teaches the microelectronic assembly of claim 17, wherein the second thickness T181H is between 13 microns and 15 microns (see paragraph 0043).
Note that while Lin et al. fails to explicitly teach a thickness between 2 microns and 35 microns, the disclosed range overlaps the claimed range. According to MPEP § 2144.05 (I), “In the case where the claimed ranges overlap or lie inside ranges disclosed by the prior art, a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to choose a thickness between 2 microns and 35 microns.
Regarding Claim 20, Sun et al. teaches the microelectronic assembly of claim 17, further comprising: a surface insulation material 115 between the surface 105 of the substrate 183 and the first and second conductive contacts 190_3, 190_4 (see annotated Fig. 13: 115, paragraph 0050).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAMNA F IQBAL whose telephone number is 571-272-1587. The examiner can normally be reached M-F: 8.30 am - 5.30 pm EST.
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/HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 07/29/2026
/NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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