DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 13 and 14 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Shibata (US 2021/0296299).
Regarding claim 13.
Shibata teaches a conjoined semiconductor device (100), comprising: a first wafer (101) and a second wafer (102) (paragraph 25-27), each wafer having a joining surface and joining pads (13,23), and a plurality of void patterns (12,22) are formed adjacent the joining pads (13,23) in the first wafer (101) and/or the second wafer (102) (paragraph 35), wherein the first wafer (101) and the second wafer (102) are hybrid bonded to each other at the joining pads (13,23) (paragraph 36) (fig 1).
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Regarding claim 14.
Shibata teaches the structure of claim 13.
Shibata teaches wherein at least some of the plurality of void patterns (12,22) are formed at the joining surface (S) (fig 1) of the first wafer (101) (fig 2) and the joining surface (s) (fig 1) of the second wafer (102) (fig 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 7, and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Shibata (US 2021/0296299)
Regarding claim 1.
Chu teaches a semiconductor structure, comprising: a first substrate (104a) and a second substrate (104b) hybrid bonded at a hybrid bond interface (134) (fig 4c) (paragraph 22); each of the first substrate (104a) and the second substrate (104b) including a die portion (150) and a crackstop structure (138) adjacent (102) the die portion (150) (fig 1b,5) (paragraph 28); and the crackstop structures (138) of the first substrate (104a) and the second substrate (104b) are in contact at the hybrid bond interface (134) (paragraph 23) (fig 1a, 4b).
Chu does not teach voids in the substrate.
Shibata teaches a semiconductor structure, comprising: a first substrate (101) and a second substrate (102) hybrid bonded at a hybrid bond interface (S) (fig 1) (paragraph 26,27); each of the first substrate (101) and the second substrate (102) including a die portion (101a) and a crackstop structure (101b) adjacent the die portion (101a) (fig 1); and one or more voids (12,22) in the first substrate (101) and in the second substrate (102) at about a portion of a periphery of each crackstop structure (paragraph 33,34), wherein some of the one or more voids (12,22) in the first substrate (101) and in the second substrate (102) are substantially aligned with each other, respectively, becoming unified voids (30) with airgaps across the hybrid bond interface (s) (paragraph 72) (fig 1,8).
It would have been obvious to one of ordinary skill in the art to provide void structures in the crack stop structure region to release the stress of cracks, and thus prevent the cracks from propagating through the bonding surfaces (paragraph 107).
Regarding claim 7.
Chu in view of Shbata teaches the structure of claim 1.
Shibata teaches the one or more voids (12,22) in the first substrate (101) and the second substrate (102) are ring-shaped (fig 6,7) (paragraph 49,71).
Regarding claim 10.
Chu in view of Shibata teaches the structure of claim 1.
Chu teaches a material (136) (oxide) (paragraph 22) that is different from a material (metals) forming the crackstop structure (138) (paragraph 23).
Shibata teaches the one or more voids (12,22) are embedded in a material (fig 1) (paragraph 27).
Regarding claim 11.
Chu in view of Shibata teaches the structure of claim 1.
Chu teaches a first plurality of devices (502) on the first substrate (104a) connected to a first pad and a second plurality of devices on the second substrate (104b) connected to a second pad, wherein the first pad and the second pad are connected at the hybrid bond interface (134) (fig 5) (paragraph 51).
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Claim(s) 3, 4, and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Shibata (US 2021/0296299) as applied to claim 1 and further in view of Gao (US 2020/0075533)
Regarding claim 3.
Chu in view of Shibata teaches the structure of claim 1.
Chu in view of Shibata does not teach the voids have different horizontal shapes.
Gao teaches at least some of the one or more voids (308) formed in the first substrate have different horizontal (width) cross-sectional shapes, at the hybrid bond interface (300,302), from the at least some of the one or more voids (306) formed in the second substrate (fig 34) (paragraph 48).
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It would have been obvious to one of ordinary skill in the art to provide voids having different shapes in order to improve capture of particles (paragraph 4).
Regarding claim 4.
Chu in view of Shibata teaches the structure of claim 1.
Gao teaches at least some of the one or more voids (304) formed in the first substrate are differently sized horizontally (width), at the hybrid bond interface, from the at least some of the one or more voids (306) formed in the second substrate (fig 3, 4) (paragraph 48).
Regarding claim 5.
Chu in view of Shibata teaches the structure of claim 1.
Gao teaches a plurality of voids (312,312) arranged in succession, with only materials of the first and second substrates in-between, extending across the hybrid bond interface (302,303) (fig 3) (paragraph 48).
It would have been obvious to one of ordinary skill in the art to provide voids having different shapes in order to improve capture of particles (paragraph 4).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Shibata (US 2021/0296299) as applied to claim 1 and further in view of Hirano (US 2012/0241981)
Regarding claim 8.
Chu in view of Shibata teaches the structure of claim 1.
Chu in view of Shibata does not teach the voids arranged in a discontinuous ring.
Hirano teaches the one or more voids (9) in the first substrate (10) and the second substrate (20) are arranged as non-contiguous (24) rings (fig 4b,4c) (paragraph 71,72).
It would have been obvious to one of ordinary skill in the art to form the voids in a discontinuous ring in order to enable wiring to connect to an external device (paragraph 71)
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Shibata (US 2021/0296299) as applied to claim 1 and further in view of Gao (US 2020/0075533)
Regarding claim 9.
Chu in view of Shibata teaches elements of the claimed invention above in the rejection of claim 1.
Chu in view of Shibata does not teach circle shaped voids.
Gao teaches the one or more voids (2018) (fig 21) in the first substrate (2012,2006) are as circular-shaped (fig 22) (paragraph 115).
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It would have been obvious to one of ordinary skill in the art to form circular voids in order to minimize stress concentration points and thereby inhibit crack propagation and delamination (paragraph 38).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Shibata (US 2021/0296299) as applied to claim 1 and further in view of Chang (US 2022/0367406).
Regarding claim 12.
Chu in view of Shibata teaches elements of the claimed invention above in the rejection of claim 1.
Chu in view of Shibata does not teach a hybrid bonded third die
Chang teaches a third substrate (wafer 3) (fig 3a) including a die portion (301c) (fig 3c), a crackstop structure (320) (paragraph 42), and a hybrid bond interface (paragraph 41), wherein the hybrid bond interface of the third substrate is adjacent the second substrate (301b) and faces the hybrid bond interface of the first substrate to form a hybrid bond with the first substrate (paragraph 41).
It would have been obvious to one of ordinary skill in the art to provide a hybrid bonded third die in order to provide additional functions to the packaged structure (Chang paragraph 25)
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shibata (US 2021/0296299) as applied to claim 13 and further in view of Gao (US 2020/0075533).
Regarding claim 15.
Shibata teaches elements of the claimed invention above in the rejection of claim 13.
Shibata does not teach the void patterns alternate.
Gao teaches the plurality of void patterns (308,306) alternate between the joining surface of the first wafer and the joining surface of the second wafer (fig 3) (Gao paragraph 47).
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It would have been obvious to one of ordinary skill in the art to arrange the voids in an alternating pattern between the wafers to inhibit crack propagation (Gao paragraph 9).
Claim(s) 13 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Uzoh (US 2021/0366820).
Regarding claim 13.
Chu teaches a conjoined semiconductor device, comprising: a first wafer (104a) and a second wafer (104b), each wafer having a joining surface (134) and joining pads (138) (paragraph 22) (fig 4a), wherein the first wafer (104a) and the second wafer (104b) are hybrid bonded (HB) to each other at the joining pads (138) (paragraph 23).
Chu does not teach void patterns.
Uzoh teaches a plurality of void patterns (304) are formed adjacent the joining pads (110) in the first wafer (104,106) and/or the second wafer (fig 13a,13c) (paragraph 76,77).
It would have been obvious to one of ordinary skill in the art to provide a void pattern in order to allow uniaxial expansion of the conductive material during annealing (paragraph 28).
Regarding claim 16.
Chu in view of Uzoh teaches the structure of claim 13 above.
Uzoh teaches at least some of the plurality of void patterns (304) are arranged adjacent and completely surrounding one of the joining pads (110) (fig 13c) (paragraph 77) and have a height that is smaller than a height of the joining pads (fig 13a) (paragraph 76).
Claim(s) 13 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chu (US 2017/0186732) in view of Gao (US 2020/0075533).
Regarding claim 13.
Chu teaches a conjoined semiconductor device, comprising: a first wafer (104a) and a second wafer (104b), each wafer having a joining surface (134) and joining pads (138) (paragraph 22) (fig 4a), wherein the first wafer (104a) and the second wafer (104b) are hybrid bonded (HB) to each other at the joining pads (138) (paragraph 23).
Chu does not teach void patterns.
Gao teaches a plurality of void patterns (306,308) are formed adjacent the joining pads in the first wafer and/or the second wafer (fig 3) (paragraph 46-47).
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It would have been obvious to one of ordinary skill in the art to provide void patterns in order to capture particles (paragraph 9)
Regarding claim 17.
Chu in view of Gao teaches the structure of claim 13 above.
Chu teaches the joining pads (138) comprise metallic joining pads (paragraph 23)
Gao teaches the joining pads comprise metallic joining pads (paragraph 3,42) and the plurality of void patterns (306,308) are differently sized at the joining surface of the first wafer, from the plurality of void patterns at the joining surface of the second wafer (paragraph 48).
Response to Arguments
Applicant's arguments filed 8/5/2025 have been fully considered but they are not persuasive.
Regarding claim 13, the applicant argues that Shibata does not teach that the joining pads are adjacent to the voids in the crack stop region
However, Shibata illustrates in figure 1 that the regions are adjacent.
Further, the applicants own claim recites “a crackstop structure adjacent the die portion” in line 5 of claim 1. If the regions are adjacent (defined as lying near, close, or next to) the components of the regions, which are by definition part of the regions, must also be adjacent.
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Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID J GOODWIN whose telephone number is (571)272-8451. The examiner can normally be reached Monday - Friday, 11:00 - 19:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.J.G/Examiner, Art Unit 2817
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 October 1, 2025
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