DETAILED ACTION
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-8 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ohno in view of Son et al. (US 2018/0090539; herein “Son”).
Regarding claim 1, Ohno discloses in Fig. 1A-3B and related text a micro light-emitting device, comprising:
an epitaxial structure comprising a first-type semiconductor layer (16, see [0115]), a light-emitting layer (14, see [0115]), and a second-type semiconductor layer (12, see [0115]), wherein the light-emitting layer is located between the first-type semiconductor layer and the second-type semiconductor layer, the first-type semiconductor layer comprises a first portion (a portion of 16 in the upper region) and a second portion (a portion of 16 in the lower region) connected to each other, a bottom area of the first portion is smaller than a top area of the second portion (see Fig. 1B), a thickness of the second portion is greater than 10% of a thickness of the first-type semiconductor layer (note that one can choose a portion of 16 in the upper region with a thickness such that the claimed limitation is met);
a first electrode (19, see [0120]) disposed on the epitaxial structure and located on the first portion of the first-type semiconductor layer;
a second electrode (20, see [0120]) disposed on the epitaxial structure; and
a conductive layer (at least upper layer of 18, see [0120] and [0142]) disposed between the first electrode and the first portion, wherein an orthographic projection area of the conductive layer on the first portion is greater than or equal to 90% of an area of the first portion (equal, see Figs. 1A-B);
an isolating layer (17, see [0119]) extends to cover a peripheral surface of the conductive layer (see Fig. 1C), a peripheral surface of the first-type semiconductor layer, a peripheral surface of the light-emitting layer and a portion of the second-type semiconductor layer, wherein the isolating layer has a first opening.
Ohno does not disclose
the isolating layer, disposed on an upper surface of the conductive layer, wherein an orthographic projection area of the first opening on the conductive layer is located within an area of the conductive layer.
In the same field of endeavor, Son teaches in Fig. 1 and related text a light emitting device comprising
an isolating layer (150, see [0061]), disposed on an upper surface of the conductive layer (130, see [0045]) and extends to cover a peripheral surface of the conductive layer, a peripheral surface of the first-type semiconductor layer (126, see [0033]), a peripheral surface of the light-emitting layer (124, see [0033]) and a portion of the second-type semiconductor layer (122, see [0033]), wherein the isolating layer has a first opening (filled by 146, see [0033]), and an orthographic projection area of the first opening on the conductive layer is located within an area of the conductive layer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ohno by having the isolating layer disposed on an upper surface of the conductive layer and an orthographic projection area of the first opening on the conductive layer is located within an area of the conductive layer, as taught by Son, in order to properly isolate the electrodes from one another, to prevent shorting due misalignment between the electrode and the contact layer, improve adhesion and prevent delamination and shorting between the electrode and the contact layer, and to improve optical characteristics by increasing surface area of reflective portions.
Regarding claim 2, Ohno further discloses wherein a peripheral surface of the conductive layer (18) is a continuous surface with a peripheral surface of the first portion (portion of 16 in the upper region) (in the interpretation that the first portion is a portion having W1, the peripheral side surfaces are aligned, see Fig. 1B).
Regarding claim 3, Ohno further discloses wherein an orthographic projection area of the first portion (portion of 16 in the upper region) on a substrate is 2% to 10% of an orthographic projection area of the first-type semiconductor layer on the substrate (note that one can choose a portion of 16 in the upper region with a width such that the claimed limitation is met).
Regarding claim 4, Ohno further discloses a contact layer (lower layer of 18, see [0120] and [0142]) disposed between the first portion of the first-type semiconductor layer and the conductive layer.
Regarding claim 5, Ohno further discloses wherein an orthographic projection area of the conductive layer on the contact layer is greater than or equal to 90% of an area of the contact layer (equal, see Fig. 1B and [0142]).
Regarding claim 6, Ohno further discloses wherein the first portion of the first-type semiconductor layer comprises a first doping layer and a second doping layer, the first doping layer is disposed between the second doping layer and the contact layer, and a doping concentration of the first doping layer is greater than a doping concentration of the second doping layer (when the first-type semiconductor layer comprises 16 and the p-type contact layer thereon, the p-type contact layer is the first doping layer and doped to a high concentration, see [0128] and [0130]).
Regarding claim 7, Ohno further discloses wherein an orthographic projection area of the contact layer (18) on the first doping layer (p-type contact layer) is greater than or equal to 90% of an area of the first doping layer (equal, see Fig. 1B and [0128], [0130]).
Regarding claim 8, Ohno further discloses wherein an orthographic projection are of the first electrode (19) on the conductive layer (18) is less than or equal to the area of the conductive layer (see Fig. 1A-B).
Regarding claim 10, Ohno further discloses wherein an orthographic projection of the first electrode (19) on the first portion (portion of upper region of 16) partially overlaps an orthographic projection of the contact layer (18) on the first portion (see Fig. 1A-B).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ohno in view of Son, as applied to claim 1 above, and further in view of Sakariya et al. (US 2014/0159064; herein “Sakariya”).
Regarding claim 12, Ohno substantially discloses a micro light-emitting device according to claim 1 as applied above, and further discloses 1 micro light-emitting device display apparatus, comprising a plurality of the micro light-emitting devices according to claim 1 (see [0253] at least).
Ohno does not disclose the micro light-emitting device display apparatus, comprising:
a driving substrate; and
wherein the plurality of micro light-emitting devices are separately disposed on the driving substrate and electrically connected to the driving substrate.
In the same field of endeavor, Sakariya teaches in, e.g., Fig. 14A and related text, a micro light-emitting device display apparatus, comprising:
a driving substrate (100 with ICs 120, see [0121); and
wherein the plurality of micro light-emitting devices (400, see [0134] and [0102]) are separately disposed on the driving substrate and electrically connected to the driving substrate.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Ohno by having a driving substrate and the plurality of micro light-emitting devices are separately disposed on the driving substrate and electrically connected to the driving substrate, in order to achieve an active matrix backplane with has individually addressable pixels/subpixels.
Response to Arguments
Applicant's arguments filed 8/21/2025 have been fully considered but are moot in view of the new grounds of rejection presented above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lauren R Bell whose telephone number is (571)272-7199. The examiner can normally be reached M-F 8am-5pm.
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/LAUREN R BELL/Primary Examiner, Art Unit 2896 9/16/2025