Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 8 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Co et al. (US 2015/0017765).
As for claim 1, Co et al. teach in Figs. 8A or 8B and the related text a semiconductor device, comprising:
a first substrate 12 having a first (upper) face;
a resin layer 42 which is provided on the first face and which has a second (upper) face on an opposite side to the first substrate (Fig. 1); and
a wire 32/34/52 which is provided so as to penetrate the resin layer 42 and protrude from the second face (Fig. 8A/8B), wherein: the wire has a large-width part 52 which is provided at an end of the wire that protrudes from the second face and which has a larger width than a width of the wire that penetrates the resin layer (Fig. 8A/8B),
a first distance and a second distance are the same, the first distance being an entire distance between a bottom surface of the large-width part and the first face, and the second distance being an entire distance between the second face where the large-width part is not arranged and the first face (Fig. 8A-8B), and
the large-width part 52 is arranged so as to come into physical contact with the second face (FIG. 8A-8B).
As for claim 2, Co et al. teach the semiconductor device according to claim 1, wherein the wire 32/34/52 extends in a direction approximately perpendicular to the first face (Fig. 1, 8A-8B).
As for claim 8, Co et al. teach the semiconductor device according to claim 1, wherein the first substrate 20 further has a pad 23 provided on the first face, and the wire is provided so as to penetrate the resin layer 42 from the pad and protrude from the second face (fig. 1A).
As for claim 9, Co et al. teach the semiconductor device according to claim 1, further comprising a semiconductor chip 22 which is provided on the first face and which is covered by the resin layer 42, wherein the semiconductor chip 22 is electrically connected to the wire (FIG. 1A, [0065])
Claim Rejections - 35 USC § 103
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Co et al. in view of Katkar et al. (US 2017/0117243, as disclosed in previous office action).
As for claim 3, Co et al. disclose the semiconductor device according to claim 1, except a plurality of the wires, each including the large-width part, wherein the plurality of the large-width parts have different sizes corresponding to positions on the second face, wherein: the plurality of the large-width parts are electrically connected to a second substrate provided so as to oppose the second face, and the plurality of the large-width parts have different heights corresponding to a warpage of the second substrate, wherein the plurality of the large-width parts have different widths corresponding to intervals between the wires on the second face, wherein: the second face has a first region and a second region in which a density of the wire on the second face is higher than in the first region, and a width of the large-width part in the second region is smaller than a width of the large-width part in the first region.
Katkar et al. teach in Fig. 1A and the related text a plurality of the wires 40/41/42/13, each including the large-width part 13, wherein the plurality of the large-width parts have different sizes corresponding to positions on the second face (fig. 1A), wherein: the plurality of the large-width parts 13 are electrically connected to a second substrate 60 provided so as to oppose the second face, and the plurality of the large-width parts 13 have different heights corresponding to a warpage of the second substrate (fig. 1A), wherein the plurality of the large-width parts 13 have different widths corresponding to intervals between the wires on the second face (fig. 1A), wherein the second face has a first (outer) region and a second (inner) region in which a density of the wire on the second face is higher than in the first region (Fig. 1A), and a width of the large-width part in the second region is smaller than a width of the large-width part in the first region (Fig. 1A).
Katkar et al. and Co et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Co et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Co et al. to include the limitations as taught by Katkar et al., in order to improve interconnections
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Co et al. in view of Yu et al. (US 2014/0021605, as disclosed in previous office action).
As for claim 7, Co et al. teach the semiconductor device according to claim 1, except the large-width part is integrally configured with the wire using a same material.
Yu et al. teach in Figs. 5 or 22 and the related text a large-width part 114 is integrally configured with the wire 116 using a same material ([0033]-[0034]).
Co et al. and Yu et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Co et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Co et al. to include the large-width part is integrally configured with the wire using a same material as taught by Yu et al. in order to improve interconnections.
Response to Arguments
Applicant’s arguments with respect to claim(s) above have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/TRANG Q TRAN/Primary Examiner, Art Unit 2811