DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
In the communication filed on 12/01/2025 claims 1, 3-7, and 9-14 are pending. Independent claim 1 has been amended by incorporating the limitations from cancelled claim 2 and by including new limitations based on Figs. 2-3. Independent claim 7 has been amended by incorporating limitations from cancelled claim 8. Claims 3-6, 10-11, and 14 have been amended for dependency purposes and/or to correct matters that were objected to in the previous Office Action dated 09/04/2025.
Response to Arguments/Amendments
Applicant's arguments and amendments filed 12/01/2025 have been fully considered but they are not persuasive.
With respect to independent claim 1, the applicant argues on pages 18-20 of the Remarks dated 12/02/2025 that Kitahara fails to explicitly teach a “cell discharge resistor”, however, the examiner respectfully disagrees. The examiner does not rely on Kitahara for this citation but rather relies on Chikada as cited in page 9 of the Office Action dated 09/04/2025.
With respect to independent claim 7, the applicant argues on pages 21-22 of the Remarks dated 12/01/2025 that Kitahara fails to teach “wherein the overcharge release voltage and the overcharge detection voltage are set so as to satisfy a case that a sum of the overcharge release voltage and the overcharge detection voltage is equal to the charge voltage”, however, the examiner respectfully disagrees. Applicant's arguments fail to comply with 37 CFR 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
The remaining arguments are moot as the applicant’s arguments for the remaining claims were based on dependency of the independent claims.
The drawing and the specification objections are withdrawn due to the amendments, however, new objections are made below necessitated by the amendments made by the applicant.
The claim objections are withdrawn due to the amendments.
The 35 U.S.C. 112(b) Rejection is withdrawn due to the amendments.
This Office Action is made Final due to the amendments.
Drawings
The drawings are objected to because Figs. 14A-14B are missing reference characters for the steps.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities: the instances in the specification referring to the steps of Figs. 14A-14B will need to be amended to include the reference characters to be added to the drawings.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 3-7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Chikada (Japanese Patent JP-2015186331-A) and further in view of Kitahara et al. (USPN 6121752).
First, the examiner notes that a cell discharge resistor is a depletion type FET as disclosed by the applicant in Fig. 3 reference character 17 and ¶ [39]. For examination purposes, a cell discharge resistor will be interpreted as a circuit element with electrical resistance used to create a cell discharge path to include resistors and not limited to depletion type FETs.
Second, the examiner notes the secondary battery includes a multi-cell battery pack as disclosed by the applicant in ¶ [15]. For examination purposes, a secondary battery will be interpreted as a multi-cell battery pack.
With respect to claim 1, Chikada teaches a cell balance circuit, which is a circuit connected in parallel to a secondary battery including a battery pack in which a first cell to an nth cell are connected in series in order from a positive electrode to a negative electrode, with a natural number n which is two or more as the number of cells connected in series, and adjusting individual voltages of n cells, from the first cell to the nth cell (Figs. 1-4 and ¶ [04]; a balance correction circuit, which is a circuit connected in parallel to energy storage cells 11-13 which is a battery pack in which the energy storage cells 11-13 are connected in series in order from a positive electrode to a negative electrode, with a natural number n (i.e., 3) which is two or more as the number of cells connected in series, and adjusting individual voltages of n cells, from the first cell to the nth cell (i.e., first to third)).
Chikada teaches the cell balance circuit comprising a switch circuit comprising at least one switch in a path connecting a positive electrode terminal and a negative electrode terminal of each of the n cells and being capable of respectively opening/closing n paths based on a control signal supplied to the at least one switch (Figs. 1-4; a switch 20 comprising at least one switch in a path connecting a positive electrode terminal and a negative electrode terminal of each of the n cells and being capable of respectively opening/closing n paths based on a control signal supplied to the at least one switch (from control unit 40)).
Chikada teaches a cell discharge resistor respectively connected to the n cells, from the first cell to the nth cell, via the switch circuit (Figs. 1-4; a resistor 30 respectively connected to the n cells, from the first cell to the nth cell, via the switch 20).
Chikada teaches wherein the natural number n is equal to or more than a natural number k which is an order of the cell connected in series from the positive electrode to the negative electrode (Fig. 2; implicitly k is a varying number between 1-3 representing the amount of cells connected in series from the positive electrode to the negative number wherein n representing the total number of battery cells (i.e., 3) is equal to or more than k).
Chikada teaches where each of the first cell to the nth cell is connected/disconnected to the cell discharge resistor (Figs. 1-4; the cells 11-13 are connected/disconnected to the resistor 30 during a balance correction method).
Chikada teaches an external positive electrode terminal and an external negative electrode terminal and a load connected to the external positive electrode terminal and the external negative electrode terminal (Fig. 1 and ¶ [13]; “Although not shown in Fig. 1, terminals at both ends of the storage cells 11 to 13 arranged in series are connected to an external device that uses electricity.” One of ordinary skill understands the terminals connecting to the external device are the external positive electrode terminal and the external negative electrode terminal).
Chikada teaches wherein the switch circuit is configured to switch to a kth cell discharge state where a kth cell from the positive electrode to the negative electrode is connected to the cell discharge resistor based upon the received control signal (Figs. 1-4; the switch 20 is configured to receive the control signal from control unit 40, and switch to a kth cell discharge state where a kth cell from the positive electrode to the negative electrode (e.g., of the cell) is connected to the resistor 30 based upon the received control signal from control unit 40).
However Chikada fails to explicitly teach wherein the switch circuit is configured to switch to a cell balance stop state based upon the received control signal in response to satisfying at least one of a charger non-connection state where a charger for charging the secondary battery is not connected, or a load connection state where it is detected that the secondary battery is being discharged; in a case where a voltage of the kth cell is equal to or higher than an overcharge detection voltage, the case satisfying at least one of a charger connection state where the charger is connected to the external positive electrode terminal and the external negative electrode terminal, or a load non-connection state where the secondary battery is not being discharged to the load through the cell discharge resistor.
Kitahara teaches wherein the switch circuit is configured to switch to a cell balance stop state based upon the received control signal in response to satisfying at least one of a charger non-connection state where a charger for charging the secondary battery is not connected, or a load connection state where it is detected that the secondary battery is being discharged (col. 5 lines 23-30; an external charger (not illustrated in the figures). Col. 5 lines 44-50; one of ordinary skill understands Kitahara teaches that cell balancing occurs only during charging and not when the charger is disconnected or when the battery pack is discharging. In other words a cell balance stop state is one in which the charger is not connected (i.e., charger non-connection state) or one in which the battery pack is being discharged).
Kitahara teaches in a case where a voltage of the kth cell is equal to or higher than an overcharge detection voltage, the case satisfying at least one of a charger connection state where the charger is connected to the external positive electrode terminal and the external negative electrode terminal, or a load non-connection state where the secondary battery is not being discharged to the load (Figs. 2-3, col. 6 line 66 – col. 9 line 10; when the voltage between the terminals of each battery cell group is higher than the reference voltage (i.e., an overcharge detection voltage), the charging current of the battery cell group is bypassed to the charging current bypass circuit 43 to suppress the increase in the voltage of the battery cell group. ¶ [33]; one of ordinary skill understands cell balancing occurs during a charger connection state or a state where the secondary battery is not being discharged).
Therefore, it would have been obvious to one having ordinary skill in the art to have modified Chikada’s cell balance circuit by adding Kitahara’s cell balance and discharge logic, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. The advantage to this modification being the system ensures full charging of all battery cells even if they are of variable capacity, as charging of each battery is individually controlled (see Kitahara’s abstract).
With respect to claim 3, Chikada teaches the invention as discussed above in claim 1. However, Chikada fails to explicitly teach wherein the switch circuit transitions from the kth cell discharge state to the cell balance stop state in response to satisfying that the voltage of the kth cell has dropped from the overcharge detection voltage or more to an overcharge release voltage or less.
Kitahara teaches wherein the switch circuit transitions from the kth cell discharge state to the cell balance stop state in response to satisfying that the voltage of the kth cell has dropped from the overcharge detection voltage or more to an overcharge release voltage or less (Col. 10 lines 1-9; the cell balancing using the charging current bypass circuit 43 is stopped in response to the voltage reaching the minimum voltage V5 (i.e., an overcharge release voltage). One of ordinary skill understands the minimum voltage V5 is lower than the reference voltage).
Therefore, it would have been obvious to one having ordinary skill in the art to have modified Chikada’s cell balance circuit by adding Kitahara’s cell balance and discharge logic, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. The advantage to this modification being the system ensures full charging of all battery cells even if they are of variable capacity, as charging of each battery is individually controlled (see Kitahara’s abstract).
With respect to claim 4, Chikada teaches the invention as discussed above in claim 1. However, Chikada fails to explicitly teach wherein the switch circuit transitions from the kth cell discharge state to the cell balance stop state in response to satisfying at least one of the charger non-connection state, or a the load connection state.
Kitahara teaches wherein the switch circuit transitions from the kth cell discharge state to the cell balance stop state in response to satisfying at least one of the charger non-connection state, or the load connection state (Col. 5 lines 44-50; one of ordinary skill understands Kitahara teaches that cell balancing occurs only during charging and not when the charger is disconnected or when the battery pack is discharging. In other words a cell balance stop state is one in which the charger is not connected (i.e., charger non-connection state) or one in which the battery pack is being discharged).
Therefore, it would have been obvious to one having ordinary skill in the art to have modified Chikada’s cell balance circuit by adding Kitahara’s cell balance and discharge logic, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. The advantage to this modification being the system ensures full charging of all battery cells even if they are of variable capacity, as charging of each battery is individually controlled (see Kitahara’s abstract).
With respect to claim 5, Chikada teaches the invention as discussed in claim 1 above. Further, Chikada teaches wherein the natural number n is equal to or more than a natural number k which is an order of the cell connected in series from the positive electrode to the negative electrode, wherein the at least one switch included in a path connecting a positive electrode terminal of a kth cell, which is the kth cell, and a negative electrode terminal of the kth cell (Fig. 2; implicitly k is a varying number between 1-3 representing the amount of cells connected in series from the positive electrode to the negative number wherein n representing the total number of battery cells (i.e., 3) is equal to or more than k).
Chikada teaches a k_lth switch switching between connection and non-connection with the positive electrode terminal of the kth cell based on the control signal supplied, the k_1th switch including a control port to which the control signal is supplied, a first port connected to the positive electrode terminal of the kth cell, and a second port connected to the cell discharge resistor (Figs. 1-4; switch elements 21-24 and 26-27 are controlled by the control signal from the control circuit 40 to connect or disconnect to the positive electrode terminal of the kth cell. The switch elements 21-24 and 26-27 include a control port to which the control signal is supplied, a first port connected to the positive electrode terminal of the kth cell, and a second port connected to the resistor 30).
Chikada teaches a k_2th switch switching between connection and non-connection with the negative electrode terminal of the kth cell based on the control signal supplied, the k_2th switch including a second control port to which the control signal is supplied, a third port connected to the negative electrode terminal of the kth cell, and a fourth port connected to the cell discharge resistor (Figs. 1-4; switch elements 23-28 are controlled by the control signal from the control circuit 40 to connect or disconnect to the negative electrode terminal of the kth cell. The switch elements 23-28 include a control port to which the control signal is supplied, a first port connected to the negative electrode terminal of the kth cell, and a second port connected to the resistor 30).
Chikada teaches wherein the cell discharge resistor comprises: a first end connected to each positive electrode terminal of the n cells, from the first cell to the nth cell, via the k_1th switch; and a second end connected to each negative electrode terminal of the n cells, from the first cell to the nth cell, via the k_2th switch (Figs. 1-4; the resistor 30 comprises a first end connected to each positive electrode terminal of the n cells, from the first cell to the nth cell, via the switch elements 21-24 and 26-27 and a second end connected to each negative electrode terminal of the n cells, from the first cell to the nth cell, via the switch elements 23-28).
With respect to claim 6, Chikada teaches the invention as discussed above in claim 1. Further, Chikada teaches further comprising a cell balance control circuit which controls to switch between connecting any one of the n cells and the cell discharge resistor (Figs. 1-4; a control circuit 40 which controls a voltage balance correction where any one of the n cells and the resistor 30 are connected).
Chikada teaches not connecting the cell discharge resistor to any of the n cells (Figs. 1-4 esp. 2-3; where the resistor is not connected to one or more of the n cells).
With respect to claim 7, Chikada teaches a cell balance circuit, among circuits connected in parallel to a secondary battery comprising a battery pack in which a first cell to an nth cell are connected in series in order from a positive electrode to a negative electrode, with a natural number n which is two or more as the number of cells connected in series, and adjusting individual voltages of n cells, from the first cell to the nth cell (Figs. 1-4 and ¶ [04]; a balance correction circuit, which is a circuit connected in parallel to energy storage cells 11-13 which is a battery pack in which the energy storage cells 11-13 are connected in series in order from a positive electrode to a negative electrode, with a natural number n (i.e., 3) which is two or more as the number of cells connected in series, and adjusting individual voltages of n cells, from the first cell to the nth cell (i.e., first to third)).
Chikada teaches the cell balance circuit comprising a switch circuit comprising at least one switch in a path connecting a positive electrode terminal and a negative electrode terminal of each of the first cell and the second cell, the switch circuit respectively opening/closing two paths based on a control signal supplied to the at least one switch (Figs. 1-4; a switch 20 comprising at least one switch in a path connecting a positive electrode terminal and a negative electrode terminal of each of the n cells and being capable of respectively opening/closing n paths based on a control signal supplied to the at least one switch (from control unit 40)).
Chikada teaches a cell discharge resistor respectively connected to the first cell and the second cell via the switch circuit (Figs. 1-4; a resistor 30 respectively connected to the n cells, from the first cell to the nth cell, via the switch 20).
However, Chikada fails to explicitly teach the cell balance circuit being a circuit adjusting individual voltages of a first cell and a second cell when the natural number n is two; and wherein an overcharge detection voltage for detecting an overcharge state and an overcharge release voltage for releasing the overcharge state are respectively set for voltages of the first cell and the second cell, the overcharge release voltage is set to a voltage lower than a voltage which is 1/2 times a charge voltage being an output voltage of a charger for charging the secondary battery, the overcharge detection voltage is set to a voltage higher than the voltage which is 1/2 times the charge voltage and lower than the charge voltage, and a release condition of the overcharge state in a charger connection state where the charger is connected to an external positive electrode terminal and an external negative electrode terminal is that a voltage of the cell, among the first cell and the second cell, drops to the overcharge release voltage or less, the voltage exceeding the overcharge detection voltage; wherein the overcharge release voltage and the overcharge detection voltage are set so as to satisfy a case that a sum of the overcharge release voltage and the overcharge detection voltage is equal to the charge voltage.
Chikada discloses the claimed invention except for the cell balance circuit being a circuit adjusting individual voltages of a first cell and a second cell when the natural number n is two. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have a first cell and a second cell when the natural number n is two, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art.
However, Chikada fails to explicitly teach wherein an overcharge detection voltage for detecting an overcharge state and an overcharge release voltage for releasing the overcharge state are respectively set for voltages of the cells, the overcharge release voltage is set to a voltage lower than a voltage which is 1/2 times a charge voltage being an output voltage of a charger for charging the secondary battery, the overcharge detection voltage is set to a voltage higher than the voltage which is 1/2 times the charge voltage and lower than the charge voltage, and a release condition of the overcharge state in a charger connection state where the charger is connected to an external positive electrode terminal and an external negative electrode terminal is that a voltage of the cell, among the cells, drops to the overcharge release voltage or less, the voltage exceeding the overcharge detection voltage; wherein the overcharge release voltage and the overcharge detection voltage are set so as to satisfy a case that a sum of the overcharge release voltage and the overcharge detection voltage is equal to the charge voltage.
Kitahara teaches wherein an overcharge detection voltage for detecting an overcharge state and an overcharge release voltage for releasing the overcharge state are respectively set for voltages of the cells (Figs. 2-3, col. 6 line 66 – col. 9 line 10; when the voltage between the terminals of each battery cell group is higher than the reference voltage (i.e., an overcharge detection voltage), the charging current of the battery cell group is bypassed to the charging current bypass circuit 43 to suppress the increase in the voltage of the battery cell group. Col. 10 lines 1-9; the cell balancing using the charging current bypass circuit 43 is stopped in response to the voltage reaching the minimum voltage V5 (i.e., an overcharge release voltage). One of ordinary skill understands the minimum voltage V5 is lower than the reference voltage).
Kitahara teaches the overcharge release voltage is set to a voltage lower than a voltage which is 1/2 times a charge voltage being an output voltage of a charger for charging the secondary battery (Col. 10 lines 1-9; one of ordinary skill understands the minimum voltage V5 is lower than ½ times the charge voltage).
Kitahara teaches the overcharge detection voltage is set to a voltage higher than the voltage which is 1/2 times the charge voltage and lower than the charge voltage (Col. 10 lines 45-48; the reference voltage is half the product of the charging end voltage of the secondary battery cell).
Kitahara teaches a release condition of the overcharge state in a charger connection state where the charger is connected to an external positive electrode terminal and an external negative electrode terminal is that a voltage of the cell, among the cells, drops to the overcharge release voltage or less, the voltage exceeding the overcharge detection voltage (col. 5 lines 23-30; an external charger (not illustrated in the figures). Col. 5 lines 44-50; one of ordinary skill understands Kitahara teaches that cell balancing occurs only during charging and not when the charger is disconnected or when the battery pack is discharging. Col. 10 lines 1-9; the cell balancing using the charging current bypass circuit 43 is stopped in response to the voltage reaching the minimum voltage V5 (i.e., an overcharge release voltage)).
Kitahara teaches wherein the overcharge release voltage and the overcharge detection voltage are set so as to satisfy a case that a sum of the overcharge release voltage and the overcharge detection voltage is equal to the charge voltage (Figs. 2-3, col. 6 line 66 – col. 9 line 10, and Col. 10 lines 1-9; one of ordinary skill in the art understands the effective charging range is between the reference voltage (i.e., the overcharge detection voltage) and the minimum voltage V5 (i.e., the overcharge release voltage); in which this may be expressed algebraically as a sum).
Therefore, it would have been obvious to one having ordinary skill in the art to have modified Chikada’s cell balance circuit by adding Kitahara’s cell balance and discharge logic, since it has been held to be within the general skill of a worker in the art to apply a known technique to a known device (method, or product) ready for improvement to yield predictable results is obvious. The advantage to this modification being the system ensures full charging of all battery cells even if they are of variable capacity, as charging of each battery is individually controlled (see Kitahara’s abstract).
With respect to claim 9, Chikada teaches the invention as discussed above in claim 1. Further, Chikada teaches a cell balance device (Figs. 1-4; storage module 1).
Chikada teaches a cell balance control circuit generating the control signal and supplying the control signal generated to the at least one switch (Figs. 1-4; control circuit 40 supplies the control signal generated to the at least one switch).
Chikada teaches a positive electrode power supply terminal connected to the first end of the cell discharge resistor via the switch circuit (Figs. 1-4; the connection to the battery pack at switch 21 (i.e., a positive electrode power supply terminal) is connected to the first end of the resistor 30 via the switch 20).
Chikada teaches a negative electrode power supply terminal connected to the second end of the cell discharge resistor via the switch circuit (Figs. 1-4; the connection to the battery pack at switch 28 (i.e., a negative electrode power supply terminal) is connected to the second end of the resistor 30 via the switch 20).
Chikada teaches a signal input terminal connected to the cell balance control circuit (Figs. 1-4; signal inputs connected to control circuit 40).
With respect to claim 10, Chikada teaches the invention as discussed above in claim 1. Further, Chikada teaches a cell balance device (Figs. 1-4; storage module 1).
Chikada teaches a cell balance control circuit which controls to switch between connecting any one of the cells and the cell discharge resistor are connected (Figs. 1-4; a control circuit 40 which controls a voltage balance correction where any one of the n cells and the resistor 30 are connected).
Chikada teaches not connecting the cell discharge resistor to any of the cells (Figs. 1-4 esp. 2-3; where the resistor is not connected to one or more of the n cells).
Chikada teaches a positive electrode power supply terminal connected to the first end of the cell discharge resistor via the switch circuit (Figs. 1-4; the connection to the battery pack at switch 21 (i.e., a positive electrode power supply terminal) is connected to the first end of the resistor 30 via the switch 20).
Chikada teaches a negative electrode power supply terminal connected to the second end of the cell discharge resistor via the switch circuit (Figs. 1-4; the connection to the battery pack at switch 28 (i.e., a negative electrode power supply terminal) is connected to the second end of the resistor 30 via the switch 20).
Chikada teaches a cell connection terminal respectively connected to the first end and the second end of the cell discharge resistor via the switch circuit (Figs. 1-4; the connection to the cells 11-13 via the switches 22-27 (i.e., a cell connection terminal) respectively connected to the first end and the second end of the resistor 30 through the switch 20).
Chikada teaches a signal input terminal connected to the cell balance control circuit (Figs. 1-4; signal inputs connected to control circuit 40).
Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over Chikada (Japanese Patent JP-2015186331-A), in view of Kitahara et al. (USPN 6121752), and further in view of Fukuchi et al. (USPGPN 20210242689) and Sakurai et al. (USPGPN 20180062410).
With respect to claim 11, Chikada teaches the invention as discussed above in claim 1. However, Chikada fails to explicitly teach the charge/discharge control circuit for controlling charge/discharge of a secondary battery, the charge/discharge control circuit comprising: a positive electrode power supply terminal to which a voltage from a positive electrode of the secondary battery is supplied; a negative electrode power supply terminal to which a voltage from a negative electrode of the secondary battery is supplied; a cell connection terminal pair composed of a first terminal and a second terminal which are respectively connected to a contact of two adjacent cells; an external negative voltage input terminal connected to an external negative electrode terminal; a charge control signal output terminal outputting a charge control signal for controlling stop and permission of charge of the secondary battery; a discharge control signal output terminal outputting a discharge control signal for controlling stop and permission of discharge of the secondary battery; a battery voltage detection circuit respectively connected to the positive electrode power supply terminal, the first terminal, and the negative electrode power supply terminal, and detecting a voltage of the secondary battery and a voltage of each cell based on voltages supplied from the positive electrode power supply terminal, the first terminal, and the negative electrode power supply terminal; an FET control circuit generating the charge control signal and the discharge control signal based on detection signals of the voltage of the secondary battery and the voltage of each cell from the battery voltage detection circuit; a cell balance control circuit generating a control signal to be supplied to the at least one switch based on the detection signals of the voltage of the secondary battery and the voltage of each cell, the voltage of the negative electrode power supply terminal, and the voltage of the external negative voltage input terminal; wherein the second terminal is connected to the cell balance circuit.
Fukuchi teaches a charge/discharge control circuit for controlling charge/discharge of the secondary battery (Fig. 1; a charge/discharge control circuit 10).
Fukuchi teaches the charge/discharge control circuit comprising a positive electrode power supply terminal to which a voltage from a positive electrode of the secondary battery is supplied (Fig. 1; power supply terminal VDD).
Fukuchi teaches a negative electrode power supply terminal to which a voltage from a negative electrode of the secondary battery is supplied (Fig. 1; ground terminal VSS).
Fukuchi teaches a cell connection terminal pair composed of a first terminal and a second terminal which are respectively connected to a contact of two adjacent cells (Fig. 1; input terminal VC and output terminal CB).
Fukuchi teaches an external negative electrode terminal (Fig. 1; external terminal EB-).
Fukuchi teaches a charge control signal output terminal outputting a charge control signal for controlling stop and permission of charge of the secondary battery (Fig. 1; output terminal CO).
Fukuchi teaches a discharge control signal output terminal outputting a discharge control signal for controlling stop and permission of discharge of the secondary battery (Fig. 1; output terminal DO).
Fukuchi teaches a battery voltage detection circuit respectively connected to the positive electrode power supply terminal, the first terminal, and the negative electrode power supply terminal, and detecting a voltage of the secondary battery and a voltage of each cell based on voltages supplied from the positive electrode power supply terminal, the first terminal, and the negative electrode power supply terminal (Fig. 1; overcharge detection circuits 101a and 101b, overdischarge detection circuits 102a and 102b, cell-balance detection circuits 103a and 103b).
Fukuchi teaches an FET control circuit generating the charge control signal and the discharge control signal based on detection signals of the voltage of the secondary battery and the voltage of each cell from the battery voltage detection circuit (Fig. 1; controller 104 controls the charge control FET 16 and the discharge control FET 15).
Fukuchi teaches a cell balance control circuit generating a control signal to be supplied to the at least one switch based on the detection signals of the voltage of the secondary battery and the voltage of each cell, the voltage of the negative electrode power supply terminal, and the voltage of the external negative voltage input terminal (Fig. 1; controller 104 generates a control signal to control output circuit 105 which comprises switches for balancing the cells 11a-11b).
Fukuchi teaches wherein the second terminal is connected to the cell balance circuit (Fig. 1; output terminal CB is connected to output circuit 105).
Chikada discloses the claimed invention except for a charge/discharge control circuit. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Chikada’s cell balance circuit by adding Fukuchi’s charge/discharge control circuit, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art. KSR International Co. v Teleflex Inc., 550 U.S. 398, 127 S. Ct. 1727, 82 USPQ2d 1385, 1395-97 (2007).
However, Chikada fails to explicitly teach an external negative voltage input terminal connected to an external negative electrode terminal.
Sakurai teaches an external negative voltage input terminal connected to an external negative electrode terminal (Fig. 1; an external negative voltage input terminal VM1 connected to an external negative terminal EB-).
Chikada discloses the claimed invention except for a charge/discharge control circuit. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Chikada’s cell balance circuit by adding Sakurai’s external negative voltage input terminal connected to an external negative electrode terminal, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art.
With respect to claim 12, Chikada teaches the invention as discussed above in claim 11. However, Chikada fails to explicitly teach wherein the charge/discharge control circuit is formed on a plurality of semiconductor chips, the FET control circuit is formed on a first semiconductor chip, and the cell balance circuit is formed on a second semiconductor chip different from the first semiconductor chip.
Fukuchi teaches wherein the charge/discharge control circuit is formed on a plurality of semiconductor chips, the FET control circuit is formed on a first semiconductor chip, and the cell balance circuit is formed on a second semiconductor chip different from the first semiconductor chip (Fig. 1; one of ordinary skill in the art understands the parts enclosed by boxes within the charge/discharge control circuit 10 are semiconductor chips wherein the controller 104 is different from the voltage detection chips 101a/b – 103a/b).
Chikada discloses the claimed invention except for a charge/discharge control circuit. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Chikada’s cell balance circuit by adding Fukuchi’s charge/discharge control circuit, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art. KSR International Co. v Teleflex Inc., 550 U.S. 398, 127 S. Ct. 1727, 82 USPQ2d 1385, 1395-97 (2007).
With respect to claim 13, Chikada teaches the invention as discussed above in claim 11. Further, Chikada teaches the external positive electrode terminal and the external negative electrode terminal (Fig. 1 and ¶ [13]; “Although not shown in Fig. 1, terminals at both ends of the storage cells 11 to 13 arranged in series are connected to an external device that uses electricity.” One of ordinary skill understands the terminals connecting to the external device are the external positive electrode terminal and the external negative electrode terminal).
However, Chikada fails to explicitly teach a charge/discharge control device; a charge control FET comprising a gate connected to the charge control signal output terminal, a first port connected to the external negative electrode terminal, and a second port; and a discharge control FET comprising a gate connected to the discharge control signal output terminal, and a port connected to the second port of the charge control FET.
Fukuchi teaches a charge/discharge control device (Fig. 1; the charge control FET 16 and the discharge control FET 15 are a charge/discharge control device).
Fukuchi teaches a charge control FET comprising a gate connected to the charge control signal output terminal, a first port connected to the external negative electrode terminal, and a second port (Fig. 1; a charge control FET 16 comprising a gate connected to CO, a first port connected to EB-, and a second port).
Fukuchi teaches and a discharge control FET comprising a gate connected to the discharge control signal output terminal, and a port connected to the second port of the charge control FET (Fig. 1; a discharge control FET 15 comprising a gate connected to DO, and a port connected to the second port of the charge control FET 16).
Chikada discloses the claimed invention except for a charge/discharge control circuit. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Chikada’s cell balance circuit by adding Fukuchi’s charge/discharge control circuit, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Chikada (Japanese Patent JP-2015186331-A), in view of Kitahara et al. (USPN 6121752), and further in view of Fukuchi et al. (USPGPN 20210242689).
With respect to claim 14, Chikada teaches the invention as discussed above in claim 11. Further, Chikada teaches a battery device (Figs. 1-4; storage module 1).
Chikada teaches the secondary battery (Figs. 1-4; energy storage cells 11-13 which is a battery pack in which the energy storage cells 11-13 are connected in series are a secondary battery).
Chikada teaches the external positive electrode terminal and the external negative electrode terminal (Fig. 1 and ¶ [13]; “Although not shown in Fig. 1, terminals at both ends of the storage cells 11 to 13 arranged in series are connected to an external device that uses electricity.” One of ordinary skill understands the terminals connecting to the external device are the external positive electrode terminal and the external negative electrode terminal).
However, Chikada fails to explicitly teach a charge control FET comprising a gate connected to the charge control signal output terminal, a first port connected to the external negative electrode terminal, and a second port; and a discharge control FET comprising a gate connected to the discharge control signal output terminal, and a port connected to the second port of the charge control FET.
Fukuchi teaches a charge control FET comprising a gate connected to the charge control signal output terminal, a first port connected to the external negative electrode terminal, and a second port (Fig. 1; a charge control FET 16 comprising a gate connected to CO, a first port connected to EB-, and a second port).
Fukuchi teaches a discharge control FET comprising a gate connected to the discharge control signal output terminal, and a port connected to the second port of the charge control FET (Fig. 1; a discharge control FET 15 comprising a gate connected to DO, and a port connected to the second port of the charge control FET 16).
Chikada discloses the claimed invention except for a charge/discharge control circuit. It would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Chikada’s cell balance circuit by adding Fukuchi’s charge/discharge control circuit, since it has been held to be within the general skill of a worker in the art to be aware that known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations would have been predictable to one of ordinary skill in the art.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Frank A Silva whose telephone number is (703)756-1698. The examiner can normally be reached Monday - Friday 09:30 am -06:30 pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Drew Dunn can be reached at 571-272-2312. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FRANK ALEXIS SILVA/Examiner, Art Unit 2859
/DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859