DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s arguments and amendments filed October 30, 2025 have been entered and considered.
Election/Restrictions
Applicant’s election without traverse of Species 1, Claims 1-13 and 15-16 in the reply filed on February 4, 2025 is acknowledged.
Claim 14 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species 2, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on February, 4, 2025.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-7, 10-11 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 11404414 B2), in view of Wang et al. (US 9373712 B2).
Regarding claim 1, Yang et al. teaches:
A laterally diffused metal-oxide-semiconductor (LDMOS), comprising:
a substrate [202, Col. 4, Lines 4-14, Fig. 3];
a plurality of fin structures [205, Col. 4, Lines 11-14; Col. 3, Lines 27-42, Fig. 2, 3] located on the substrate [202];
a gate structure [210, Col. 4, Lines 9-31, Fig. 3] located on the substrate [202, Fig. 3] and spanning the plurality of fin structures [205, Fig. 3]; and
a gate contact layer [250a-250e, Col. 4, Lines 56-67 to Col. 5, Lines 1-67 to Col. 6, Lines 1-30 , Fig. 3] located on the gate structure [210, Fig. 3] and electrically connected to the gate structure [210, Fig. 3], wherein the gate contact layer [250e, Col. 5, Lines 28-63, Fig. 3]] is electrically connected to a dummy contact structure [250a-250d, Col. 5, Lines 28-63, Fig. 3].
Yang et al. does not teach:
a gate contact layer located on the gate structure and electrically connected to the gate structure, wherein the gate contact layer is electrically connected to a dummy contact structure, and wherein the gate contact layer contacts the dummy contact structure directly.
Wang et al. teaches:
a gate contact layer [252, Col. 4, Lines 65-67 to Col. 5, Lines 1-15, Fig. 7] located on the gate structure [G, Col. 5, Lines 8-15, Fig. 7] and electrically connected to the gate structure [G, Fig. 7], wherein the gate contact layer [252, Fig. 7] is electrically connected to a dummy contact structure [DG1, Col. 5, Lines 8-15, Fig. 7], and wherein the gate contact layer [252, Fig. 7] contacts the dummy contact structure [DG1, Fig. 7] directly. [Col. 5, Lines 34-55, Fig. 7]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Wang et al. into the teachings of Yang et al. to include a gate contact layer located on the gate structure and electrically connected to the gate structure, wherein the gate contact layer is electrically connected to a dummy contact structure, and wherein the gate contact layer contacts the dummy contact structure directly. The ordinary artisan would have been motivated to modify Yang et al. in the above manner for the purpose of improving connections, improving performance, improving reliability, and in order for the gate structure and the dummy gate to both receive a power supply voltage.
Regarding claim 2, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. further teaches:
further comprising a first well region [P-Well, Col. 4, Lines 36-55, Fig. 3] and a second well region [N-well, Col. 4, Lines 36-55, Fig. 3] located in the substrate [202, Fig. 3], and a shallow trench isolation [1305 with 204, Col. 11, Lines 12-23; Col. 11, Lines 32-67, Fig. 3, 13A-13D] in the second well region [P-well, Fig. 3].
Regarding claim 4, Yang et al. and Wang et al. teach the LDMOS according to claim 2.
Yang et al. further teaches:
further comprising a source contact [206, Col. 4, Lines 9-14; Col. 3, Lines 22-42, Fig. 2-3] on the first well region [P-well, Fig. 3] and a drain contact [208, Col. 4, Lines 9-14; Col. 3, Lines 22-42, Fig. 2-3] on the second well region [N-Well, Fig. 3].
Regarding claim 5, Yang et al. and Wang et al. teach the LDMOS according to claim 4.
Yang et al. further teaches:
wherein the first well region [P-well, Col. 3, Lines 39-42; Col. 4, Lines 36-44, Fig. 3] is P-type and the second well region [N-well, Fig. 3] is N-type.
Regarding claim 6, Yang et al. and Wang et al. teach the LDMOS according to claim 4.
Yang et al. further teaches:
wherein the first well region [P-well, Fig. 3] further comprises a source region [front fins 205, source 206, Fig. 2-3] and the second well region [N-well, Fig. 3] further comprises a drain region [back fins 205, drain 208, Fig. 2-3].
Regarding claim 7, Yang et al. and Wang et al. teach the LDMOS according to claim 6.
Yang et al. further teaches:
wherein the source contact [206, Fig. 2-3] is electrically connected to the source region [front fins 205, source 206, Fig. 2-3] and the drain contact [208, Fig. 2-3] is electrically connected to the drain region [back fins 205, drain 208, Fig. 2-3].
Regarding claim 10, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. further teaches:
wherein a top surface of the gate contact layer [250e, Fig. 3] is aligned with a top surface of the dummy contact structure [250a-250d, Fig. 3].
Regarding claim 11, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. further teaches:
wherein the gate contact layer [250e, Fig. 2-3, 13A-13D] and the plurality of fin structures [205a-205d, Fig. 2-3, 13A-13D] extend along a first direction.
Regarding claim 13, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. further teaches:
wherein an area where the fin structures [205, Fig. 3] are located is defined as an active area [310/320, Col. 4, Lines 44-55, Fig. 3], and the gate contact layer [250e, Col. 4, Lines 60-67 to Col. 5, Line 1, Fig. 3] is located outside the active area [310/320, Fig. 3].
Claims 3 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 11404414 B2), in view of Wang et al. (US 9373712 B2) as applied to claim 2 above, and further in view of Barth et al. (US 20150206885 A1).
Regarding claim 3, Yang et al. and Wang et al. teach the LDMOS according to claim 2.
Yang et al. further teaches:
wherein the dummy contact structure [250a-250d, Fig. 3] is located on the shallow trench isolation [1305 with 204, Fig. 3, 13A-13D].
Yang et al. and Wang et al. do not teach:
the dummy contact structure is located on the shallow trench isolation and directly contacts the shallow trench isolation.
Barth et al. teaches:
wherein the dummy contact structure [173, Paragraph [0129], Fig. 12A-12B] is located on the shallow trench isolation [20, Paragraph [0129], Fig. 12A-12B] and directly contacts the shallow trench isolation [20, Fig. 12A-12B].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Barth et al. into the teachings of Yang et al. and Wang et al. to include the dummy contact structure is located on the shallow trench isolation and directly contacts the shallow trench isolation. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of improving reliability, performance and effectiveness, and mitigating stress and defects. See also, MPEP 2144.04(VI)(C) Rearrangement of Parts.
Regarding claim 9, Yang et al. and Wang et al. teach the LDMOS according to claim 2.
Yang et al. further teaches:
wherein the gate structure [210, Fig. 3] spans part of the first well region [P-well, Fig. 3] and part of the second well region [N-well, Fig. 3].
Yang et al. and Wang et al. do not teach:
the dummy contact structure is located beside the gate structure.
Barth et al. teaches:
the dummy contact structure [173, Paragraph [0127-0129], Fig. 12A-12B] is located beside the gate structure [70/72, Paragraph [0128], Fig. 12A-12B].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Barth et al. into the teachings of Yang et al. and Wang et al. to include the dummy contact structure is located beside the gate structure. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of increasing density, maintaining uniformity, improving device characteristics, functionality, and reliability. See also, MPEP 2144.04(VI)(C) Rearrangement of Parts.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 11404414 B2), in view of Wang et al. (US 9373712 B2) as applied to claim 4 above, and further in view of Phoa et al. (US 10312367 B2).
Regarding claim 8, Yang et al. and Wang et al. teach the LDMOS according to claim 4.
Yang et al. and Wang et al. do not teach:
further comprising a dummy gate structure located between the dummy contact structure and the drain contact.
Phoa et al. teaches:
further comprising a dummy gate structure [145/150, Col. 7, Lines 34-67 to Col. 8, Lines 1-4, Fig. 4E] located between the dummy contact structure [114/115, Col. 11, Line 67 to Col. 12, Lines 1-8, Fig. 4E] and the drain contact [108, Col. 8, Lines 5-27, Fig. 4E].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Phoa et al. into the teachings of Yang et al. and Wang et al. to include further comprising a dummy gate structure located between the dummy contact structure and the drain contact. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of creating shorter connection paths, improving performance and yield, and improving manufacturing costs.
Claims 12, and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. (US 11404414 B2), in view of Wang et al. (US 9373712 B2) as applied to claim 1 and 11 above, and further in view of Rastogi et al. (US 20180102364 A1).
Regarding claim 12, Yang et al. and Wang et al. teach the LDMOS according to claim 11.
Yang et al. and Wang et al. do not teach:
wherein the dummy contact structure extends along a second direction, and the first direction is different from the second direction.
Rastogi et al. teaches:
wherein the dummy contact structure [DCL, paragraph [0046-0047], Fig. 1, 3] extends along a second direction [Y-direction, Fig. 1, 3], and the first direction [X-direction, paragraph [0043], Fig. 1, 3] is different from the second direction [Y-direction, Fig. 1, 3].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Rastogi et al. into the teachings of Yang et al. and Wang et al. to include wherein the dummy contact structure extends along a second direction, and the first direction is different from the second direction. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of maximizing space and density, preventing defects, enhancing performance, improving integration and functionality, and improving efficiency.
Regarding claim 15, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. and Wang et al. do not teach:
wherein a material of the gate contact layer is same as a material of the dummy contact.
Rastogi et al. teaches:
wherein a material of the gate contact layer [CP2, paragraph [0046], [0051], Fig. 1, 3] is same as a material of the dummy contact [DCL, paragraph [0046], [0051], Fig. 1, 3].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Rastogi et al. into the teachings of Yang et al. and Wang et al. to include wherein a material of the gate contact layer is same as a material of the dummy contact. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of simpler and cheaper to manufacture, improving compatibility, efficiency and effectiveness.
Regarding claim 16, Yang et al. and Wang et al. teach the LDMOS according to claim 1.
Yang et al. and Wang et al. do not teach:
wherein a bottom surface of the dummy contact is lower than a bottom surface of the gate contact layer.
Rastogi et al. teaches:
wherein a bottom surface of the dummy contact [DCL, Fig. 3] is lower than a bottom surface of the gate contact layer [CP2, Fig. 3].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Rastogi et al. into the teachings of Yang et al. and Wang et al. to include wherein a bottom surface of the dummy contact is lower than a bottom surface of the gate contact layer. The ordinary artisan would have been motivated to modify Yang et al. and Wang et al. in the above manner for the purpose of increasing density, improving integration, functionality, efficiency and performance.
Response to Arguments
Applicant’s arguments with respect to independent claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant argues on pages 1-4, of remarks filed October 30, 2025 that the current prior art of record does not teach the amendment to independent claim 1. Examiner agrees with Applicant, however, after a new line of search and consideration the amended limitations of independent claim 1 can be overcome by newly cited source Wang et al. (US 9373712 B2). All claims directly or indirectly dependent on independent claim 1 are also rejected for at least the reasons mentioned above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID MICHAEL HELBERG whose telephone number is (571)270-1422. The examiner can normally be reached Mon.-Fri. 8am-5pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571)270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/D.M.H./Examiner, Art Unit 2815 12/23/2025
/MONICA D HARRISON/Primary Examiner, Art Unit 2815