Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Species I drawn to claims 1-11, 16-20 and group 1, drawn to claims 1-15 with traverse is acknowledged. The traversal is on the grounds that claims in Group II include subject matter recited in the claims of group I. This would be persuasive if the dependency of the remaining claims(claims 4-15) were then dependent upon claims 2 or 3, however this is not the case. When claim 1 is found to be in the conditions for allowance, claims 12-20 can be rejoined as requiring all of the limitations of the allowable claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 11 is/are rejected under 35 U.S.C. 103 as being unpatentable in view of Kar et al.(US 20210167180 A1, hereafter Kar).
Regarding Claim 1, Kar discloses:
An integrated circuit structure(Fig. 1, 2A, 9B), comprising:
A sub-fin(Fig. 2A See figure below);
A source region(Fig. 2A [114-1]) in contact with a first portion(Fig. 2A See figure below) of the sub-fin(Fig. 2A See figure below);
A drain region(Fig. 2A [114-2]) in contact with a second portion of the sub-fin(Fig. 2A See figure below);
A body(Fig. 2A [204]) comprising semiconductor material above the sub-fin(Fig. 2A See figure below), the body(Fig. 2A [204]) extending laterally between the source region(Fig. 2A [114-1]) and the drain region(Fig. 2A [114-2]); and
A gate structure(Fig. 2A [108]) on the body(Fig. 2A [204]) and comprising (i) a gate electrode(Fig. 2A See figure below) and (ii) a gate dielectric(Fig. 2A See figure below) between the gate electrode(Fig. 2A See figure below) and the body(Fig. 2A [204]).
Kar does not explicitly teach or disclose that a first distance between the drain region and the gate electrode is at least two times a second distance between the source region and the gate electrode, the first and second distances measured in a same horizontal plane that runs in a direction parallel to the body.
However, as it can be seen from Fig. 2A of Kar, the distance between the source region 114-1 and the gate electrode 108 is nearly zero, or almost zero, based on the face that a corner of the source region shares a vertex with a corner of the gate dielectric, suggesting that the distance, if not zero, is small in comparison to the other features. In addition, the distance 228-3 is defined as between 10 and 500 nanometers long(See paragraph 0061).
It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to arrive at the claimed limitation from the prior art of Kar. One might have been motivated to position the drain at a farther distance from the gate as compared to the source in order to tune the threshold voltage of the transistor structure with the understanding that a drain farther from the gate would generate a transistor with a greater threshold voltage. Creating this device would have generated a predictable result in the creation of Kar’s device with an explicitly defined dimension in regards to the horizontal distance between the source and the gate and a horizontal distance between the drain and the gate.
Regarding Claim 2, Kar further discloses:
The first portion of the sub-fin(Fig. 2A See figure below) is doped with one of a p-type or an n-type dopant(P-type, See paragraph 0063), and wherein the second portion of the sub-fin(Fig. 2A See figure below), the source region(Fig. 2A [114-1]), and the drain region(Fig. 2A [114-2]) are doped with the other type of the P-type or N-type dopant(See paragraph 0063).
Regarding Claim 3, Kar further discloses:
The first and second portions(Fig. 2A See figure below) of the sub-fin are laterally adjacent to each other;
A first section of the body(Fig. 2A [204-1]), which is nearer to the source region(Fig. 2A [114-1]), is above the first portion of the sub-fin(Fig. 2A See figure below); and
A second section of the body(Fig. 2A [204-2]), which is farther from the source region(Fig. 2A [114-1]) and laterally adjacent to the first section of the body(Fig. 2A [204-1]), is above the second portion of the sub-fin(Fig. 2A See figure below).
Regarding Claim 4, Kar further discloses:
The first portion of the sub-fin(Fig. 2A See figure below) is doped with a P-type dopant(See paragraph 0063), and
The second portion of the sub-fin(Fig. 2A See figure below), the source region(Fig. 2A [114-1]), and the drain region(Fig. 2A [114-2]) are doped with n-type dopant(See paragraph 0063).
Regarding Claim 5, Kar further discloses:
There is no intervening source or drain region between the source region and the drain region(Fig. 2A [114-1/114-2]).
Regarding Claim 11, Kar further discloses:
One or more interconnect features(Fig. 9C See figure below) to electrically couple the gate structure(Fig. 9C [Gate]) to the source region(Fig. 9C See figure below), wherein each of the gate structure(Fig. 9C [Gate]) and the source region(Fig. 9C See figure below) are grounded(See Fig. 9C [940], Paragraph 0077), and the drain region(Fig. 9C See figure below) is electrically coupled to an input/output(I/O)(Fig. 9C [910]) of the integrated circuit structure(Fig. 1/2A/9C).
Claim(s) 6-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kar in view of Fujii et al.(US 20170173943 A1, hereafter Fujii).
Regarding Claim 6, Kar discloses:
The body(Fig. 2A [204]) is a first body.
Kar does not teach or disclose the remaining limitations of claim 6.
In the same field of endeavor, Fujii discloses:
A diffusion region(Fig. 2 [107]) which is neither a source region nor a drain region in contact with a first portion(Fig. 2 See figure below) of a sub-fin(Fig. 2 See figure below), wherein the source region(Fig. 2 [106a]), the drain region(Fig. 2 [106b]), and the second portion of the sub-fin(Fig. 2 See figure below) are doped with n-type dopant, and wherein the diffusion region(Fig. 2 [107]) and the first portion of the sub-fin(Fig. 2 See figure below) are doped with a p-type dopant;
A second body(Fig. 2 See figure below) extending laterally from the diffusion region(Fig. 2 [107]) toward the source and drain regions(Fig. 2 [106a/106b]), such that a first end portion of the second body(Fig. 2 See figure below) is in contact with the diffusion region(Fig. 2 [107]), and a second end portion of the second body(Fig. 2 See figure below) is not in contact with any source or drain region; and
A third body(Fig. 2 See figure below) extending laterally from the diffusion region(Fig. 2 [107]) and away from the source and drain regions(Fig. 2 [106a/106b]), and a second end portion of the third body(Fig. 2 See figure below) is not in contact with any source or drain region.
It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Kar along the lines of Fujii. One might have been motivated to include the diffusion region and accompanying bodies in order to provide a back gate structure to the transistor(Fig. 2 [106a/105a/106b]) allowing for better tuning and control of the transistor structure, as suggested by Fujii(See paragraph 0045 of Fujii). Performing this modification would have generated a predicted result in an embodiment of Kar’s device with a back gate diffusion region as disclosed by Fujii.
Regarding Claim 7, Kar further discloses:
The first body(Fig. 2A [204]) is a fin based structure.
While Kar does not teach or disclose a second or third body, one of ordinary skill in the art would understand that in applying Fujii’s teaching to Kar’s device, the resulting device would retain Kar’s existing fin-type FET structure when adding the second and third bodies as discussed in the rejection of claim 6.
Regarding Claim 8, Kar discloses:
The body(Fig. 2A [204]) extends laterally from the source region(Fig. 2A [114-1]) toward the drain region(Fig. 2A [114-2]), such that a first end portion of the body(Fig. 2A [204]) is in contact with the source region, a middle portion(Fig. 2A [228-2]) of the body(Fig. 2A [204]) is in contact with the gate structure.
Kar does not teach or disclose a second end portion of the body is not in contact with any source or drain region.
In the same field of endeavor, Fujii discloses a second end portion(Fig. 2 See figure below) not in contact with any source or drain region(Fig. 2 [106a/106b]). This is due to the presence of a field oxide film(Fig. 2 [103]) in a local oxidation of silicon(LOCOS) structure.
It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Kar along the lines of Fujii. One might have been motivated to apply the second end portion not in contact with any source or drain region in the context of a field oxide in order to better isolate the channel from leakage from the source or gate. Performing this modification would have generated a predictable result in the creation of Kar’s device with a field oxide film between the gate structure and the drain.
Regarding Claim 9, Kar further discloses:
The body(Fig. 2A [204]) is the first body, wherein the integrated circuit structure further comprises:
A second body(Fig. 2A [204-3]) comprising semiconductor material above the sub-fin(Fig. 2A See figure below), the second body(Fig. 2A [204-3]) extending laterally between the source region(Fig. 2A [114-1]) and the drain region(Fig. 2A [114-2]), wherein the second body(Fig. 2A [204-3]) extends from the drain region(Fig. 2A [114-2]) towards the source region(Fig. 2A [114-1]).
Kar does not teach or disclose a structure comprising dielectric material laterally between and separating the second body and the first body.
In the same field of endeavor, Fujii discloses a structure(Fig. 2 [103]) comprising dielectric materially laterally separating the second body and the first body(Fig. 2 See figure below).
It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Kar along the lines of Fujii. One might have been motivated to add the dielectric structure between the source and drain regions in order to better isolate the channel from leakage from the source or gate. Performing this modification would have generated a predictable result in the creation of Kar’s device with a field oxide film between source and drain regions.
Regarding Claim 10,
Kar teaches a first body(fig. 2A [204]).
Kar does not teach or disclose each of the first and second bodies in contact with a structure comprising dielectric material.
In the same field of endeavor, Fujii discloses an end portion of each of the first and second bodies(Fig. 2 See figure below) is in contact with the structure comprising dielectric material(Fig. 2 [103]).
It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to further modify the device disclosed by Kar along the lines of Fujii. One might have been motivated to put a first and second body in contact with the dielectric structure as this is the most natural way by which a dielectric structure would separate isolated components. Performing this modification would have generated a predictable result in the creation of Kar’s device with a field oxide film between source and drain regions.
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701
652
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Above: Fig. 2A of Kar with sub-fin, first and second portion, gate electrode and gate dielectric denoted by examiner.
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858
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Above: Fig. 9C of Kar with interconnect, source and drain denoted by examiner.
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Above: Fig. 2 of Fujii with first, second, third bodies, first and second portions of the sub-fin, end portion denoted by examiner.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Nath et al.(US 20220115864 A1) discloses an ESD device with a sub-fin structure and a source/drain and diffusion region. Lee et al.(US 20150200168 A1) discloses a diffusion region with a dielectric structure between a source and drain.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARSHALL MU-NUO HATFIELD whose telephone number is (703)756-1506. The examiner can normally be reached Mon-Thus 11:00 AM-9:00PM EST.
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/MARSHALL MU-NUO HATFIELD/Examiner, Art Unit 2897