DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Applicant’s arguments and amendments filed November 10, 2025 have been entered and considered.
Election/Restrictions
Applicant’s election without traverse of Species 1D, Species 2D, Species 3C, including claims 1-5, 8-14, and 16-20 in the reply filed on June 9, 2025 is acknowledged.
However, claims 16-18 depend directly or indirectly on non-elected claim 15. Therefore, claims 16-18 are withdrawn since they appear to be supported by a non-elected species. Claims 6-7 are also withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on June 9, 2025.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 8-10 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 10629125 B2), in view of Choi et al. (EP 3696804 A1).
Regarding claim 1, Kim et al. teaches:
A display device [100, Col. 13, Lines 27-32, Fig. 12-15] comprising:
a substrate [110, Col. 13, Lines 27-32, Fig. 12-15] including a display area [A/A, Col. 13, Lines 27-32, Fig. 12-15] and a non-display area [B/A, Col. 13, Lines 27-32; Col. 13, Lines 43-47, Fig. 12-15];
pixels [P, Col. 13, Lines 27-47, Fig. 1-3, 12-15] disposed in the display area [A/A, Fig. 12-15] and including light emitting units [OLED, Col. 15, Lines 44-48; Col. 16, Lines 57-61, Fig. 15];
a first conductive pattern [VL, DL, GL, BSM, Col. 14, Lines 14-24, Fig. 13-14] disposed between the pixels [P, Fig. 13-14]; and
a power source line [VSM, Col. 13, Lines 48-67 to Col. 14, Lines 1-13, Fig. 12-15] disposed in the non-display area [B/A, Fig. 12-15] and electrically connected to the first conductive pattern [VL, DL, GL, BSM, Col. 15, Lines 25-31, Fig. 13-14] wherein
each of the light emitting units [OLED, Col. 16, Lines 57-61, Fig. 15] includes:
a light emitting element [270, Col. 16, Lines 42-48, Fig. 15];
a first pixel electrode [260, Col. 16, Lines 39-48, Fig. 15] disposed on a first end of the light emitting element [270, Fig. 15]; and
a second pixel electrode [280, Col. 16, Lines 48-61, Fig. 15] disposed on a second end of the light emitting element [270, Fig. 15], and
wherein the first conductive pattern [VL, DL, GL, BSM, Fig. 15] and the second pixel electrode [280, Fig. 15] are disposed on a same layer.
Kim et al. does not teach:
wherein the first conductive pattern and the second pixel electrode are disposed directly on a same layer.
Choi et al. teaches:
wherein the first conductive pattern [192, paragraph [0123], [0126], [0135], Fig. 10] and the second pixel electrode [191a, paragraph [0123], [0126], Fig. 10] are disposed directly on a same layer [182, Fig. 10].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Choi et al. into the teachings of Kim et al. to include wherein the first conductive pattern and the second pixel electrode are disposed directly on a same layer, for the purpose of providing voltage to the device, reducing density and reducing coupling. See also, MPEP 2144.04 (VI)(C) Rearrangement of Parts.
Regarding claim 2, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 1.
Kim et al. further teaches:
wherein the first conductive pattern [VL, DL, GL, BSM, Fig. 15] includes:
first pattern portions [VL, DL, Fig. 1, 13-14] extending in a first direction in the display area [A/A]; and
second pattern portions [GL, Fig. 1, 13-14] extending in a second direction in the display area [A/A].
Regarding claim 3, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 2.
Kim et al. further teaches:
wherein the first conductive pattern [VL, DL, GL, BSM, Fig. 1, 12-15] further includes a third pattern portion [BSM, Col. 13, Lines 48-67 to Col. 14, Lines 1-24, Fig. 12-15] disposed in the non-display area [B/A] and connected to the first pattern portions [VL, DL Col. 14, Lines 59-64; Col. 15, Lines 25-31, Fig. 12-15] and the second pattern portions [GL, Col. 14, Lines 59-64; Col. 15, Lines 25-31, Fig. 12-15]
Regarding claim 5, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 1.
Kim et al. further teaches:
the first conductive pattern [VL, DL, GL, BSM, Col. 13, Lines 48-64, Fig. 1, 12-15] extends to the non-display area [B/A, Fig. 12-15] and overlaps the power source line [VSM, Fig. 12-15], and
the first conductive pattern [VL, DL, GL, BSM, Fig. 1, 12-15] is directly connected to the power source line [VSM, Col. 16, Lines 10-14, Fig. 12].
Regarding claim 8, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 1.
Kim et al. further teaches:
wherein the power source line [VSM, Col. 13, Lines 48-67 to Col. 14, Lines 1-13; Fig. 2-3, 12-15] is electrically connected to the second pixel electrodes [280, Col. 14, Lines 37-48, Fig. 15] of the light emitting units [OLED, Col. 16, Lines 26-29, Fig. 2-3, 15].
Regarding claim 9, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 8.
Kim et al. further teaches:
wherein the first conductive pattern [VL, DL, GL, BSM, Fig. 12-15] and the second pixel electrodes [280, Col. 14, Lines 37-48, Fig. 15] of the light emitting units [OLED, Fig. 2-3, 15] are integral with each other.
Regarding claim 10, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 1.
Kim et al. further teaches:
the first pixel electrodes [260, Col. 16, Lines 26-27, Fig. 15] of the light emitting units [OLED, Fig. 2-3, 15] and the first conductive pattern [VL, DL, GL, BSM, Col. 14, Lines 19-25, Fig. 12-15] are disposed on different layers, and
the first pixel electrodes [260, Col. 16, Lines 26-27, Fig. 15] of the light emitting units [OLED, Fig. 15] and the second pixel electrodes [280, Col. 16, Lines 48-50, Fig. 15] of the light emitting units [OLED, Fig. 15] are disposed on different layers.
Regarding claim 19, Kim et al. teaches:
A display device [100, Fig. 12-15] comprising:
Pixels [P, Fig. 1-3, 12-15] including light emitting units [OLED, Fig. 15], each of the light emitting units [OLED, Fig. 15] including:
a light emitting element [270, Col. 16, Lines 42-48, Fig. 15]; and
pixel electrodes [260, 280, Col. 16, Lines 42-61, Fig. 15] electrically connected to the light emitting element [270, Fig. 15]; and
a conductive pattern [VL, DL, GL, BSM, Fig. 12-15] having a mesh shape and disposed around the pixels [P, Fig. 1-3, 12-15] to surround the light emitting units [OLED, Fig. 15], wherein
the conductive pattern [VL, DL, GL, BSM, Fig. 12-15] and at least one of the pixel electrodes [260, 280, Fig. 15] are disposed on a same layer.
Kim et al. does not teach:
wherein the first conductive pattern and the second pixel electrode are disposed directly on a same layer.
Choi et al. teaches:
wherein the first conductive pattern [192, paragraph [0123], [0126], [0135], Fig. 10] and the second pixel electrode [191a, paragraph [0123], [0126], Fig. 10] are disposed directly on a same layer [182, Fig. 10].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Choi et al. into the teachings of Kim et al. to include wherein the first conductive pattern and the second pixel electrode are disposed directly on a same layer, for the purpose of providing voltage to the device, reducing density and reducing coupling. See also, MPEP 2144.04 (VI)(C) Rearrangement of Parts.
Regarding claim 20, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 19.
Kim et al. further teaches:
a power source line [VSM, Col. 13, Lines 48-67 to Col. 14, Lines 1-13, Fig. 12-15] electrically connected to the conductive pattern [VL, DL, GL, BSM, Col. 15, Lines 25-31, Fig. 12-15].
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 10629125 B2), in view of Choi et al. (EP 3696804 A1) as applied to claim 3 above, and further in view of another embodiment of Kim et al. (US 10629125 B2). Another embodiment of Kim et al. (US 10629125 B2) will hereby be referred to as Kim et al. (Fig. 17).
Regarding claim 4, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 3.
Kim et al. and Choi et al. do not teach:
wherein the third pattern portion surrounds the display area when viewed on a plane.
Kim et al. (Fig. 17) teaches:
wherein the third pattern portion [BSM, Col. 18, Lines 15-29, Fig. 17] surrounds the display area [A/A, Fig. 17] when viewed on a plane.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Kim et al. (Fig. 17) into the teachings of Kim et al. and Choi et al. to include wherein the third pattern portion surrounds the display area when viewed on a plane, for the purpose of connecting and supplying power to features within the device. See also, MPEP 2144.04(VI)(C) Rearrangement of Parts.
Claims 11 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 10629125 B2), in view of Choi et al. (EP 3696804 A1) as applied to claim 10 above, and further in view of Long (CN 111831172 A).
Regarding claim 11, Kim et al. and Choi et al. teach the display device [100, Fig. 12-15] of claim 10.
Kim et al. and Choi et al. not teach:
a second conductive pattern overlapping the first conductive pattern and electrically connected to the first conductive pattern.
Long teaches:
a second conductive pattern [212, paragraph [0075], Fig. 3E, 4A] overlapping the first conductive pattern [211, paragraph [0075], Fig. 3E, 4A] and electrically connected to the first conductive pattern [211, Fig. 3E, 4A].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Long into the teachings of Kim et al. and Choi et al. to include a second conductive pattern overlapping the first conductive pattern and electrically connected to the first conductive pattern, for the purpose of improving connections and performance.
Regarding claim 13, Kim et al., Choi et al., and Long teach the display device [100, Fig. 12-15] of claim 11.
Kim et al. further teaches:
the first conductive pattern [VL, DL, GL, BSM, Col. 14, Lines 2-13, Fig. 12-15] has a mesh shape and includes:
first pattern portions [VL, DL, Fig. 12-15] extending in a first direction in the display area [A/A]; and
second pattern portions [GL, Fig. 12-15] extending in a second direction in the display area [A/A].
Kim et al. and Choi et al. do not teach:
the second conductive pattern has a mesh shape and includes:
third pattern portions overlapping the first pattern portions; and
fourth pattern portions overlapping the second pattern portions.
Long teaches:
the second conductive pattern [212/272, paragraph [0133], [0135], Fig. 9] has a mesh shape and includes:
third pattern portions [272 (vertical), Fig. 9] overlapping the first pattern portions [213 (vertical), Fig. 9]; and
fourth pattern portions [272 (horizontal), Fig. 9] overlapping the second pattern portions [213 (horizontal), Fig. 9].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Long into the teachings of Kim et al., Choi et al. and Long to include the second conductive pattern has a mesh shape and includes: third pattern portions overlapping the first pattern portions; and fourth pattern portions overlapping the second pattern portions, for the purpose of improving connections and performance, improving protection of pixels and preventing short circuits.
Claims 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 10629125 B2), in view of Choi et al. (EP 3696804 A1) and Long (CN 111831172 A) as applied to claim 11 above, and further in view of Hara et al. (US 20120091479 A1).
Regarding claim 12, Kim et al., Choi et al., and Long teach the display device [100, Fig. 12-15] of claim 11.
Kim et al., Choi et al., and Long do not teach:
wherein the second conductive pattern and the first pixel electrodes of the light emitting units are disposed on a same layer.
Hara et al. teaches:
wherein the second conductive pattern [132, paragraph [0010], [0083], Fig. 9A] and the first pixel electrodes [118/135, paragraph [0083], Fig. 9A] of the light emitting units are disposed on a same layer.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Hara et al. into the teachings of Kim et al., Choi et al., and Long to include wherein the second conductive pattern and the first pixel electrodes of the light emitting units are disposed on a same layer, for the purpose of increasing density, preventing short circuits and improving symmetry.
Regarding claim 14, Kim et al., Choi et al., and Long teach the display device [100, Fig. 12-15] of claim 11.
Kim et al., Choi et al., and Long do not teach:
wherein the second conductive pattern and the first pixel electrodes of the light emitting units are separated from each other.
Hara et al. teaches:
wherein the second conductive pattern [131, paragraph [0081], Fig. 9A] and the first pixel electrodes [118, Fig. 9A] of the light emitting units are separated from each other.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the teachings of Hara et al. into the teachings of Kim et al., Choi et al., and Long to include wherein the second conductive pattern and the first pixel electrodes of the light emitting units are separated from each other, for the purpose of improving image resolution and efficiency, improving performance and increasing flexibility.
Response to Arguments
Applicant’s arguments with respect to independent claims 1 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant argues on pages 1-3, Section: I. Claim Rejections under 35 U.S.C. §102(a) and 103, in remarks filed November 10, 2025 that the prior art of record does not teach the amended limitations of independent claims 1 and 19. Examiner agrees with Applicant, however, after a new line of search and consideration the amended limitations of independent claims 1 and 19 can be overcome by newly cited source Choi et al. (EP 3696804 A1).
Applicant argues on page 3 of remarks filed November 10, 2025 that due to the amendment of independent claims 1 and 19, dependent claims 2-5, 8-14, and 20 should be allowable. Examiner disagrees with Applicant for at least the reasons mentioned above.
In summary, the amended limitations of independent claims 1 and 19 can be overcome by newly cited source Choi et al. (EP 3696804 A1). All claims directly or indirectly dependent on independent claims 1 and 19 are also rejected for at least the reason mentioned above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID MICHAEL HELBERG whose telephone number is (571)270-1422. The examiner can normally be reached Mon.-Fri. 8am-5pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez can be reached at (571)270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/D.M.H./Examiner, Art Unit 2815 02/03/2026
/MONICA D HARRISON/Primary Examiner, Art Unit 2815