Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 17947071 filed on 09/16/2022.
Election/Restrictions
Applicant’s election without traverse of 10-34 in the reply filed on 12/23/2024 is acknowledged.
Allowable subject matter
Claims 12-14, 28 are objected to as being dependent upon a rejected base claim (independent claims 10 & 26), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kijima et al. (US 2007/0126042).
With respect to dependent claims 12-14, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a first dielectric material on the first source/drain material, wherein a portion of the first source/drain material is between the first dielectric material and the semiconductor channel material layer; and a second dielectric material on the second source/drain material, wherein a portion of the second source/drain material is between the second dielectric material and the semiconductor channel material layer”.
With respect to dependent claim 28, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a first dielectric material on the first source/drain material, wherein a portion of the first source/drain material is between the first dielectric material and the semiconductor channel material layer; and a second dielectric material on the second source/drain material, wherein a portion of the second source/drain material is between the second dielectric material and the semiconductor channel material layer”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 10-11, 15-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kijima et al. (US 2007/0126042).
Regarding independent claim 10, Kijima et al. teach a transistor device comprising:
a substrate (Fig. 3, element 10, paragraph 0128);
a semiconductor channel material layer (Fig. 3, element 50, paragraph 0128) on the substrate;
a first source/drain material (Fig. 3, element 40, paragraph 0128) on a first side of the semiconductor channel material layer;
a second source/drain material (Fig. 3, element 42, paragraph 0128) on a second side of the semiconductor channel material layer opposite the first side;
a ferroelectric (FE) material layer (Fig. 3, element 30, paragraph 0128) on the semiconductor channel material layer and between the first source/drain material and the second source/drain material; and
a gate material (Fig. 3, element 20, paragraph 0128) on the FE material layer;
wherein a first portion of the FE material layer is directly between the gate material and the first source/drain material, and a second portion of the FE material layer is directly between the gate material and the second source/drain material (Fig. 3).
Regarding claim 11, Kijima et al. teach wherein the FE material is further on the first source/drain material, and further on the second source/drain material (Fig. 3).
Regarding claim 15, Kijima et al. teach wherein the FE material layer includes a perovskite material (paragraph 0092).
Regarding claim 16, Kijima et al. teach wherein the FE material layer includes one or more of Barium, Titanium, Zirconium, Calcium, Strontium, Lanthanum, Bismuth, Iron, Cobalt, Lithium, Niobium, Potassium, and Oxygen (paragraph 0092).
Regarding claim 17, Kijima et al. teach wherein the semiconductor channel material layer includes one or more of Barium, Tin, Lanthanum, Neodymium, Strontium, Titanium, Indium, Gallium, Zinc, Nickel, and Oxygen (paragraph 0095).
Regarding claim 18, Kijima et al. teach wherein the first source/drain material and the second source/drain material each comprise one or more of Strontium, Ruthenium, Barium, Lanthanum, Tin, Manganese, Cobalt, Nickel, Yttrium, Copper, Vanadium, Molybdenum, Platinum, Iridium, Palladium, Tungsten, and Oxygen (paragraph 0090, 0094).
Claims 19-21, 24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US 2025/0169097).
Regarding independent claim 19, Wang et al. teach a transistor device comprising:
a substrate (Fig. 7A, element substrate, paragraph 0085);
a semiconductor channel material layer (Fig. 7A, element semiconductor, paragraph 0085) on the substrate;
a first source/drain material (Fig. 7A, element S, paragraph 0085) on the substrate adjacent the semiconductor material layer;
a second source/drain material (Fig. 7A, element D, paragraph 0085) on the substrate adjacent the semiconductor material layer and on an opposite side of the semiconductor channel material layer from the first source/drain material;
a ferroelectric (FE) material layer (Fig. 7A, element Sc.sub.xAl.sub.1-xN, paragraph 0085) on the semiconductor channel material layer; and
a gate material (Fig. 7A, element Gate, paragraph 0085) on the FE material layer,
wherein a length of contact between the FE material layer and the gate material is less than a length of contact between the semiconductor channel material layer and the FE material layer (Fig. 7A).
Regarding claim 20, Wang et al. teach wherein the FE material is further on a portion of the first source/drain material and on a portion of the second source/drain material (Fig. 7A discloses a portion of the FE material above and in contact with a portion of the first and second source/drain material).
Regarding claim 21, Wang et al. teach wherein the first source/drain material is further on a portion of the semiconductor channel material layer, the second source/drain material is further on a portion of the semiconductor channel material layer, and a portion of the FE material layer is between the first source/drain material and the second source/drain material (Fig. 7A discloses a portion of the first and second source/drain material above and in contact with the FE material).
Regarding claim 24, Wang et al. teach wherein the semiconductor channel material layer includes one or more of Barium, Tin, Lanthanum, Neodymium, Strontium, Titanium, Indium, Gallium, Zinc, Nickel, and Oxygen (paragraph 0062).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2025/0169097).
Regarding claim 22, Wang et al. teach wherein the FE material layer includes a perovskite material (Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select a known ferroelectric material such as perovskite as disclosed in paragraph 0099, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416).
Regarding claim 23, Wang et al. teach wherein the FE material layer includes one or more of Barium, Titanium, Zirconium, Calcium, Strontium, Lanthanum, Bismuth, Iron, Cobalt, Lithium, Niobium, Potassium, and Oxygen (Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select a known ferroelectric material such as perovskite as disclosed in paragraph 0099, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416).
Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 2025/0169097) in view of Kijima et al. (US 2007/0126042).
Regarding claim 25, Wang et al. teach all of the limitations as discussed above.
Wang et al. do not explicitly disclose wherein the first source/drain material and the second source/drain material each comprise one or more of Strontium, Ruthenium, Barium, Lanthanum, Tin, Manganese, Cobalt, Nickel, Yttrium, Copper, Vanadium, Molybdenum, Platinum, Iridium, Palladium, Tungsten, and Oxygen.
Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select a known ferroelectric material such as iridium as disclosed in paragraph 0090, 0094 of Kijima, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416
Claims 26-27, 29-34 are rejected under 35 U.S.C. 103 as being unpatentable over Kijima et al. (US 2007/0126042).
Regarding Independent claim 26, Kijima et al. teach an integrated circuit device comprising:
a plurality of transistors (Fig. 3, element 200, paragraph 0127 discloses a transistor. Fig. 7 in an embodiment of manufacturing discloses a plurality of transistors) on a substrate (Fig. 3, element 10, paragraph 0128),
each transistor comprising:
a semiconductor channel material (Fig. 3, element 50, paragraph 0128) layer on the substrate;
a first source/drain material (Fig. 3, element 40, paragraph 0128) on a first side of the semiconductor channel material layer;
a second source/drain material (Fig. 3, element 42, paragraph 0128) on a second side of the semiconductor channel material layer opposite the first side;
a ferroelectric (FE) material layer (Fig. 3, element 30, paragraph 0128) on the semiconductor channel material layer and between the first source/drain material and the second source/drain material; and
a gate material (Fig. 3, element 20, paragraph 0128) on the FE material layer;
wherein a first portion of the FE material layer is directly between the gate material and the first source/drain material, and a second portion of the FE material layer is directly between the gate material and the second source/drain material (Fig. 3).
Regarding claim 27, Kijima et al. teach wherein the FE material of each transistor is further on the first source/drain material and further on the second source/drain material (Fig. 3).
Regarding claim 29, Kijima et al. teach wherein the FE material layer includes a perovskite material (paragraph 0092).
Regarding claim 30, Kijima et al. teach wherein the FE material layer includes one or more of Barium, Titanium, Zirconium, Calcium, Strontium, Lanthanum, Bismuth, Iron, Cobalt, Lithium, Niobium, Potassium, and Oxygen (paragraph 0092).
Regarding claim 31, Kijima et al. teach wherein the semiconductor channel material layer includes one or more of Barium, Tin, Lanthanum, Neodymium, Strontium, Titanium, Indium, Gallium, Zinc, Nickel, and Oxygen (paragraph 0095).
Regarding claim 32, Kijima et al. teach wherein the first source/drain material and the second source/drain material each comprise one or more of Strontium, Ruthenium, Barium, Lanthanum, Tin, Manganese, Cobalt, Nickel, Yttrium, Copper, Vanadium, Molybdenum, Platinum, Iridium, Palladium, Tungsten, and Oxygen (paragraph 0090, 0094).
Regarding claim 33, Kijima et al. teach wherein the substrate comprises one or more of Strontium, Titanium, Dysprosium, Gadolinium, Scandium, and Oxygen (paragraph 0089).
Regarding claim 34, Kijima et al. teach comprising an integrated circuit die (Fig. 7, element 200) and a package substrate (Fig. 7, element 10), the integrated circuit die comprising the plurality of transistors (Fig. 7).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813