Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed on 06/16/2026 under 37 CFR 1.131 has been considered.
Regarding independent claims 10, 16 applicant argues that the prior art does not teach amended limitation “wherein the FE material is arranged such that a tilted electric field is induced in the FE material layer between the gate material and the first source/drain material and between the gate material and the second source/drain material based on a voltage applied to the gate material”.
The examiner would like to note that the amended limitation is an intended use recitation. The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. See, e.g., In re Schreiber, 128 F.3d 1473, 1477, 44 USPQ2d 1429, 1431 (Fed. Cir. 1997); In re Otto, 136 USPQ 458,459 (CCPA 1963). The examiner would further like to note that the amended limitation does not claim any structural distinction between instant application over prior art that would result in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material. The amended limitation recites ““wherein the FE material is arranged such that…..” but fails to disclose the arrangement of the FE material that results in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material.
Applicant’s argument is persuasive regarding claims 19, 21-25. Accordingly, claims 19, 21-25 are allowed.
DETAILED ACTION
This action is responsive to application No. 17947071 filed on 09/16/2022.
Election/Restrictions
Applicant’s election without traverse of 10-34 in the reply filed on 12/23/2024 is acknowledged.
Allowable subject matter
Claims 12-14, 28 are objected to as being dependent upon a rejected base claim (independent claims 10 & 26), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kijima et al. (US 2007/0126042).
With respect to dependent claims 12-14, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a first dielectric material on the first source/drain material, wherein a portion of the first source/drain material is between the first dielectric material and the semiconductor channel material layer; and a second dielectric material on the second source/drain material, wherein a portion of the second source/drain material is between the second dielectric material and the semiconductor channel material layer”.
With respect to dependent claim 28, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a first dielectric material on the first source/drain material, wherein a portion of the first source/drain material is between the first dielectric material and the semiconductor channel material layer; and a second dielectric material on the second source/drain material, wherein a portion of the second source/drain material is between the second dielectric material and the semiconductor channel material layer”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 10-11, 15-18, 26-27, 29-34 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kijima et al. (US 2007/0126042).
Regarding independent claim 10, Kijima et al. teach a transistor device comprising:
a substrate (Fig. 3, element 10, paragraph 0128);
a semiconductor channel material layer (Fig. 3, element 50, paragraph 0128) on the substrate;
a first source/drain material (Fig. 3, element 40, paragraph 0128) on a first side of the semiconductor channel material layer;
a second source/drain material (Fig. 3, element 42, paragraph 0128) on a second side of the semiconductor channel material layer opposite the first side;
a ferroelectric (FE) material layer (Fig. 3, element 30, paragraph 0128) on the semiconductor channel material layer and between the first source/drain material and the second source/drain material; and
a gate material (Fig. 3, element 20, paragraph 0128) on the FE material layer;
wherein a first portion of the FE material layer is directly between the gate material and the first source/drain material, and a second portion of the FE material layer is directly between the gate material and the second source/drain material (Fig. 3),
wherein the FE material is arranged such that a tilted electric field is induced in the FE material layer between the gate material and the first source/drain material and between the gate material and the second source/drain material based on a voltage applied to the gate material (The examiner would like to note that the amended limitation is an intended use recitation. The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. See, e.g., In re Schreiber, 128 F.3d 1473, 1477, 44 USPQ2d 1429, 1431 (Fed. Cir. 1997); In re Otto, 136 USPQ 458,459 (CCPA 1963). The examiner would further like to note that the amended limitation does not claim any structural distinction between instant application over prior art that would result in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material. The amended limitation recites ““wherein the FE material is arranged such that…..” but fails to disclose the arrangement of the FE material that results in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material).
Regarding claim 11, Kijima et al. teach wherein the FE material is further on the first source/drain material, and further on the second source/drain material (Fig. 3).
Regarding claim 15, Kijima et al. teach wherein the FE material layer includes a perovskite material (paragraph 0092).
Regarding claim 16, Kijima et al. teach wherein the FE material layer includes one or more of Barium, Titanium, Zirconium, Calcium, Strontium, Lanthanum, Bismuth, Iron, Cobalt, Lithium, Niobium, Potassium, and Oxygen (paragraph 0092).
Regarding claim 17, Kijima et al. teach wherein the semiconductor channel material layer includes one or more of Barium, Tin, Lanthanum, Neodymium, Strontium, Titanium, Indium, Gallium, Zinc, Nickel, and Oxygen (paragraph 0095).
Regarding claim 18, Kijima et al. teach wherein the first source/drain material and the second source/drain material each comprise one or more of Strontium, Ruthenium, Barium, Lanthanum, Tin, Manganese, Cobalt, Nickel, Yttrium, Copper, Vanadium, Molybdenum, Platinum, Iridium, Palladium, Tungsten, and Oxygen (paragraph 0090, 0094).
Regarding Independent claim 26, Kijima et al. teach an integrated circuit device comprising:
a plurality of transistors (Fig. 3, element 200, paragraph 0127 discloses a transistor. Fig. 7 in an embodiment of manufacturing discloses a plurality of transistors) on a substrate (Fig. 3, element 10, paragraph 0128),
each transistor comprising:
a semiconductor channel material (Fig. 3, element 50, paragraph 0128) layer on the substrate;
a first source/drain material (Fig. 3, element 40, paragraph 0128) on a first side of the semiconductor channel material layer;
a second source/drain material (Fig. 3, element 42, paragraph 0128) on a second side of the semiconductor channel material layer opposite the first side;
a ferroelectric (FE) material layer (Fig. 3, element 30, paragraph 0128) on the semiconductor channel material layer and between the first source/drain material and the second source/drain material; and
a gate material (Fig. 3, element 20, paragraph 0128) on the FE material layer;
wherein a first portion of the FE material layer is directly between the gate material and the first source/drain material, and a second portion of the FE material layer is directly between the gate material and the second source/drain material (Fig. 3), and
a tilted electric field is to be induced in the FE material layer based on a voltage applied to the gate material (The examiner would like to note that the amended limitation is an intended use recitation. The examiner notes that a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. See, e.g., In re Schreiber, 128 F.3d 1473, 1477, 44 USPQ2d 1429, 1431 (Fed. Cir. 1997); In re Otto, 136 USPQ 458,459 (CCPA 1963). The examiner would further like to note that the amended limitation does not claim any structural distinction between instant application over prior art that would result in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material. The amended limitation recites ““wherein the FE material is arranged such that…..” but fails to disclose the arrangement of the FE material that results in a tilted electric field induced by the FE material layer based on a voltage applied to the gate material).
Regarding claim 27, Kijima et al. teach wherein the FE material of each transistor is further on the first source/drain material and further on the second source/drain material (Fig. 3).
Regarding claim 29, Kijima et al. teach wherein the FE material layer includes a perovskite material (paragraph 0092).
Regarding claim 30, Kijima et al. teach wherein the FE material layer includes one or more of Barium, Titanium, Zirconium, Calcium, Strontium, Lanthanum, Bismuth, Iron, Cobalt, Lithium, Niobium, Potassium, and Oxygen (paragraph 0092).
Regarding claim 31, Kijima et al. teach wherein the semiconductor channel material layer includes one or more of Barium, Tin, Lanthanum, Neodymium, Strontium, Titanium, Indium, Gallium, Zinc, Nickel, and Oxygen (paragraph 0095).
Regarding claim 32, Kijima et al. teach wherein the first source/drain material and the second source/drain material each comprise one or more of Strontium, Ruthenium, Barium, Lanthanum, Tin, Manganese, Cobalt, Nickel, Yttrium, Copper, Vanadium, Molybdenum, Platinum, Iridium, Palladium, Tungsten, and Oxygen (paragraph 0090, 0094).
Regarding claim 33, Kijima et al. teach wherein the substrate comprises one or more of Strontium, Titanium, Dysprosium, Gadolinium, Scandium, and Oxygen (paragraph 0089).
Regarding claim 34, Kijima et al. teach comprising an integrated circuit die (Fig. 7, element 200) and a package substrate (Fig. 7, element 10), the integrated circuit die comprising the plurality of transistors (Fig. 7).
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAHED AHMED/Primary Examiner, Art Unit 2813
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