DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Application
1. Acknowledgement is made of the amendment received on 8/22/2025. Claims 1-4 & 6-20 are pending in this application. Claim 5 is canceled. Claims 11-20 are withdrawn.
Claims 1-4 & 6-10 are examined in this Office Action.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
2. Claims 1-4 and 6-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In particular, claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements. See MPEP § 2172.01. The omitted elements are: channel region(s), source region(s), word line(s), bit line(s) & isolation structure(s) (refer to a semiconductor structure, Figs. 2-3).
For best understanding and examination purpose, the claim(s) will be best considered based on drawings, disclosure, and/or any applicable prior arts.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
3. Claim(s) 1-4 and 6-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Changxin Memory Tech Inc. (CN 110957319A, “Changxin19”).
Re claim 1, Changxin19 teaches, under BRI, Figs. 1a-3 & 8a-11b, pages 7-15, a semiconductor structure, comprising:
-a base (100, 200, 600), wherein a first doped region (e.g., doped ions of bit line contact layer or first doped region 300D) is provided in the base (100, 200, 600) (Figs. 2a-c); and
-an active pillar group (300) provided in the first doped region, wherein the active pillar group comprises four active pillars arranged in an array, wherein at least one of the active pillars (300) is provided with a notch (at V corner, Fig. 8b), wherein the notch faces at least one of a row centerline or a column centerline of the active pillar group (300), and each of the active pillars (300) comprises a drain region (300D) (Fig. 2c); wherein each of the active pilar groups further comprises a channel connecting region (region of 200 between adjacent 300), and in each of the active pillar groups (300), drain regions (300D) of the active pillars (300) are electrically connected to each other through the channel connecting region (region of 200 between adjacent 300) (Figs. 2b-c).
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Re claim 2, Changxin19 teaches, Figs. 1b, 8b & 9a, each of the active pillars (300) comprises a first pillar part (top/bottom part of 300) and a second pillar part (left/right part of 300) connected to the first pillar part (Fig. 8b); and the first pillar part and the second pillar part enclose the notch (at V corner), wherein among two active pillars (300) in a same row, a second pillar part is disposed on a side of a first pillar part facing another first pillar part (Figs. 1b & 9a).
Re claim 3, Changxin19 teaches, Figs. 1b, 8b & 9a, among two active pillars (300) in a same column, the second pillar part (left/right part of 300) is disposed at one end of the first pillar part away from another first pillar part, and notches (at V corner) provided in two active pillars (300) located diagonally face each other (vs. Fig. 9 of the Application).
Re claim 4, Changxin19 teaches, Figs. 1b & 9a, multiple active pillar groups are provided, and the multiple active groups are arranged in an array in the base (100, 200, 600).
Re claim 6, Changxin19 teaches, under BRI, Figs. 2b-c, , each of the active pillars (300) comprises the drain region (300D), a channel region (center part of 300) and a source region (300S) sequentially stacked from bottom to top in the direction perpendicular to the base (100, 200, 600); and wherein in each of the active pillar groups (300), channel regions (center part of 300) are connected (via 300D) to the channel connecting region (of 200), and the channel connecting region (of 200) is connected to the base (100, 200, 600).
Re claim 7, Changxin19 teaches, under BRI, Figs. 1b-2c, multiple first bit lines (200, top 2) and multiple second bit lines (200, bottom 2) (Fig. 1b), wherein the multiple first bit lines and the multiple second bit lines are alternately arranged in a first direction (y axis), and the first bit lines and the second bit lines extend in a second direction (x axis), wherein the first direction (y axis) intersects the second direction (x axis); and
wherein each of the active pillar groups (300) comprises a first surface and a second surface disposed oppositely in the first direction (y axis): wherein a first bit line (200) is arranged on the first surface and connects the drain regions (300D) of the active pillars (300) in a same column corresponding to the first surface; and a second bit line (200) is arranged on the second surface and connects the drain regions (300D) of the active pillars (300) in a sane column corresponding to the second surface.
Re claim 8, Changxin19 teaches, under BRI, Figs. 1b-2c, multiple first word lines and multiple second word lines (400) (Fig. 1b), wherein the multiple first word lines and the multiple second word lines (400) are alternately arranged in the second direction (x axis), and the first word lines and the second word Iines (400) extend in the first direction (y axis); and
wherein in the second direction, each of the active pillar groups (300) comprises a third surface and a fourth surface disposed oppositely; wherein a first word line (400) is arranged on the third surface and connects the channel regions (center of 300) of the active pillars (300) in a same row corresponding to the third surface; and a second word lines (400) is arranged on the fourth surface and connects the channel regions (center of 300) of the active pillars (300) in a same row corresponding to the fourth surface.
Re claim 9, Changxin19 teaches, Figs. 1b-2c, page 11, 3rd par., a multiple isolation structures (spacing dielectric 700), wherein each of the isolation structures (700) is arranged in an area enclosed by the multiple active pillars (4 pillars) in each of the active pillar groups, and bottom surfaces of the isolation structures (700) is higher than top surfaces of the drain regions (300D).
Re claim 10, Changxin19 teaches, Fig. 2a, a capacitor (C) is provided on each of the active pillars (300).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Satoh et al. (US 2013/0056698).
Re claim 1, Satoh teaches, under BRI, Figs. 2-3B, [0022, 0024] a semiconductor structure, comprising:
-a base (102), wherein a first doped region (p-type conductivity & 118) is provided in the base (102); and
-an active pillar group (104, 106, 120) provided in the first doped region, wherein the active pillar group (120, 104) comprises four active pillars (120, 104) arranged in an array, wherein at least one of the active pillars (120, 104) is provided with a notch (formed by 122 & 114 on side of 120, Fig. 3A), wherein the notch faces at least one of a row centerline or a column centerline of the active pillar group (104, 106, 120).
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Satoh does not explicitly teach each of the active pillars comprises a drain region; wherein each of the active pillar groups further comprises a channel connecting region, and in each of the active pillar groups, drain regions of the active pillars are electrically connected to each other through the channel connecting region.
Satoh’s Fig. 1 teaches, under BRI, [0005], each of the active pillars (82) comprises a drain region (Drain); wherein each of the active pillar groups (82) further comprises a channel connecting region (silicon substrate 80), and in each of the active pillar groups, drain regions (Drain) of the active pillars (82) are electrically connected to each other through the channel connecting region (80).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Satoh’s Fig. 1 to obtain each of the active pillars comprises a drain region; wherein each of the active pillar groups further comprises a channel connecting region, and in each of the active pillar groups, drain regions of the active pillars are electrically connected to each other through the channel connecting region as claimed, because it aids in increasing device density in the formed device/structure.
Response to Arguments
5. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection. Response to arguments on newly added limitations are responded to in the above rejection.
The claims are amended with newly added features, rejection/interpretation under Changxin19 & Satoh are also changed to meet the currently amended claims. As discussed above, under BRI, Changxin19 & Satoh both teach newly added limitation of claim 1: “each of the active pillars comprises a drain region; wherein each of the active pillar groups further comprises a channel connecting region, and in each of the active pillar groups, drain regions of the active pillars are electrically connected to each other through the channel connecting region.”
Details included in the above rejection.
Rejection of claim under Chang et al. is withdrawn due to the currently amended claims.
Conclusion
6. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
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/DUY T NGUYEN/Primary Examiner, Art Unit 2818 8/30/25
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