Prosecution Insights
Last updated: April 18, 2026
Application No. 17/951,162

NO-LEAD INTEGRATED CIRCUIT HAVING AN ABLATED MOLD COMPOUND AND EXTRUDED CONTACTS

Final Rejection §103
Filed
Sep 23, 2022
Examiner
CHOUDHRY, MOHAMMAD M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
2y 10m
To Grant
95%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
561 granted / 686 resolved
+13.8% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
35 currently pending
Career history
721
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
73.7%
+33.7% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
4.8%
-35.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 686 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the 20claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 is rejected under 35 U.S.C. 103 as being unpatentable over Derai et al. (U S 2019/0115287, hereinafter Derai) in view of Boonyatee et al. (US 2019/0252256, hereinafter Boonyatee) and further in view of Perez et al. (US 6,965,157, hereinafter Perez). With respect to claim 1, Derai discloses a method (Para 0160) comprising: providing leadframes (14 of Fig. 2 – Para 0123); depositing a die (12) on a die attach pad of each leadframe (Para 0054 – die pad); attaching wire bonds (20) from the die to bonding surfaces of contacts of each leadframe (Para 0065 & 0158 – wire -bonding); depositing a mold compound (16) overlying the leadframes (Fig. 2), the mold compound encapsulating each of the die and the wire bonds (16 encapsulates die 12 and wire bonds 20); ablating, via a laser (Para 0097; and 0109), the mold compound in an ablation pathway aligned between adjacent contacts of adjacent leadframes (Fig. 11-13). Derai does not explicitly disclose an array of leadframes and singulating the array of leadframes to form electronic device packages. In an analogous art, Boonyatee discloses an array of leadframes (Fig. 1; Para 0005; 0012 – leadframes arranged in an array) and singulating the array of leadframes to form electronic device packages (Para 0011; 0013; and 0026). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai’s method by having Boonyatee’s disclosure in order to singulate adjacent, simultaneously assembled devices without forming burrs on the leads or lead tips. Derai/Boonyatee does not explicitly disclose wherein each contact comprises at least one groove in a surface opposite the bonding surface. In an analogous art, Perez discloses wherein each contact comprises at least one groove (Fig. 6 – groove on the back side of 40/16/42) in a surface opposite the bonding surface (grooves are on the back side whereas bonding is on the front side). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee’s method by having Perez’s disclosure in order to provide a locking mechanism with other components of a semiconductor device. Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Perez in view of Sirinorakul et al. (US 2010/0311208, hereinafter Sirinorakul). With respect to claim 2, Derai/Boonyatee/Perez does not explicitly disclose wherein prior to depositing a die on the die attach pad of each leadframe of the array of leadframes, the method further comprising performing a first etching process to form the die attach pad and the contacts in each leadframe of the array of leadframes. In an analogous art, Sirinorakul discloses wherein prior to depositing a die on the die attach pad of each leadframe of the array of leadframes (Para 0007-0008), the method further comprising performing a first etching process to form the die attach pad and the contacts in each leadframe of the array of leadframes (Para 0040 & 0063). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez’s method by having Sirinorakul’s disclosure in order to attach different components of a semiconductor device. With respect to claim 3, Derai/Boonyatee does not explicitly disclose wherein performing a second etching process to form the grooves. In an analogous art, Perez discloses wherein performing a second etching process to form the grooves (Col. 3; lines 36-42; Col. 4; lines 22-24). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee’s method by having Perez’s disclosure in order to manufacture and connect different components of a semiconductor device. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Perez in view of Godfrey (US 2020/0144786, hereinafter Godfrey). With respect to claim 4 Derai/Boonyatee/Perez does not explicitly disclose wherein ablating the mold compound forms an angled side surface of the mold compound, the angled side surface extending from a first surface of the mold compound to the bonding surface of each of the contacts. In an analogous art, Godfrey discloses wherein ablating the mold compound forms an angled side surface of the mold compound (Para 0046, Fig. 9B), the angled side surface extending from a first surface of the mold compound to the bonding surface of each of the contacts (Fig. 9B&D). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez’s method by having Godfrey’s disclosure in order to provide vias in a semiconductor device. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Perez in view of Song (KR 20150096756, hereinafter Song). With respect to claim 6, Derai/Boonyatee/Perez does not explicitly disclose wherein ablating, via a laser, the mold compound in an ablation pathway aligned between adjacent contacts of adjacent leadframes includes setting a frequency of the laser to approximately 25-35 kHz and a current to approximately 25-30 A. In an analogous art, Song discloses wherein ablating, via a laser, the mold compound in an ablation pathway aligned between adjacent contacts of adjacent leadframes includes setting a frequency of the laser to approximately 25-35 kHz (Para 0044 – 30 kHz) and a current to approximately 25-30 A (Para 0044 – 24-30A). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez’s method by having Song’s disclosure in order to expedite the etching process. Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Perez/Song in view of Chen (CN 113795910, hereinafter Chen). With respect to claim 7, Derai/Boonyatee/Perez/Song does not explicitly disclose wherein the laser ablates the mold compound for a duration of approximately 100-200 ns. In an analogous art, Chen discloses wherein the laser ablates the mold compound for a duration of approximately 100-200 ns (Page 31, Para 02). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez/Song’s method by having Chen’s disclosure in order to achieve the optimal results during etching. With respect to claim 8, Derai/Boonyatee/Perez/Song does not explicitly disclose wherein the laser ablates the mold compound to a depth of approximately 0.55-1.50 mm. In an analogous art, Chen discloses wherein the laser ablates the mold compound to a depth of approximately 0.55-1.50 mm (Page 22, Para 01- 1mm). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez/Song’s method by having Chen’s disclosure in order to achieve the optimal results during etching. Claims 9 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Godfrey in view of Perez. With respect to claim 9, Derai discloses a method of fabricating a no-lead integrated circuit (Para 0063 and 0111) comprising: providing leadframes (14 of Fig. 2 – Para 0123); depositing a die (12) on a die attach pad of each leadframe (Para 0054 – die pad); attaching wire bonds (20) from the die to bonding surfaces of contacts of each leadframe (Para 0065 & 0158 – wire -bonding); depositing a mold compound (16) overlying the leadframes (Fig. 2), the mold compound encapsulating each of the die and the wire bonds (16 encapsulates die 12 and wire bonds 20); ablating, via a laser (Para 0097; and 0109), the mold compound in an ablation pathway (Fig. 11-13). Derai does not explicitly disclose an array of leadframes; and the mold compound was aligned between adjacent contacts of adjacent leadframes and ablation is performed to form angled side surfaces of the mold compound; and singulating the array of leadframes to form the no-lead integrated circuit. In an analogous art, Boonyatee discloses an array of leadframes (Fig. 1; Para 0005; 0012 – leadframes arranged in an array) and singulating the array of leadframes to form the no-lead integrated circuit (Para 0010-0011). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai’s method system by having Boonyatee’s disclosure in order to singulate adjacent, simultaneously assembled devices without forming burrs on the leads or lead tips. Derai/Boonyatee does not explicitly disclose that the mold compound was aligned between adjacent contacts of adjacent leadframes and ablation is performed to form angled side surfaces of the mold compound. In an analogous art, Godfrey discloses that the mold compound was aligned between adjacent contacts of adjacent leadframes and ablation is performed to form angled side surfaces of the mold compound (Para 0046 – Fig. 9A-B). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee’s method by having Godfrey’s disclosure in order to provide vias in a semiconductor device. Derai/Boonyatee/Godfrey does not explicitly disclose wherein each contact comprises at least one groove in a surface opposite the bonding surface. In an analogous art, Perez discloses wherein each contact comprises at least one groove (Fig. 6 – groove on the back side of 40/16/42) in a surface opposite the bonding surface (grooves are on the back side whereas bonding is on the front side). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey’s method by having Perez’s disclosure in order to provide a locking mechanism with other components of a semiconductor device. With respect to claim 12, Derai/Boonyatee does not explicitly disclose wherein ablating the mold compound forms an angled side surface of the mold compound, the angled side surface extending from a first surface of the mold compound to the bonding surface of each of the contacts. In an analogous art, Godfrey discloses wherein ablating the mold compound forms an angled side surface of the mold compound (Para 0046, Fig. 9B), the angled side surface extending from a first surface of the mold compound to the bonding surface of each of the contacts (Fig. 9B&D). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Perez’s method by having Godfrey’s disclosure in order to provide vias in a semiconductor device. Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Godfrey/Perez in view of Sirinorakul et al. (US 2010/0311208, hereinafter Sirinorakul). With respect to claim 10, Derai/Boonyatee/Godfrey/Perez does not explicitly disclose wherein prior to depositing a die on the die attach pad of each leadframe of the array of leadframes, the method further comprising performing a first etching process to form the die attach pad and the contacts in each leadframe of the array of leadframes. In an analogous art, Sirinorakul discloses wherein prior to depositing a die on the die attach pad of each leadframe of the array of leadframes (Para 0007-0008), the method further comprising performing a first etching process to form the die attach pad and the contacts in each leadframe of the array of leadframes (Para 0040 & 0063). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey/Perez’s method by having Sirinorakul’s disclosure in order to attach different components of a semiconductor device. With respect to claim 11, Derai/Boonyatee/Godfrey does not explicitly disclose wherein performing a second etching process to form the grooves. In an analogous art, Perez discloses wherein performing a second etching process to form the grooves (Col. 3; lines 36-42; Col. 4; lines 22-24). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey’s method by having Perez’s disclosure in order to manufacture and connect different components of a semiconductor device. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Godfrey/Perez in view of Song (KR 20150096756, hereinafter Song). With respect to claim 15, Derai/Boonyatee/Godfrey/Perez does not explicitly disclose wherein ablating, via a laser, the mold compound in an ablation pathway aligned between adjacent contacts of adjacent leadframes includes setting a frequency of the laser to approximately 25-35 kHz and a current to approximately 25-30 A. In an analogous art, Song discloses wherein ablating, via a laser, the mold compound in an ablation pathway aligned between adjacent contacts of adjacent leadframes includes setting a frequency of the laser to approximately 25-35 kHz (Para 0044 – 30 kHz) and a current to approximately 25-30 A (Para 0044 – 24-30A). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey/Perez’s method by having Song’s disclosure in order to expedite the etching process. Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Derai/Boonyatee/Godfrey/Perez/Song in view of Chen (CN 113795910, hereinafter Chen). With respect to claim 16, Derai/Boonyatee/Godfrey/Perez/Song does not explicitly disclose wherein the laser ablates the mold compound for a duration of approximately 100-200 ns. In an analogous art, Chen discloses wherein the laser ablates the mold compound for a duration of approximately 100-200 ns (Page 31, Para 02). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey/Perez/Song’s method by having Chen’s disclosure in order to achieve the optimal results during etching. With respect to claim 17, Derai/Boonyatee/Godfrey/Perez/Song does not explicitly disclose wherein the laser ablates the mold compound to a depth of approximately 0.55-1.50 mm. In an analogous art, Chen discloses wherein the laser ablates the mold compound to a depth of approximately 0.55-1.50 mm (Page 22, Para 01- 1mm). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Derai/Boonyatee/Godfrey/Perez/Song’s method by having Chen’s disclosure in order to achieve the optimal results during etching. Allowable Subject Matter Claims 5 &13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claims 5 & 13, none of the prior art on record disclose or render obvious the claimed limitation including “wherein ablating the mold compound to form the angled side surface forms an extruded contact, where the extruded contact extends from the angled side surface of the mold compound in a range of approximately 100 to 300 um” when considered as a whole along with other claimed limitations. Claim 14 is objected because of it’s dependency on claim 13. Response to Arguments Based on new ground of rejection, applicant’s arguments filed on 09/16/2025 are moot. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M CHOUDHRY whose telephone number is (571)270-5716. The examiner can normally be reached Monday - Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fairbanks Brent can be reached at 408-918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD M CHOUDHRY/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Sep 23, 2022
Application Filed
Jun 13, 2025
Non-Final Rejection — §103
Sep 16, 2025
Response Filed
Dec 30, 2025
Final Rejection — §103
Apr 01, 2026
Request for Continued Examination
Apr 07, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
95%
With Interview (+13.3%)
2y 10m
Median Time to Grant
Moderate
PTA Risk
Based on 686 resolved cases by this examiner. Grant probability derived from career allow rate.

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