DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment dated April 3, 2026, in which claims 1, 7, 11, and 16 were amended, has been entered.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-2, 7, and 11-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 6-7 and 11-20 of copending Application No. 18/214,271 (reference application) in view of Fu et al. (U.S. Pub. 2017/0287842) [Hereafter “Fu”].
Regarding claims 1-2 and 7, Appl. ’271 [Claims 6-7] discloses the limitations of the claims, but fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 11-20, Appl. ’271 [Claims 6-7,11-20] discloses and makes obvious the limitations of the claims, but fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 7, and 8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kitamura et al. (U.S. Pub. 2014/0284801) [Hereafter “Kitamura”].
Regarding claims 1-3, 7, and 8, Kitamura [Figs.3-5] discloses an integrated circuit structure, comprising:
a plurality of conductive lines on a same level and along a same direction [Paras.16-17], a first one of the plurality of conductive lines [6a] having a first width and a first composition [Para.13], and a second one of the plurality of conductive lines [7a] having a second width and a second composition [Para.18], the second width greater than the first width, and the second composition different than the first composition [Fig.5]; wherein the first one of the plurality of conductive lines [6a] has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines [7a] [Fig.5]; and
an inter-layer dielectric (ILD) structure [3] having portions between adjacent ones of the plurality of conductive lines [Fig.5];
wherein the first one of the plurality of conductive lines [6a] comprises a first conductive fill [6] with no conductive barrier, and the second one of the plurality of conductive lines [7a] comprises a conductive barrier [Para.40] and a second conductive fill [7], the second conductive fill different than the first conductive fill [Paras.13,18];
wherein the conductive barrier [Para.40] of the second one of the plurality of conductive lines [7a] is on conductive layer [6b] having a same composition as the first conductive fill [6];
an integrated circuit structure, comprising:
a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines [6a] comprising a first conductive fill [6] with no conductive barrier, and a second one of the plurality of conductive lines [7a] comprising a conductive barrier [Para.40] and a second conductive fill [7], the second conductive fill different than the first conductive fill [Paras.13,18]; wherein the first one of the plurality of conductive lines [6a] has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines [7a] [Fig.5];and
an inter-layer dielectric (ILD) structure [3] having portions between adjacent ones of the plurality of conductive lines;
wherein the conductive barrier of the second one of the plurality of conductive lines [7a] is on conductive layer [6b] having a same composition as the first conductive fill [6].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4, 7, 9, 11-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bao et al. (U.S. Pub. 2021/0167006) [Hereafter “Bao”] in view of Fu et al. (U.S. Pub. 2017/0287842).
Regarding claims 1-2 and 4, Bao [Figs.1A-B] discloses an integrated circuit structure, comprising:
a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines [102] having a first width and a first composition [Ru], and a second one of the plurality of conductive lines [104] having a second width and a second composition [Cu], the second width greater than the first width, and the second composition different than the first composition [Figs.1A-B]; and
an inter-layer dielectric (ILD) structure [120] having portions between adjacent ones of the plurality of conductive lines [Fig.1B];
wherein the first one of the plurality of conductive lines [102] comprises a first conductive fill [Ru] with no conductive barrier, and the second one of the plurality of conductive lines [104] comprises a conductive barrier [114] and a second conductive fill [Cu], the second conductive fill different than the first conductive fill;
wherein the first conductive fill comprises Co, Ru, W or Mo, and the second conductive fill comprises Cu [Figs.1A-B; Paras.32,35-36].
Bao fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 7 and 9, Bao [Figs.1A-B] discloses an integrated circuit structure, comprising:
a plurality of conductive lines on a same level and along a same direction, a first one of the plurality of conductive lines [102] comprising a first conductive fill [Ru] with no conductive barrier, and a second one of the plurality of conductive lines [104] comprising a conductive barrier [114] and a second conductive fill [Cu], the second conductive fill different than the first conductive fill; and
an inter-layer dielectric (ILD) structure [120] having portions between adjacent ones of the plurality of conductive lines;
wherein the first conductive fill comprises Co, Ru, W or Mo, and the second conductive fill comprises Cu [Figs.1A-B; Paras.32,35-36].
Bao fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 11-13 and 15, Bao [Figs.1A-B,14-16] discloses a computing device, comprising:
a board [1522]; and
a component [1501] coupled to the board, the component including an integrated circuit structure [Fig.15; Paras.50-56], comprising:
a plurality of conductive lines on a same level and along a same direction,
a first one of the plurality of conductive lines [102] having a first width and a first
composition [Ru], and a second one of the plurality of conductive lines [104] having a
second width and a second composition [Cu], the second width greater than the first
width, and the second composition different than the first composition; and
an inter-layer dielectric (ILD) structure having portions between adjacent
ones of the plurality of conductive lines;
further comprising: a memory [1532] coupled to the board;
further comprising: a communication chip [1508] coupled to the board;
wherein the component is a packaged integrated circuit die [Fig.15; Paras.50-56].
Bao fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 16-18 and 20, Bao [Figs.1A-B,14-16] discloses a computing device, comprising:
a board [1522]; and
a component [1501] coupled to the board, the component including an integrated circuit structure [Fig.15; Paras.50-56], the integrated circuit structure comprising:
a plurality of conductive lines on a same level and along a same direction,
a first one of the plurality of conductive lines [102] comprising a first conductive fill [Ru]
with no conductive barrier, and a second one of the plurality of conductive lines [104]
comprising a conductive barrier [114] and a second conductive fill [Cu], the second
conductive fill different than the first conductive fill; and
an inter-layer dielectric (ILD) structure [120] having portions between adjacent
ones of the plurality of conductive lines;
further comprising: a memory [1532] coupled to the board;
further comprising: a communication chip [1508] coupled to the board;
wherein the component is a packaged integrated circuit die [Fig.15; Paras.50-56].
Bao fails to explicitly disclose wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines. However, Fu [Fig.7] discloses and makes obvious disclose wherein the first one [M1A/M1B] of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one [M1A/M1B] of the plurality of conductive lines. It would have been obvious to provide wherein the first one of the plurality of conductive lines has an uppermost surface at a same level as an uppermost surface of the second one of the plurality of conductive lines, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 14 and 19, Bao fails to explicitly disclose the computing device of further comprising: a camera coupled to the board. However, Bao [Figs.15-16; Paras.50-56] discloses the computing device comprises various electronic devices including a smartphone. It would be obvious a smartphone device further comprising: a camera coupled to the board.
It would have been obvious to provide a camera coupled to the board as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 5, 6, and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bao et al. (U.S. Pub. 2021/0167006) in view of Fu et al. (U.S. Pub. 2017/0287842), as applied above and further in view of Wallace et al. (U.S. Pub. 2019/0019748) [Hereafter “Wallace”].
Regarding claims 5, 6, and 10, Bao fails to explicitly disclose a dielectric plug located at a break in the conductive lines. However, Wallace [Fig.1L] discloses and makes obvious an integrated circuit structure
wherein the first one of the plurality of conductive lines has a break therein, and a first dielectric plug [148] is in a location of the break in the first one of the plurality of conductive lines [120], and wherein the second one of the plurality of conductive lines has a break therein, and a second dielectric plug [148] is in a location of the break in the second one of the plurality of conductive lines [136];
wherein the first one of the plurality of conductive lines has a break therein, and the ILD structure [146] has a dielectric plug portion [148] in a location of the break in the first one of the plurality of conductive lines [120/136], the dielectric plug portion [148] of the ILD structure continuous with one or more of the portions of the ILD structure [146] between adjacent ones of the plurality of conductive lines [Fig.1L];
wherein the first one of the plurality of conductive lines has a break therein, and a first dielectric plug [148] is in a location of the break in the first one of the plurality of conductive lines [120], and wherein the second one of the plurality of conductive lines has a break therein, and a second dielectric plug [148] is in a location of the break in the second one of the plurality of conductive lines [136].
It would have been obvious to provide a dielectric plug located at a break in the conductive lines as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot in view of the new grounds of rejection.
Overall, Applicant’s arguments are not persuasive. The claims stand rejected and the Action is made Final.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art is considered analogous art and discloses at least some of the claimed subject matter of the current invention.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BAC H AU whose telephone number is (571)272-8795. The examiner can normally be reached M-F 9:00AM-6:00PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BAC H AU/Primary Examiner, Art Unit 2898
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