Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1 – 19 are presented for examination.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 09/28/2022 were received. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Objections
Claims 1 objected to because of the following informalities:
The language “the memory controller re-reading channel data” would be more readable as “the memory controller re-reads channel data”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 – 19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 1, 7, and 14, claim 1 as representative, the limitation “generating a predicted channel mark based on tests of channel- induced syndromes generated from the channel data” is not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Specifically, the specification is silent regarding “tests”. The Examiner asserts “tests of channel- induced syndromes” is not well-known in the art.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1, 7, and 14, claim 1 as representative, the limitation “generating a predicted channel mark based on tests of channel- induced syndromes generated from the channel data” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “tests”.
Paragraph 0016, discloses a “CRC mismatch”, however, the specification is silent regarding tests. The examiner asserts one of ordinary skill in the art, at the time of filing, would be unclear what “tests” are performed on the “channel-induced syndromes”.
Any claim not addressed above is rejected due to its dependency on a rejected claim.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gilda et al, U.S. Publication 2018/0203627 (herein Gilda).
Regarding claims 1, 7, and 14, claim1 as representative, Gilda discloses: A method of data processing in a data processing system, the method comprising: a memory controller storing each of a plurality of data blocks across multiple channels of a memory system, wherein each of the plurality of data blocks is encoded with an error correction code (paragraph 0017); based on receiving, from the memory system, channel data of a fetch operation requesting a data block among the plurality of data blocks, the memory controller decoding the channel data and concurrently generating a predicted channel mark based on tests of channel- induced syndromes generated from the channel data, wherein the predicted channel mark identifies a marked channel among the multiple channels as a likely source of data errors (claim 1, “power channel marking”; figure 5b, element 512, 514); the memory controller determining whether the decoding detects an uncorrectable error in the channel data (paragraph 0043); and based on determining the decoding detects an uncorrectable error in the channel data, the memory controller re-reading channel data corresponding to the data block and correcting the re- read channel data by excluding, from decoding, channel data received from the marked channel (paragraph 0052, 0053; figure 5b, element 520, 524).
Regarding claims 2, 8, and 15, claim 2 as representative, Gilda discloses: each of the multiple channels includes multiple memory chips (paragraph 0027); and the method includes the memory controller, based on the decoding detecting an error in channel data received from one of the multiple memory chips, generating a chip mark identifying said one of the multiple memory chips from which channel data is to be disregarded in a subsequent fetch operation (paragraph 0027).
Regarding claims 3, 9, and 16, claim 3 as representative, Gilda discloses: the memory controller refraining from utilizing the predicted channel mark in the decoding of the channel data (claim 1).
Regarding claims 4, 10, and 17, claim 4 as representative, Gilda discloses: the memory controller performing cyclic redundancy code (CRC) checking for each of the multiple channels; and based on the CRC checking, the memory controller generating channel marks (claim 5).
Regarding claims 5, 11, and 18, claim 5 as representative, Gilda discloses: the data block includes a plurality of symbols; and the storing includes the memory controller storing at least one of the plurality of symbols to each of the multiple channels (paragraph 0026).
Regarding claims 6, 12, and 19, claim 6 as representative, Gilda discloses: each of the multiple channels includes multiple memory chips (paragraph 0026, 0027); and the storing includes the memory controller storing each of the plurality of symbols in a different respective one of the memory chips (paragraph 0026, 0027).
Regarding claim 13, Gilda discloses: a system fabric coupled to the memory controller (figure 1; paragraph 0020, 0021); and a plurality of processor cores coupled to the system fabric (paragraph 0061, 0064).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Johnson; Judy S. et al. US 20120173936 A1
Meaney; Patrick J. et al. US 20130191703 A1
JO; Namphil US 20090063934 A1
Alves; Luis C. et al. US 20110320918 A1
Horisaki; Koji et al. US 20140173377 A1
Gower; Kevin C. et al. US 20110320864 A1
MEANEY; et al. US 20210216400 A1
Stephens; Eldee et al. US 20140101481 A1
Meaney; Patrick J. et al. US 20130191698 A1
Kim; Hyunjoong et al. US 20210133028 A1
Iwasaki; Kiyotaka US 8954817 B2
based on receiving, from the memory system, channel data of a fetch operation requesting a data block among the plurality of data blocks, the memory controller decoding the channel data and concurrently generating a predicted channel mark based on tests of channel- induced syndromes generated from the channel data, wherein the predicted channel mark identifies a marked channel among the multiple channels as a likely source of data errors; the memory controller determining whether the decoding detects an uncorrectable error in the channel data;
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL F MCMAHON whose telephone number is (571)270-3232. The examiner can normally be reached Monday-Thursday 9am - 5pm EST.
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/Daniel F. McMahon/Primary Examiner, Art Unit 2111