Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The following is in response to the communication filed 6/24/2026.
Claims 1-7 and 21-33 are currently pending.
Claims 1-7 have been amended.
Claims 8-20 have been canceled.
Claims 21-33 have been added.
Claims 1-7 and 21-33 have been examined.
Response to Arguments
Applicant's arguments filed 6/24/2026 have been fully considered but they are not persuasive.
With regards to claims 1-7, and in particular to claim 1, the Examiner is not persuaded the new amended claim language overcomes the combination of Wang and Chang. In particular the new language can be found in Wang. See below for more detail.
With regards to claims 21-16, in particular to claim 21, the Examiner is not persuaded the new amended claim language overcomes the combination Wang and Chang. Furthermore the claims are rejected under 112(a) and 112(b). See below for further detail.
With regards to claims 27-33, in particular claim 27, the Examiner is not persuaded that the new amended claim language overcomes the combination of Wang and Chang. In particular the element “a conductive via in contact with the conductive structure and the first interlayer dielectric material at the first surface,” is understood by the specification to be either in direct contact or being in indirect contact by having “one or more intervening layers.” (See specification at [0016].) Therefore, the current language can include indirect contact as shown in Wang. However, having the conductive via “in direct contact” with the conductive structure and the first interlayer dielectric material at the first surface is not understood to be shown by Wang and Chang either individually or in combination. See below for further detail.
Claim Rejections - 35 USC § 112
112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 21-26 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claims contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In claim 21, the term “a multi-material” dielectric layer in multiple parts of the claim. The term “multi-material” dielectric is not understood to be a common term in the art when it comes to dielectrics nor does it appear to be defined with any particularity within the specification. There may be support for this term in the drawing as the self-alignment layer 120 includes multiple types of dielectric material in Fig. 1 of the Applicant’s drawings. However the drawings are not sufficient as to give clarification that such a connection between the self-alignment layer 120 is intended to be considered as a “multi-material” layer. Since the nowhere in the specification the terminology “multi-material” is use, the term “multi-material” dielectric could mean a number of definitions. The plain meaning of the term “multi-material” could have many different possible definitions and only some of which as supported by the drawings and specification. It could be that a material is made of multiple constituent components such as SiO2 being made of silicon and oxygen. It could mean that the layer is made a stack of layers that are each made up of a different dielectric material or even the same dielectric material made in a multi-step process. It could mean that the layer is just generally made of regions with different dielectric material.
For the purposes of examination the term “multi-material” dielectric layer will be defined as a layer which is generally made of regions of different dielectric materials.
Claims 22-26 are rejected based on their dependence to claim 21.
112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21-26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Specifically claim 21 includes the term “multi-material” dielectric is not understood to be a common term in the art when it comes to dielectrics nor does it appear to be defined with any particularity within the specification. The term multi-material dielectric could mean a number of definitions. It could be that a material is made of multiple constituent components such as SiO2 being made of silicon and oxygen. It could mean that the layer is made a stack of layers that are each made up of a different dielectric material or even the same dielectric material made in a multi-step process. It could mean that the layer is just generally made of regions with different dielectric material. Therefore the claim is considered to be indefinite and fails to particularly point out and distinctly claim the subject matter which the inventors regards as the invention
For the purposes of examination the term “multi-material” dielectric layer will be defined as a layer which is generally made of regions of different dielectric materials. Which appears to be supported by Applicants drawing in Fig. 1.
Claims 22-26 are rejected based on their dependence to claim 21.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-7 and 21-33 are rejected under 35 U.S.C. 103 as being unpatentable over Wang US 20230068625 A1 (hereinafter Wang) in view of Chang US 20150171081 A1 (herein after Chang).
Regarding claim 1, Wang discloses:
An apparatus, (Wang, Fig. 20) comprising:
a first layer (Fig. 20, layer including dielectric material 320, conductive feature 330, and bonding layer 170.) of an integrated circuit (IC) die with one or more conductive structures (conductive feature 330) in a first interlayer dielectric material, (dielectric material 320)
with at least a portion of the one or more conductive structures at a first surface of the first layer; (See Fig. 20.)
a self-alignment of the (IC) die in contact with non-conductive regions at the first surface of the first layer; (Fig. 19 and Fig. 20, second dielectric layer 340, first etch stop layer 360 and opening 390, where second dielectric layer 340 in contact with dielectric materials 320.)
a second layer of the (IC) die with second interlayer dielectric material in contact with the self-alignment layer and the portion of the one or more conductive structures at the first surface of the first layer; and (See Fig. 20, third dielectric layer 380 in contact with the second dielectric layer 340 and portion 372 is in contact with conductive feature 330 which goes through the opening 390. The third dielectric layer 380 is also in indirect contact with contact feature 332.)
one or more conductive vias of the (IC) die through the self-alignment layer and the second layer in respective contact with the portion of the one or more conductive structures at the first surface of the first layer, (See Fig. 10, conductive via 400.)
wherein the self-alignment layer is in contact with an entirety of the non-conductive regions at the first surface of the first layer, the self-alignment layer comprises a first material where the self-alignment layer is in contact with the one or more conductive vias (Fig. 20, second dielectric layer 340 is in contact with conductive via 400.) and a second material (Fig. 20, [0060], etch stop layer 360 which is made from a high-k dielectric material) …, the first material extending from the one or more conductive vias to the one or more conductive structures (See Fig. 20) and the second material extending between the one or more conductive structures to contact the entirety of the non-conductive regions. (See Fig. 20)
While, the etch stop layer 360 does not contact conductive via 330, it does contact conductive via 332. Therefore, Wang does not appear to disclose where the second material of the self-alignment layer “is not in contact with the one or more conductive vias.”
Chang, which teaches a method of self-alignment of two more layers (Chang, Abstract), discloses having a spacers 114 which are in the self-alignment layer (Embodiment 1 shown in Figs. 1A- 1N, specifically Fig. 1C, layer which includes ILD 116 and the alignment structure 112 and spacers 114.) The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride (SiON, [0021]) which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric. Wang, [0021].) This is made of different material the ILD 116 layer which is made of low-k dielectric. (Chang, [0023]) Therefore the device made by the combination of Wang and Chang would have resulted in a device with predictable characteristics as described by the claimed invention. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Wang to have second material of the self-alignment layer is not in contact with the one or more conductive vias as taught by Chang for purposes of The ILD layer is able to be kept clean and fee of residue from other alignment structures that are formed in the ILD layer. (Chang, [0039].)
Regarding claim 2, Wang as modified by Chang disclose the elements of claim 1.
Wang further discloses:
wherein the first material of the self-alignment layer comprises a low-k material ([0054], second dielectric layer 340 is a low-k dielectric material. Therefore would have a dielectric constant lower than 3.9.)
Chang further discloses:
the second material of the self-alignment layer comprises a high- k material. (The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric.) Therefore would have a dielectric constant higher than 3.9.)
Regarding claim 3, Wang as modified by Chang disclose the elements of claim 1.
Wang further discloses:
wherein a first dielectric constant of the first material of the self-alignment layer ([0054], second dielectric layer 340 is a low-k dielectric material.)
Chang further discloses:
a second dielectric constant of the second material of the self-alignment layer. (The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric.)
The combination of Wang and Chang discloses that that the first dielectric material being made of a low-k dielectric material (materials that by necessity have a dielectric constant lower than 3.9) has lower dielectric constant than the high-k dielectric material (materials that by necessity have dielectric constant higher than 3.9.) of the second material.
Regarding claim 4, Wang as modified by Chang disclose the elements of claim 3.
Wang further discloses:
wherein the first dielectric constant is 3.9 or lower. ([0054], second dielectric layer 340 is a low-k dielectric material. Low-k dielectrics by necessity must have a dielectric constant lower than 3.9.)
Regarding claim 5, Wang as modified by Chang disclose the elements of claim 4.
Wang further discloses
wherein the first material is air. (Fig. 19, There is no material in the opening 390 until the conductive via, therefore the first material is air.)
Regarding claim 6, Wang as modified by Chang disclose the elements of claim 1.
Wang further discloses:
further comprising a non-conductive material (Wang, Fig. 20, first etch stop layer 360) in the second layer between respective walls of the second interlayer dielectric material (third dielectric material 380) and respective walls of the one or more conductive vias. (conductive via (400).)
Regarding claim 7, Wang as modified as Chang discloses the elements of claim 1.
Wang further discloses:
a power supply coupled to the IC die. (Wang, [0012], as there is a power distribution system, as part of the power distribution system there must by necessity be a power supply and it would by coupled to the IC die.)
Regards in 21, Wang discloses:
An apparatus, (Wang, Fig. 20) comprising:
one or more conductive structures in a first interlayer dielectric material, (Fig. 20, layer including dielectric material 320, conductive feature 330, and bonding layer 170.) with at least a portion of the one or more conductive structures (conductive feature 330) at a first surface of the first interlayer dielectric material; (dielectric material 320)
a multi-material dielectric layer in contact with an entirety of the first interlayer dielectric material at the first surface; (Fig. 19 and Fig. 20, second dielectric layer 340, first etch stop layer 360 and opening 390, where second dielectric layer 340 in contact with dielectric materials 320.)
a second interlayer dielectric material in contact with the multi-material dielectric layer and the portion of the one or more conductive structures at the first surface; and (See Fig. 20, third dielectric layer 380 in contact with the second dielectric layer 340 and portion 372 is in contact with conductive feature 330 which goes through the opening 390. The third dielectric layer 380 is also in indirect contact with contact feature 332.)
one or more conductive vias through the multi-material dielectric layer and the second interlayer dielectric material in respective contact with the portion of the one or more conductive structures at the first surface, (See Fig. 10, conductive via 400.)
wherein the multi-material dielectric layer is in contact with an entirety of the first interlayer dielectric material at the first surface, the multi-material dielectric layer comprises a first material where the multi-material dielectric layer is in contact with the one or more conductive vias (Fig. 20, second dielectric layer 340 is in contact with conductive via 400.) and a second material where the multi-material dielectric layer…, (Fig. 20, [0060], etch stop layer 360 which is made from a high-k dielectric material) the first material extending from the one or more conductive vias to the one or more conductive structures (See Fig. 20) and the second material extending between the one or more conductive structures. (See Fig. 20)
While, the etch stop layer 360 does not contact conductive via 330, it does contact conductive via 332. Wang does not appear to disclose where a second material where the multi-material dielectric layer “is not in contact with the one or more conductive vias”.
Chang, which teaches a method of self-alignment of two more layers (Chang, Abstract), discloses having a spacers 114 which are in the self-alignment layer (Embodiment 1 shown in Figs. 1A- 1N, specifically Fig. 1C, layer which includes ILD 116 and the alignment structure 112 and spacers 114.) The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride (SiON, [0021]) which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric. Wang, [0021].) This is made of different material the ILD 116 layer which is made of low-k dielectric. (Chang, [0023]) Therefore the device made by the combination of Wang and Chang would have resulted in a device with predictable characteristics as described by the claimed invention. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Wang to have second material of the self-alignment layer is not in contact with the one or more conductive vias as taught by Chang for purposes of The ILD layer is able to be kept clean and fee of residue from other alignment structures that are formed in the ILD layer. (Chang, [0039].)
Regarding claim 22, Wang and Chang disclose all the elements of claim 21.
Wang discloses:
a first dielectric constant of the first material of the multi-material dielectric ([0054], second dielectric layer 340 is a low-k dielectric material.)
Chang further discloses:
a second dielectric constant of the second material of the multi-material dielectric layer. (The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric.)
The combination of Wang and Chang discloses that that a first dielectric constant of the first material of the multi-material dielectric (materials that by necessity have a dielectric constant lower than 3.9) is less than a second dielectric constant of the second material of the multi-layer dielectric layer. (materials that by necessity have dielectric constant higher than 3.9.)
Regarding claim 23, Wang and Chang disclose all the elements of claim 22.
Wang further discloses:
the first dielectric constant is 3.9 or lower. ([0054], second dielectric layer 340 is a low-k dielectric material. Low-k dielectrics by necessity must have a dielectric constant lower than 3.9.)
Regarding claim 24, Wang and Chang disclose all the elements of claim 22.
Wang further discloses
wherein the first material is air. (Fig. 19, There is no material in the opening 390 until the conductive via, therefore the first material is air.)
Regarding claim 25, Wang and Chang disclose all the elements of claim 21.
Wang further discloses:
further comprising a non-conductive material (Wang, Fig. 20, first etch stop layer 360) between respective walls of the second interlayer dielectric material (third dielectric material 380) and respective walls of the one or more conductive vias. (conductive via (400).)
Regarding claim 26, Wang and Chang disclose all the elements of claim 21.
Wang further disclose:
an integrated circuit (IC) die comprising the one or more conductive structures, (conductive feature 330,) the first interlayer dielectric material, (dielectric material 320) the multi-material dielectric layer, (second dielectric layer 340, first etch stop layer 360 and opening 390, where second dielectric layer 340 in contact with dielectric materials 320.) the second interlayer dielectric material, (third dielectric layer 380 ) and the one or more conductive vias; (conductive via 400) and
a power supply coupled to the IC die. (Wang, [0012], as there is a power distribution system, as part of the power distribution system there must by necessity be a power supply and it would by coupled to the IC die.)
Regarding claim 27, Wang discloses:
An apparatus, (Wang, Fig. 20) comprising:
a conductive structure in a first interlayer dielectric material, (Fig. 20, layer including dielectric material 320, conductive feature 330, and bonding layer 170.) with the conductive structure (conductive feature 330) at a first surface of the first interlayer dielectric material; (dielectric material 320)
a conductive via (conductive via 400) in contact with the conductive structure (conductive feature 330) and the first interlayer dielectric (dielectric material 320)material at the first surface; (Fig. 20)
a dielectric material in contact with a first portion of a sidewall of the conductive via (Fig. 20, second dielectric layer 340 in contact with conductive via 400) and in contact with the first interlayer dielectric material at the first surface,(See Fig. 20, second dielectric layer is in contact with the first dialectic layer) the dielectric material extending to a second conductive structure (conductive feature 332) in the first interlayer dielectric material but absent the second conductive structure at the first surface; and( See Fig. 20, second dielectric layer 340 extends to but absent from the conductive feature 332)
a second interlayer dielectric material (third dielectric layer 380) laterally adjacent to a second portion of the sidewall of the conductive via (conductive via 400) over the first portion, in contact with the dielectric material, (Fig. 20, third dielectric layer 380 is in contact with the conductive via 400 and over the dielectric layer 340) and in contact with the second conductive structure at the first surface. (Fig. 20, third dielectric layer is in indirect contact with the conductive structure 332 through second etch stop layer 370 at the first surface.)
Regarding claim 28, Wang and Chang disclose all the elements of claim 27.
Wang further disclose:
a second dielectric material (first etch stop layer 360) on the first interlayer dielectric material opposite the conductive via (conductive via 400) from the dielectric material, (See Fig. 20) wherein a portion of the second interlayer dielectric (third dielectric material 380) material is between the second dielectric material (first etch stop layer 360) and the conductive via,(conductive via 400) (See Fig. 20) and a first dielectric constant of the dielectric material ([0054], second dielectric layer 340 is a low-k dielectric material.)
Chang further discloses:
a second dielectric constant of the second material of the multi-material dielectric layer. (The spacer 114 is made of the same material as spacers 108. ([0024]) The spacer is made of silicon oxynitride which is a known high-k dielectric. (Wang discloses silicon oxynitride as high-k dielectric.)
The combination of Wang and Chang discloses that that a first dielectric constant of the first material of the multi-material dielectric (materials that by necessity have a dielectric constant lower than 3.9) is less than a second dielectric constant of the second material of the multi-layer dielectric layer. (materials that by necessity have dielectric constant higher than 3.9.)
Regarding claim 29, Wang and Chang disclose all the elements of claim 27.
Wang further discloses:
the dielectric material is air. . (Fig. 19, There is no material in the opening 390 until the conductive via, therefore the first material is air.)
Regarding claim 30, Wang and Chang disclose all the elements of claim 27.
Wang further discloses:
the second interlayer dielectric material is in contact with the second portion of the sidewall of the conductive via. (Fig. 20, third dielectric layer 38 is contact with a first portion at the top and in indirect contact with a second portion at the bottom.)
Regarding claim 31, Wang and Chang disclose all the elements of claim 27.
Wang further discloses:
a non-conductive material (Wang, Fig. 20, first etch stop layer 360) between the second portion of the sidewall of the conductive via (third dielectric material 380) and the second interlayer dielectric material. (third dielectric material 380)
Regarding claim 32, Wang and Chang disclose all the elements of claim 31.
Wang further discloses:
dielectric material ([0053], second dielectric layer is silicon nitride SiN) and the non-conductive material ([0060], first etch stop layer is SiN) have a same composition.
Regarding claim 33, Wang and Chang disclose all the elements of claim 27.
Wang further discloses:
an integrated circuit (IC) die comprising the one or more conductive structures, (conductive feature 330,) the first interlayer dielectric material, (dielectric material 320) the multi-material dielectric layer, (second dielectric layer 340, first etch stop layer 360 and opening 390, where second dielectric layer 340 in contact with dielectric materials 320.) the second interlayer dielectric material, (third dielectric layer 380 ) and the one or more conductive vias; (conductive via 400) and
a power supply coupled to the IC die. (Wang, [0012], as there is a power distribution system, as part of the power distribution system there must by necessity be a power supply and it would by coupled to the IC die.)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HEIM KIRIN GREWAL whose telephone number is (703)756-1515. The examiner can normally be reached Monday - Thursday 9:30 a.m. - 5:30 p.m. EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DAVIENNE MONBLEAU can be reached at (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HEIM KIRIN GREWAL/ Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/ Supervisory Patent Examiner, Art Unit 2812
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