DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention of Group I, Claims 1-13, in the reply filed on 01/28/2026 is acknowledged.
Claims 14-20 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/28/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Okutsu et al. (US 2021/0143129).
Okutsu et al. discloses, as shown in Figures, an integrated circuit (IC) device comprising:
a first integrated circuit (IC) die (unit 20 having a plurality of memory chips 21) with a first front surface, a first back surface, and a first side surface along opposed edges of the first front surface and the first back surface of the first IC die;
a second IC die (another unit 20 having a plurality of memory chips) with a second front surface, a second back surface, and a second side surface along opposed edges of the second front surface and the second back surface of the second IC die;
a substrate (10) coupled to the first side surface of the first IC die and the second side surface of the second IC die; and
fill material (40) between one of the first front surface and the first back surface of the first IC die and one of the second front surface and the second back surface of the second IC die.
Claim(s) 1-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Popovic et al. (US 2012/0211878).
Regarding claim 1, Popovic et al. discloses, as shown in Figures 1A-1D, 5-8, and 13-14, an integrated circuit (IC) device comprising:
a first integrated circuit (IC) die (110-1) with a first front surface, a first back surface, and a first side surface along opposed edges of the first front surface and the first back surface of the first IC die;
a second IC die (110-2) with a second front surface, a second back surface, and a second side surface along opposed edges of the second front surface and the second back surface of the second IC die;
a substrate (130-1) coupled to the first side surface of the first IC die and the second side surface of the second IC die; and
fill material (124) between one of the first front surface and the first back surface of the first IC die and one of the second front surface and the second back surface of the second IC die.
Regarding claim 2, Popovic et al. discloses the device further comprising:
a first electrical connection (170) through a third side surface along opposed edges of the first front surface and the first back surfaces of the first IC die opposite to the first side surface of the first IC die coupled to the substrate.
Regarding claim 3, Popovic et al. discloses the device further comprising:
a second electrical connection (170) through a fourth side surface along opposed edges of the second front surface and the second back surfaces of the second IC die opposite to the second side surface of the second IC die coupled to the substrate; and
conductive material (substrate 130-2 inherently having conductive material interconnect the pads 170 and 174 together) having over the third side of the first IC die and the fourth side of the second IC die that couples the first electrical connection to the second electrical connection.
Regarding claims 4-6, Popovic et al. discloses the conductive material is connected over the third side of the first IC die and the fourth side of the second IC die.
Note that the terms “is layer transferred”, “is hybrid bonded”, and “is thin film processed” are method recitation in a device claimed. “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985).
Regarding claim 7, Popovic et al. discloses, as shown in Figures 1A-1D, 5-8, and 13-14, a system comprising:
a power supply (substrate 130-1 having the electrical coupling to supply power to the semiconductor dies 110, [0054], voltage signals [0097]);
an integrated circuit (IC) device (100) coupled to the power supply, the IC device comprising:
a reconstituted wafer (130-1) with a plurality of IC die (110-1 – 110-N) coupled to a substrate of the reconstituted wafer on respective first sidewalls of the plurality of IC die; and
one or more interconnect layers (substrate 130-2 inherently having conductive material interconnect layers and/or pads 170 and 174) over the reconstituted wafer, wherein the one or more interconnect layers provide one or more electrical connections between two or more IC die of the plurality of IC die through respective second sidewalls of the plurality of IC die opposite to the first sidewalls
Regarding claim 8, Popovic et al. discloses the IC device comprises a wafer-scale engine (a plurality of semiconductor dies are formed at the wafer level, [0064]-[0068], [0104]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Popovic et al. (US 2012/0211878) in view of Patel et al. (US 2021/0407879).
Regarding claims 9 and 10, Popovic et al. discloses the claimed invention including the system as explained in the above rejection. Popovic et al. further discloses the system comprising a cooling structure coupled to the IC device operable to remove heat from the IC device (Figure 1D), but does not disclose the operating temperature. Patel et al. also discloses the system comprising a cooling structure (204, 228, 232, 240, 256, 404, 436, 464, 604, etc.) coupled to the IC device (132, 136, 140, 144, 148) operable to remove heat from the IC device with the achieved operating temperature. Note Figures 2-6 and 6 of Patel et al. Popovic et al. and Patel et al. do not disclose the claimed operating temperature. However, it is a recitation of intended use of the claimed invention. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the system of Popovic et al. having the cooling structure coupled to the IC device, such as taught by Patel et al. in order to further remove the heat from the device.
Regarding claim 11, Popovic et al. and Patel et al. disclose the cooling structure comprises a plurality of microchannels (256) in the IC device and over the reconstituted wafer, the microchannels to convey a heat transfer fluid therein (Figures 2-4 and 6).
Regarding claim 12, Popovic et al. and Patel et al. disclose the cooling structure further comprises a chiller (240,432,436,612) mounted to the IC device over the microchannels, the chiller comprising one of a solid body comprising second microchannels to convey a second heat transfer fluid therein or a heat sink for immersion in a low-boiling point liquid (Figures 2-4 and 6).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Popovic et al. (US 2012/0211878) in view of Patel et al. (US 2021/0407879) and further in view of Goettert et al. (US 2008/0225478).
Popovic et al. and Patel et al. disclose the claimed invention including the system using the liquid as explained in the above rejection. Popovic et al. and Patel et al. do not disclose the cooling structure is further to convey liquid nitrogen. However, Goettert et al. discloses a system using the liquid nitrogen in the heat sink structure. Note [0030] of Goettert et al. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the system of Popovic et al. and Patel et al. having the heat sink structure using the liquid nitrogen, such as taught by Goettert et al. in order to achieve very low temperature. Popovic et al., Patel et al. and Goettert et al. do not disclose the claimed operating temperature. However, it is a recitation of intended use of the claimed invention.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNG K VU whose telephone number is (571)272-1666. The examiner can normally be reached Monday - Friday: 7am - 5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JACOB CHOI can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HUNG K VU/ Primary Examiner, Art Unit 2897