Prosecution Insights
Last updated: October 02, 2026
Application No. 17/955,689

LAYERED GLASS ASSEMBLY WITH PRE-PATTERNED ELECTRICALLY CONDUCTIVE INTERCONNECTS

Final Rejection §102§112
Filed
Sep 29, 2022
Examiner
CHEN, YU
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
2 (Final)
68%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 68% — above average
68%
Career Allowance Rate
738 granted / 1087 resolved
At TC average
Strong +30% interview lift
Without
With
+29.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
85 currently pending
Career history
1184
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
46.4%
+6.4% vs TC avg
§102
23.6%
-16.4% vs TC avg
§112
22.4%
-17.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1087 resolved cases

Office Action

§102 §112
CTFR 17/955,689 CTFR 86224 DETAILED ACTION This office action is in response to amendment filed 6/23/2026. Claims 1-20 are pending. Claims 15-20 have been withdrawn. Claims 1 and 4-14 have been amended. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 AIA Claim s 5, 13 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 5 reciting “a third glass layer” renders the claim indefinite. Independent claim 1 previously recited “a first glass layer”. No “second glass layer” has been previously recited in claims 1 or 5. It is unclear if the recitation to “a third glass layer” implies presence of “a second glass layer”. Claim 13 reciting “a plurality of alternating layers of the first glass core layer and the at least one dielectric layer” renders the claim indefinite. It is unclear what is required make up of the “plurality of alternating layers”. One interpretation is the plurality of alternating layers composed of a singular first glass core layer and a singular dielectric layer. A second interpretation may be plural first glass core layers alternating with a single dielectric layer, e.g. glass/dielectric/glass. Another interpretation may be a single glass core layer alternating with plural dielectric layers, e.g. dielectric/glass/dielectric. It is unclear what is intended by the claim. Claim 14 reciting “each of the first glass core layers is substantially aligned with the second glass core layer or an additional glass core layer” renders the claim indefinite. It is unclear if “additional glass core layer” is in addition to the first glass core layers or the second glass core layer. Furthermore, the alignment is claimed in alternative with either the second glass core layer or an additional glass core layer. The “additional glass core layer” is not required to different from the second glass core layer. In this case, it is unclear how the two alternatives differ in scope when the “additional glass core layer” can be the second glass core layer. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1-14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Uzoh et al. US 2023/0207474 A1 (Uzoh) . PNG media_image1.png 380 793 media_image1.png Greyscale In re claim 1, Uzoh discloses (e.g. FIGs. 6A-6V) a semiconductor device comprising: a first glass layer 25a (¶ 47) with an upper surface and a lower surface, the first glass layer including: at least one electrically conductive interconnect 34 disposed on the upper surface of the first glass layer 25a (FIGs. 6G-6L); and at least one through hole 36 (FIG. 6E) within the first glass layer 25a extending from the upper surface to the lower surface. In re claim 2, Uzoh discloses (e.g. FIG. 6F-6H) further comprising an electrically conductive fill 34a in the at least one through hole 36. In re claim 3, Uzoh discloses (e.g. FIGs. 6A-6V) further comprising a dielectric layer 31a,25b coupled to at least one of the upper surface or the lower surface. In re claim 4, Uzoh discloses (e.g. FIGs. 6A-6V) further comprising a second glass layer 25c (¶ 47) coupled to the dielectric layer 31a,25b,31b; wherein the dielectric layer 31a,25b,31b is sandwiched between the first glass layer 25a,25b and the second glass layer 25c. In re claim 5, as best understood, Uzoh discloses (e.g. FIGs. 6A-6V) further comprising a third glass layer 25b,25c having at least one copper trace 34b,34c (¶ 37-38) and at least one through hole 36; wherein the at least one through hole 36 of the third glass layer 25b,25c is at least partially overlapping with the at least one through hole 36 of the first glass layer 25a. In re claim 6, Uzoh discloses (e.g. FIGs. 6A-6V) wherein the first glass layer 25a is one of a plurality of glass layers 25a,25b,25c (¶ 47); wherein a dielectric layer is one of a plurality of dielectric layers 31a,31b; and wherein each dielectric layer 31a,31b of the plurality of dielectric layers is sandwiched between two of the glass layers 25b,25c (31a is between 25a and 25b, 31b is between 25b and 25c). In re claim 7, Uzoh discloses (e.g. FIGs. 6A-6V) wherein each glass layer of the plurality of glass layers 25a,25b,25c is substantially aligned with at least a second glass layer (e.g. 25b) of the plurality of glass layers 25a,25b,25c; wherein the aligned glass layers of the plurality of glass layers 25a,25b,25c form a glass core 16. In re claim 8, Uzoh discloses (e.g. FIGs. 6A-6V) wherein the at least one electrically conductive interconnect 34 is comprised of copper, aluminum or gold (¶ 34-36). In re claim 9, Uzoh discloses (e.g. FIGs. 2C-2D & 6A-6V) an electronic system comprising: a semiconductor chip 9c,9d; and a package substrate 16 wherein the semiconductor chip 9c,9d is coupled to the package substrate 16 (FIG. 2D), and wherein the package substrate 16 includes: a first glass core layer 25b,25c (¶ 47), at least one electrically conductive interconnect 27,34c (portion in 23a or 23c, ¶ 38), and a first electronic transmission hole 36 extending from a first surface of the first glass core layer 25b,25c through the first glass core layer 25b,25c to a second surface of the first glass core layer 25b,25c; a second glass core layer 25a (¶ 47), and a second electronic transmission hole 36 extending from a first surface of the second glass core 25a through the second glass core layer 25a to a second surface of the second glass core layer 25a; and at least one dielectric layer 31a,31b (or 25b) sandwiched between the first glass core layer 25b,25c and the second glass core layer 25a (e.g. 31a,31b are between adjacent ones of 25a,25b,25c; alternatively, 25b is between 25a and 25c). In re claim 10, Uzoh discloses (e.g. FIGs. 6A-6V) further including: copper plating within the first electronic transmission hole 36 in the first glass core layer 25b,25c or the second electronic transmission hole 36 in the second glass core layer 25a (¶ 35-37). In re claim 11, Uzoh discloses (e.g. FIGs. 6A-6V) wherein a dielectric layer 25b of the at least one dielectric layer is coupled to the first surface of the first glass core layer 25c or the second surface of the second glass core layer 25a with silicon nitride 31a,31b (¶ 34). In re claim 12, Uzoh discloses (e.g. FIGs. 6A-6V) wherein a dielectric layer of the at least one dielectric layer 25b,31a,31b is coupled to the first surface of the first glass core layer 25b,31a,31b or the second surface of the second glass core layer 25a with pressing and curing. No specific “pressing” and “curing” claimed. The layering itself teaches “pressing” by weight of the layers. Uzoh further teaches curing in oven (¶ 33,36). Furthermore, the recitation to “pressing and curing” pertains to product by process limitation. In regard to the product by process language, since a "product by process" claim is directed to the product per se, no matter how actually made, In re Hirao and Sato et al. , 190 USPQ 15 at 17 (CCPA 1976) (footnote 3). “[T]he lack of physical description in a product-by-process claim makes determination of the patentability of the claim more difficult, since in spite of the fact that the claim may recite only process limitations, it is the patentability of the product claimed and not of the recited process steps which must be established. We are therefore of the opinion that when the prior art discloses a product which reasonably appears to be either identical with or only slightly different than a product claimed in a product-by-process claim, a rejection based alternatively on either section 102 or section 103 of the statute is eminently fair and acceptable. As a practical matter, the Patent Office is not equipped to manufacture products by the myriad of processes put before it and then obtain prior art products and make physical comparisons therewith.” In re Brown, 459 F.2d 531, 535, 173 USPQ 685, 688 (CCPA 1972). See also In re Luck and Gainer , 177 USPQ 523 (CCPA 1973); In re Fessmann , 180 USPQ 324 (CCPA 1974); and In re Marosi et al. , 218 USPQ 289 (CAFC 1983). It is the final product per se which must be determined for patentability in a "product by, all of" claim, and not the patentability of the process, and that an old or obvious product, whether claimed in "product by process" claims or not, is not patentable. Note that Applicant has the burden of proof in such cases, as the above case law makes clear. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based upon the product itself. The patentability of a product does not depend on its method of production. If the product in product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product is made by a different process. In re Thorpe , 227 USPQ 964, 966 (Fed. Cir. 1985). In re claim 13, as best understood, Uzoh discloses (e.g. FIGs. 6A-6V) wherein the package substrate 16 includes “a plurality of alternating layers of the first glass core layer 25b,25c and the at least one dielectric layer 31a,31b (e.g. alternating 31a/25b/31b/25c). In re claim 14, as best understood, Uzoh discloses (e.g. FIGs. 6A-6V) wherein each of the first glass core layers 25b,25c is substantially aligned with the second glass core layer 25a or “an additional glass core layer” 25a . Response to Arguments 07-37 AIA Applicant's arguments filed 6/23/2026 have been fully considered but they are not persuasive. Applicant indicates it would be helpful to point out in the Uzoh Provisional application where the anticipating disclosure is for the claims (Remark, page 7). The claims are rejected over US Pub 2023/0207474 A1 which claims priority to US Provisional Application 63/293,299 with an effective filing date of 12/23/2021. For prior art determinations under AIA 35 U.S.C. 102, a reference patent document need only meet the "ministerial requirements" of 35 U.S.C. 119 and 120, and the provisional or other earlier application(s) to which the reference patent document claims a right of priority or benefit must "describe[] the subject matter" relied upon in the reference patent document as prior art. See MPEP 2154.01(b). Examiner verified the disclosure of US Provisional Application 63/293,299 describes the subject matter relied upon in US Pub 2023/0207474 A1. While it is not required, Examiner hereby attaches a copy of the provision application disclosure as a courtesy to Applicant. Note relevant sections of the provisional application as shown in FIGs. 6A-6V and ¶ 8, 18-21, 32 as corresponding to cited portions of the US Pub 2023/0207474 A1. No other argument has been submitted by Applicant that specifically point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. Further, they do not show how the amendments avoid such references or objections. Conclusion 07-40 AIA Applicant's amendment necessitated any new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL . See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU CHEN whose telephone number is (571)270-7881. The examiner can normally be reached Monday-Friday: 9AM-5PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WILLIAM KRAIG can be reached on 5712728660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU CHEN/Primary Examiner, Art Unit 2896 YU CHEN Examiner Art Unit 2896 Application/Control Number: 17/955,689 Page 2 Art Unit: 2896 Application/Control Number: 17/955,689 Page 3 Art Unit: 2896 Application/Control Number: 17/955,689 Page 4 Art Unit: 2896 Application/Control Number: 17/955,689 Page 5 Art Unit: 2896 Application/Control Number: 17/955,689 Page 6 Art Unit: 2896 Application/Control Number: 17/955,689 Page 7 Art Unit: 2896 Application/Control Number: 17/955,689 Page 8 Art Unit: 2896 Application/Control Number: 17/955,689 Page 9 Art Unit: 2896
Read full office action

Prosecution Timeline

Sep 29, 2022
Application Filed
Apr 26, 2023
Response after Non-Final Action
Mar 23, 2026
Non-Final Rejection mailed — §102, §112
Jun 23, 2026
Response Filed
Sep 03, 2026
Final Rejection mailed — §102, §112 (current)

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Prosecution Projections

3-4
Expected OA Rounds
68%
Grant Probability
98%
With Interview (+29.6%)
2y 10m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1087 resolved cases by this examiner. Grant probability derived from career allowance rate.

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