DETAILED ACTION
This Office Action is in response to the applicant's amendment filed March 27th, 2026. In virtue of this communication, claims 1, 2, and 4-20 are currently presented in the instant application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1 and 12 are objected to because of the following informalities: in claim 1 at line 5, change “electornic” to --electronic--; in claim 12 at line 5, change “electornic” to --electronic--. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, and 4-11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Qiao et al. (US 2023/0238315 A1; hereinafter Qiao).
With respect to claim 1, Qiao teaches an apparatus in Figs. 1-4, comprising:
a housing 40 having a top side (bottom of 40 in Fig. 2) and a bottom side (top of 40 in Fig. 2), the housing 40 encapsulating one or more electronic components 10 and one or more semiconductor chips 20 coupled to the one or more electronic components 10, wherein the one or more semiconductor chips 20 are coupled to the one or more electronic components 10 using one or more couplings (bonding wire 60 and solder below 20), wherein the housing 40 fully encapsulates all of the one or more semiconductor chips 20 and all of the or more couplings (bonding wire 60 and solder below 20) (see Figs. 1-4 and paragraphs 35, 36, 52, 53, 62, 68); and
one or more openings 42 disposed in the bottom side (top of 40 in Fig. 2) of the housing 40, the one or more openings 42 exposing one or more metallized surfaces 12 of the one or more electronic components 10 and without exposing any of the one or more semiconductor chips 20 and any of the one or more couplings (bonding wire 60 and solder below 20) through any of the one or more openings 42 (see Figs. 1-4 and paragraphs 45-47, 79);
the one or more metallized surfaces 12 are configured for coupling to one or more lead terminals 30 (see Figs. 1-4 and paragraphs 35, 45, 49-51, 55).
With respect to claim 2, Qiao teaches the apparatus according to claim 1, wherein the one or more electronic components 10 include at least one of the following: direct copper bonded (DCB) substrate components, active metal brazed (AMB) substrate components, insulated metal substrate (IMS) components, and any combination thereof (see Figs. 1-4 and paragraph 55; note double-sided copper clad ceramic substrate).
With respect to claim 4, Qiao teaches the apparatus according to claim 1, wherein the one or more semiconductor chips 20 and the one or more electronic components (bonding wire 60 and solder below 20) are configured to be coupled using at least one of the following: wire-bonding, one or more electrically-conductive clips, silver-sintering, soldering, and any combination thereof (see Figs. 1-4 and paragraphs 55, 58, 60, 62, 68).
With respect to claim 5, Qiao teaches the apparatus according to claim 1, wherein the one or more lead terminals 30 are configured to be coupled to the one or more metallized surfaces 12 of the one or more electronic components 10 by inserting the one or more lead terminals 30 through the one or more openings 42; contacting the inserted one or more lead terminals 30 with the one or more metallized surfaces 12; and coupling the contacting one or more lead terminals 30 and the one or more metallized surfaces 12 (see Figs. 1-4, Abstract, and paragraphs 35, 36, 44, 45, 49, 55, 73, 82).
With respect to claim 6, Qiao teaches the apparatus according to claim 5, wherein the one or more lead terminals 30 are permanently coupled to the one or more metallized surfaces 12 (see Figs. 2 and 4 and paragraphs 45, 49, 82; note welding part 51).
With respect to claim 7, Qiao teaches the apparatus according to claim 6, wherein the apparatus is configured for at least one of through-hole mounting and surface mounting to at least another one or more electronic components using the one or more permanently coupled lead terminals 30 (see Figs. 2 and 4 and paragraphs 45, 49, 82; note welding part 51).
With respect to claim 8, Qiao teaches the apparatus according to claim 5, wherein the one or more lead terminals 30 are temporarily coupled to the one or more metallized surfaces 12 (see Figs. 1 and 3 and paragraphs 36, 44, 73; an interference fit is not permanent).
With respect to claim 9, Qiao teaches the apparatus according to claim 8, wherein the apparatus is configured for push-fit mounting to at least another one or more electronic components using the one or more temporarily coupled lead terminals 30 (see Figs. 1 and 3 and paragraphs 36, 44, 73).
With respect to claim 10, Qiao teaches the apparatus according to claim 1, wherein the one or more lead terminals 30 are manufactured using at least one of the following: a copper, a copper alloy, a metal, a metal alloy, and any combination thereof (see Figs. 1-4 and paragraphs 39, 45).
With respect to claim 11, Qiao teaches the apparatus according to claim 1, wherein the housing 40 is manufactured from at least one of the following: an epoxy compound, a plastic, and any combination thereof (see Figs. 1-4 and paragraphs 35, 45, 52, 70).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 12-20 are rejected under 35 U.S.C. 103 as being unpatentable over Qiao et al. (US 2023/0238315 A1; hereinafter Qiao) in view of Ichikawa (US 2020/0303215 A1).
With respect to claim 12, Qiao discloses a packaging structure 100 in Figs. 1-4, comprising:
a housing 40 having a top side (bottom of 40 in Fig. 2) and a bottom side (top of 40 in Fig. 2), the housing 40 encapsulating one or more electronic components 10 and one or more semiconductor chips 20 coupled to the one or more electronic components 10, wherein the one or more semiconductor chips 20 are coupled to the one or more electronic components 10 using one or more couplings (bonding wire 60 and solder below 20), wherein the housing 40 fully encapsulates all of the one or more semiconductor chips 20 and all of the or more couplings (bonding wire 60 and solder below 20) (see Figs. 1-4 and paragraphs 35, 36, 52, 53, 62, 68);
one or more through-hole openings 42 disposed in the bottom side (top of 40 in Fig. 2) of the housing 40, the one or more openings 42 exposing one or more metallized surfaces 12 of the one or more electronic components 10 and without exposing any of the one or more semiconductor chips 20 and any of the one or more couplings (bonding wire 60 and solder below 20) through any of the one or more openings 42 (see Figs. 1-4 and paragraphs 45-47, 79); and
one or more lead terminals 30, the one or more metallized surfaces 12 are configured for coupling to the one or more lead terminals 30 (see Figs. 1-4 and paragraphs 35, 45, 49-51, 55);
wherein the one or more lead terminals 30 are configured to be coupled to the one or more metallized surfaces 12 of the one or more electronic components 10 by inserting the one or more lead terminals 30 through the one or more through-hole 42 openings; contacting the inserted one or more lead terminals 30 with the one or more metallized surfaces 12; and coupling the contacting one or more lead terminals 30 and the one or more metallized surfaces 12 (see Figs. 1-4, Abstract, and paragraphs 35, 36, 44, 45, 49, 55, 73, 82).
Qiao does not explicitly disclose the one or more lead terminals have a bent or curved shape or wherein the bent or curved shape of the one or more lead terminals enables at least one of: the inserting, the contacting, or the coupling.
Ichikawa discloses a similar packaging structure in Fig. 2-6 wherein one or more lead terminals (40a, 40b) have a bent or curved shape (at 44a, 44b) and wherein the bent or curved shape (at 44a, 44b) of the one or more lead terminals 40 enables at least one of: the inserting, the contacting, or the coupling (see Figs. 2-6 and paragraphs 56-58, 60-63).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that the one or more lead terminals of Qiao would have a bent or curved shape, wherein the bent or curved shape of the one or more lead terminals enables at least one of: the inserting, the contacting, or the coupling as taught by Ichikawa. Even when the mounting substrate 50a is standardized, the semiconductor apparatus 10a can be connected to the mounting substrate 50a and used by adjusting the shape of the bending portion 44a. Accordingly, the semiconductor apparatus 10a according to the present embodiment can be provided to a customer for which the structure of the mounting substrate 50a is difficult to change (see Ichikawa: paragraph 60).
With respect to claim 13, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the one or more electronic components 10 include at least one of the following: direct copper bonded (DCB) substrate components, active metal brazed (AMB) substrate components, insulated metal substrate (IMS) components, and any combination thereof (see Qiao: Figs. 1-4 and paragraph 55; note double-sided copper clad ceramic substrate).
With respect to claim 14, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the one or more semiconductor chips 20 and the one or more electronic components (bonding wire 60 and solder below 20) are configured to be coupled using at least one of the following: wire-bonding, one or more electrically-conductive clips, silver-sintering, soldering, and any combination thereof (see Qiao: Figs. 1-4 and paragraphs 55, 58, 60, 62, 68).
With respect to claim 15, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the one or more lead terminals 30 are permanently coupled to the one or more metallized surfaces 12 (see Qiao: Figs. 2 and 4 and paragraphs 45, 49, 82; note welding part 51).
With respect to claim 16, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 15, wherein the packaging structure is configured for at least one of through-hole mounting and surface mounting to at least another one or more electronic components using the one or more permanently coupled lead terminals 30 (see Qiao: Figs. 2 and 4 and paragraphs 45, 49, 82; note welding part 51).
With respect to claim 17, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the one or more lead terminals 30 are temporarily coupled to the one or more metallized surfaces 12 (see Qiao: Figs. 1 and 3 and paragraphs 36, 44, 73; an interference fit is not permanent).
With respect to claim 18, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 17, wherein the packaging structure is configured for push-fit mounting to at least another one or more electronic components using the one or more temporarily coupled lead terminals 30 (see Qiao: Figs. 1 and 3 and paragraphs 36, 44, 73).
With respect to claim 19, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the one or more lead terminals 30 are manufactured using at least one of the following: a copper, a copper alloy, a metal, a metal alloy, and any combination thereof (see Qiao: Figs. 1-4 and paragraphs 39, 45).
With respect to claim 20, the combination of Qiao and Ichikawa discloses the packaging structure according to claim 12, wherein the housing 40 is manufactured from at least one of the following: an epoxy compound, a plastic, and any combination thereof (see Qiao: Figs. 1-4 and paragraphs 35, 45, 52, 70).
Response to Arguments
Applicant’s arguments with respect to claims 1, 2, and 4-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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