Prosecution Insights
Last updated: October 02, 2026
Application No. 17/956,024

CAPACITOR STRUCTURE TO SUPPORT VARIABLE SIGNAL AMPLITUDES IN AN ISOLATOR PRODUCT

Non-Final OA §103
Filed
Sep 29, 2022
Priority
Sep 30, 2021 — provisional 63/250,534
Examiner
TIVARUS, CRISTIAN ALEXANDRU
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Skyworks Solutions Inc.
OA Round
3 (Non-Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
38 granted / 50 resolved
+8.0% vs TC avg
Strong +26% interview lift
Without
With
+26.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
37 currently pending
Career history
92
Total Applications
across all art units

Statute-Specific Performance

§103
59.6%
+19.6% vs TC avg
§102
23.7%
-16.3% vs TC avg
§112
16.8%
-23.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 50 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/04/2026 has been entered. Response to Amendment The Amendment filed on 05/04/2026 has been entered. Claims 1-3, 5-11, 17-18, 20, 21 and 23-25 remain pending in the application. Claims 4, 12-16, 19 and 20 have been cancelled. Applicants’ amendments have overcome every claim objection and every 112(b) rejection previously set forth in the Non-Final Office Action mailed on 01/02/2026. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5, and 7-11 are rejected under 35 U.S.C. 103 as being unpatentable over Chow (United States Patent Application Publication Number, US 2009/0176450 A1) hereinafter referenced as Chow, in view of Van Goor et al., (United States Patent Application Publication Number, US 2014/0167525 A1), hereinafter referenced as Van Goor, in view of Dominique Ho et al., (United States Patent Application Publication Number, US 2017/0098604 A1), hereinafter referenced as Ho. Regarding claim 1, Chow teaches an isolated communication channel (Fig.4) comprising: a capacitor including a first plate, and multiple second plates (Fig.4, the capacitor in the TX chip includes a first plate, element #44 and multiple second plates, elements #42, paragraph [0061], rows 3-4), each second plate of the multiple second plates being separated from a next adjacent second plate by a gap (Fig.4, elements #42 are separated by a gap) and a transmitter circuit (Fig.4, element #40) including a first driver coupled to a first second second plate of the multiple second plates, and the transmitter circuit further including a second driver coupled to a second plate of the multiple second plates (Fig.4, elements #10 are drivers connected to elements #42), the transmitter circuit, in a first configuration of the isolated communication channel, actively driving both the first second plate and the second second plate with a drive signal (The limitation recites the intended use of the isolated communication channel, and a recitation with respect to the manner in which the claimed isolated communication channel is intended to be used must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claim invention from prior art. The prior art disclosed by Chow is capable of performing the intended use, and therefore it meets the limitations of the claim. Note also Fig.15). Chow does not teach the multiple second plates being concentric. Van Goor teaches multiple second plates being concentric (Fig.7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose multiple second plates being concentric. Thus, both references Chow and Van Goor teach multiple second plates connected to drivers of communication systems. A person skilled in the art, before the effective filing date of the claimed invention would have recognized that square plates disclosed by Chow could have been replaced for the concentric plates disclosed by Van Goor because both serve the same purpose of providing multiple second plates connected to drivers of communication systems. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing multiple second plates connected to drivers of communication systems. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Chow teaches the capacitor is a MIM capacitor integrated on a chip (paragraph [0061], rows 5-6). The combination of Chow and Van Goor does not teach the capacitor including a first plate formed in a first conductive integrated circuit layer, and multiple second plates formed in a second conductive integrated circuit layer. Ho teaches a capacitor including a first plate formed in a first conductive integrated circuit layer (Fig.2A, element #225 formed in circuit layer #251 paragraph [0099], rows 1-2), and multiple second plates formed in a second conductive integrated circuit layer (Fig.2A, elements #222 and #229, paragraph [0077], row 2-4, formed in circuit layer, element #259, paragraph [0081], rows 2-3). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose the capacitor including a first plate and second plates formed in different conductive integrated circuit layers. Forming capacitors in the circuit layers of integrated circuit chips allows the simultaneous manufacture of the capacitors and the metal wiring of the circuits, thus providing a compact footprint and high integration density. Regarding claim 2, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow does not teach the capacitor of claim 1 wherein the multiple second plates are radially symmetrical. Van Goor teaches the capacitor of claim 1 wherein the multiple second plates are radially symmetrical (Fig. 7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose wherein the multiple second plates are radially symmetrical. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Regarding claim 3, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 1 wherein an amplitude of a signal transmitted from the multiple second plates to the first plate is determined at least in part by a number of the multiple second plates that are actively driven by the transmitter circuit (paragraph [0081], rows 1-2, the receiver detects the signals from all second plates that are actively driven, as a superposition of all the signals). Regarding claim 5, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1 and the capacitor of claim 3 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 3 wherein in a second configuration of the isolated communication channel, the transmitter circuit actively drives only one of the first second platen and the second second plate (The claim recites the intended use of the isolated communication channel, and a recitation with respect to the manner in which the claimed isolated communication channel is intended to be used must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claim invention from prior art. The structure disclosed by Chow is capable of performing the intended use, therefore it meets the limitation of the claim.). Regarding claim 7, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. The combination of Chow, Van Goor and Ho teaches the capacitor of claim 1 wherein the gap has a width that is at least a minimum width specified by a design rule check of a target manufacturing technology (in any manufacturing technology there are design rules that specify minimum dimensions/widths, and for the capacitor to pass the design rule check, and therefore be manufactured, the gap has to be at least a minimum width). Regarding claim 8, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Cho further teaches the capacitor of claim 1 wherein a ratio of a first area of a second plate of the multiple second plates to a total area of the multiple second plates determines a voltage level of a signal transmitted using the capacitor (the structure of claim 1 has an inherent ratio of a first area of a second plate of the multiple second plates to a total area of the multiple second plates. The ratio between the areas determines the structure capacitance, which affects the impedance and therefore determines the signal amplitude). Regarding claim 9, the combination of Chow, Van Goor and Ho teaches isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 1 wherein the first plate overlaps each conductive plate of the multiple second plates (Fig.4, element #44 overlaps with elements #42 as seen in figure 4). Regarding claim 10, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1, as set forth in the obviousness rejection. Chow teaches the first plate is a continuous conductive structure (Fig.3, element #26, paragraph [0061], row 8). Regarding claim 11, the combination of Chow, Van Goor and Ho teaches isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow teaches the capacitor is a MIM capacitor integrated on a chip (paragraph [0061], rows 5-6), therefore comprises a dielectric layer separating the two conductive layers which from the first and second plates. The combination of Chow and Van Goor does not teach the capacitor of claim 1 further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer by a first width greater than a second width of the gap. Ho further teaches the capacitor of claim 1 further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer (Fig.2A, layers #251 and #259 are separated by dielectric material, elements #214-246, paragraph [0079], row 2-3) by a first width greater than a second width of the gap (Fig.2A, the vertical width on the dielectric material between element #225 and #222 is larger than the horizontal gap between elements #222 and #229). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose the capacitor further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer by a first width greater than a second width of the gap. As disclosed by Ho, the thickness of dielectric layer determines the breakdown voltage of the capacitor (paragraph [0091], rows 1-6), where a thicker dielectric layer allows the application of higher voltages on the capacitor. Furthermore, a large width of the gap will increase the size of the capacitor in a plane parallel to the conductive layers where the plates reside. Therefore, it would have been obvious to someone ordinary skilled in the art, before the effective date of the claimed invention, to optimize the ratio of the two widths through routine experimentation (MPEP 2144.05). The ratio is a result effective variable because it is important to assure that the capacitor can operate at the desired voltage value while also maintaining a small footprint. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Van Goor, Ho, and in view of Andreas Kurz et al., (United States Patent Application Publication Number, US 2013/0062728 A1) hereinafter referenced as Kurz and in view of Fowler et al., (United States Patent Number, US 12,272,633 B2) hereinafter referenced as Fowler. Regarding claim 6, the combination of Chow, Van Goor and Ho teaches the isolated communication channel of claim 1, as set forth in the obviousness rejection. Van Goor further teaches the capacitor of claim 1 wherein a centermost second plate of the multiple second plates is circular-shaped and each other of the multiple second plates has an annular circular shape around the centermost second plate (Fig7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose wherein a centermost second plate of the multiple second plates is circular-shaped and each other of the multiple second plates has an annular circular shape and surrounds the centermost second plate. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Furthermore, the radial symmetry results in a radially uniform electric field, which enhances energy transfer efficiency. The combination of Chow, Van Goor and Ho does not teach the wherein a centermost second plate of the multiple second plates is stadium-shaped and each other of the multiple second plates has an annular stadium shape and surrounds the centermost second plate. Kurz teaches wherein a centermost second plate of the multiple second plates is stadium-shaped (Fig.1A, element #121, paragraph [0027], row 4) and each other of the multiple second plates has an annular stadium shape and surrounds the centermost second plate (Fig.1A, element #119, paragraph [0027], row 4). Note that stadium shape is interpreted as the shape shown in Figures 12A and 12B of the current application. Thus, both references, Van Goor and Kurz, teach a centermost plate and each other of the multiple second plates has an annular shape and surrounds the centermost plate. A person skilled in the art, before the effective filing date of the claimed invention, would have recognized that the circular-shaped plates disclosed by Van Goor could have been replaced for the stadium-shaped plates disclosed by Kurz, because both plates have curved shapes which eliminate edge effects due to sharp corners. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing plates that have curved shapes which eliminates edge effects due to sharp corners. (Note that Fowler explicitly teaches edge effects due to sharp corners, column 3, rows 39-40 and 45-50). Claims 17, 18, 20, 21, 23 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Van Goor, Ho, and in view of William French et al. (United States Patent Application Publication Number, US 2013/0037909 A1), hereinafter referenced as French. Regarding claim 17, Chow teaches a method of manufacturing an isolation communication channel, the method comprising: forming multiple first plates of a capacitor (Fig.4, element #42), each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive layer (Fig.3, elements #12 equivalent to element #42 in Fig.4 are separated by a gap), connecting a first plate of the multiple first plates to a first driver of a transmitter circuit; and connecting a second first plate of the multiple first plates to a second driver of a transmitter circuit (Fig.4, elements #10 are drivers connected to elements #42), the transmitter circuit, in a first configuration of the isolated communication channel, actively driving both the first second plate and the second second plate with a drive signal (The limitation recites the intended use of the isolated communication channel, and a recitation with respect to the manner in which the claimed isolated communication channel is intended to be used must result in a structural difference between the claimed invention and the prior art that involves a different method of making the isolated communication channel as compared to the one disclosed by prior art. The prior art disclosed by Chow capable of performing the intended use, and therefore it meets the limitations of the claim. Note also Fig.15). Chow does not teach the multiple first plates being concentric. Van Goor teaches multiple second plates being concentric (Fig.7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose multiple first plates being concentric. Thus, both references Chow and Van Goor teach multiple first plates connected to drivers of communication systems. A person skilled in the art, before the effective filing date of the claimed invention would have recognized that square plates disclosed by Chow could have been replaced for the concentric plates disclosed by Van Goor because both serve the same purpose of providing multiple plates connected to drivers of communication systems. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing multiple first plates connected to drivers of communication systems. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Chow teaches the capacitor is a MIM capacitor integrated on a chip (paragraph [0061], rows 5-6). The combination of Chow and Van Goor does not teach forming a conductive integrated circuit layer using a substrate and patterning the conductive integrated circuit layer to form multiple first plates of a capacitor, each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer; forming an insulating layer using the substrate; forming a second conductive integrated circuit layer using the substrate, the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer; and patterning the second conductive integrated circuit layer to form a second plate of the capacitor at least partially overlapping each of the multiple first plates. Ho teaches forming a conductive integrated circuit layer using a substrate (Fig.2A, element #259, paragraph [0081], rows 2-3 is formed on the substrate, element #210) and forming multiple first plates of a capacitor (Fig.2A, element #222 and #292, paragraph [0077], row 2-4), each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer (Fig.2B, element #222 and #229 are concentric and separated by a gap), forming an insulating layer using the substrate (Fig.2A, element #240, paragraph [0077], row 4, formed on substrate element #210); forming a second conductive integrated circuit layer using the substrate (Fig.2A, element #251, paragraph [0099], rows 1-2), the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer (Fig.2A, element #240 is formed between elements #251 and #259); forming a second plate of the capacitor at least partially overlapping each of the multiple first plates (Fig.2A, element #225, paragraph [0099], rows 1-2). It would have been obvious for someone of ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Ho and disclose forming a conductive integrated circuit layer using a substrate, forming multiple first plates of a capacitor, each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer; forming an insulating layer using the substrate; forming a second conductive integrated circuit layer using the substrate, the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer; and forming a second plate of the capacitor at least partially overlapping each of the multiple first plates. Forming capacitors in the circuit layers of integrated circuit chips allows the simultaneous manufacture of the capacitors and the metal wiring of the circuits, thus providing a compact footprint and high integration density. Ho further teaches forming the metal plates can be achieved by depositing and etching, which, for someone skilled in the art means patterning (paragraph [0053], rows 7-11). However, the combination of Chow, Van Goor and Ho does not explicitly teach patterning the conductive integrated circuit layers to form the metal plates. French teaches patterning the conductive integrated circuit layer to form the metal plates (Fig.5J and Fig. 5K, elements #550 and #552paragraph [0052], rows 8-12, paragraph [0053], rows 1-4). It would have been obvious for someone of ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teaching of French and disclose patterning the conductive integrated circuit layer to form the metal plates. Patterning of conductive layers to form conductive patterns (i.e. plates) is well known in the art and therefore a prima facie case of obviousness exists (MPEP 2144.03). Regarding claim 18, the combination of Chow, Van Goor, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow does not teach the method of claim 17 wherein the multiple first plates are radially symmetrical. Van Goor teaches the capacitor of claim 1 wherein the multiple first plates are radially symmetrical (Fig. 7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose wherein the multiple first plates are radially symmetrical. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Regarding claim 20, the combination of Chow, Van Goor, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. The combination of Chow, Van Goor and Ho teach, an isolator product manufactured by the method of claim 17 (the combination of Chow, Van Goor, Ho teaches the isolator product of claim 1, as set forth in the above obviousness rejection, and the isolator of claim 1 can be manufactured using the method of claim 17) Regarding claim 21, the combination of Chow, Van Goor, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow further teaches the method of claim 17 wherein an amplitude of a signal transmitted from the multiple first plates to the second plate is determined at least in part by a number of the multiple first plates that are actively driven by the transmitter circuit (paragraph [0081], rows 1-2, the receiver detects the signal from all of the first plates that are actively driven, as a superposition of all the signals from the plates). Regarding claim 23, the combination of Chow, Van Goor, Ho and French teaches the method of claims 17 as set forth in the obviousness rejection. Chow further teaches the method of claim 17 wherein, in a second configuration of the isolation communication channel, the transmitter circuit actively drives only one of the first first plate and the second first plate with the transmitter circuit (The claim recites the intended use of the isolated communication channel, and a recitation with respect to the manner in which the claimed isolated communication channel is intended to be used must result in a structural difference between the claimed invention and the prior art, that involves a different method of making the isolated communication channel as compared to the one disclosed by prior art in the rejection of claim 17). Regarding claim 25, the combination of Chow, Van Goor, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow teaches wherein the gap has a width that is at least a minimum width specified by a design rule check of a target manufacturing technology (in any manufacturing technology there are design rules that specify minimum dimensions/widths, and for the capacitor to pass the design rule check, and therefore be manufactured, the gap has to be at least a minimum width). Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Van Goor, Ho, French and in view of Kurz and Fowler. Regarding claim 24, the combination of Chow, Van Goor, Ho and French teaches the method of claim 17, as set forth in the obviousness rejection. Van Goor further teaches the method of claim 17 wherein a centermost plate of the multiple first plates is circular-shaped and each other of the multiple first plates has an annular circular shape and surrounds the centermost plate (Fig.7). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Van Goor and disclose wherein a centermost plate of the multiple first plates is circular-shaped and each other of the multiple first plates has an annular circular shape and surrounds the centermost plate. As disclosed by Van Goor, the plates’ circular layout allows power to be continuously transferred at the same level when the receiver is turned left or right but the transmitter is in the same spot (paragraph [0052], rows 3-6). Furthermore, the radial symmetry results in a radially uniform electric field, which enhances energy transfer efficiency. The combination of Chow, Van Goor, Ho and French does not teach the wherein a centermost plate of the multiple first plates is stadium-shaped and each other of the multiple first plates has an annular stadium shape and surrounds the centermost plate. Kurz teaches wherein a centermost plate of the multiple first plates is stadium-shaped (Fig.1A, element #121, paragraph [0027], row 4) and each other of the multiple first plates has an annular stadium shape and surrounds the centermost plate (Fig.1A, element #119, paragraph [0027], row 4). Note that stadium shape is interpreted as the shape shown in Figures 12A and 12B of the current application. Thus, both references, Van Goor and Kurz, teach a centermost plate and each other of the multiple first plates has an annular shape and surrounds the centermost plate. A person skilled in the art, before the effective filing date of the claimed invention, would have recognized that the circular-shaped plates disclosed by Van Goor could have been replaced for the stadium-shaped plates disclosed by Kurz, because both plates have curved shapes which eliminate edge effects due to sharp corners. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing plates that have curved shapes which eliminate edge effects due to sharp corners. (Note that Fowler explicitly teaches edge effects due to sharp corners, column 3, rows 39-40 and 45-50). Response to Arguments Applicant’s arguments filed on 05/04/2026 have been fully considered but they are not persuasive. Regarding claim 1, Chow teaches the transmitter circuit, in a first configuration of the isolated communication channel, actively driving both the first second plate and the second second plate with a drive signal (Fig.4 and 15). The claim recites the intended use of the isolated communication channel, and a recitation with respect to the manner in which the claimed isolated communication channel is intended to be used does not differentiate it from the structure disclosed by Chow. The structure disclosed by Chow is capable of performing the intended use, therefore it meets the limitation of the claim. Similarly, Van Goor teaches the transmitter circuit actively driving both the first second plate and the second second plate with a drive signal (Fig.7, one plate is connected to a high power driver, and the other is connected to a low power driver). Note that, in the rejection of claim 1, Van Goor is used only for teaching concentric plates connected to drivers. There is no requirement for the capacitive powering system disclosed by Van Goor to function in the configuration of the isolated communication channel disclosed by Chow, nor has to disclose a capacitor including all the limitations of claim 1. The isolated communication channel disclosed by Chow can function with concentric plates connected to drivers. Similarly, Ho is used only for teaching the capacitor plates being formed in conductive integrated circuit layers. Therefore, there is no requirement for the system disclosed by Ho to function with the configuration of the isolated communication channel disclosed by Chow, nor has to disclose a capacitor including all the limitations of claim 1. The MIM capacitor integrated on a chip disclosed by Chow can function when the plates are formed in conductive integrated circuitry layers of the chip. Similar arguments as above apply to claim 17. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CRISTIAN A TIVARUS whose telephone number is (703)756-4688. The examiner can normally be reached Monday- Friday 8:00 AM -5:00 PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at (571)270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Sep 29, 2022
Application Filed
Jun 17, 2025
Non-Final Rejection mailed — §103
Oct 17, 2025
Response Filed
Jan 02, 2026
Final Rejection mailed — §103
May 04, 2026
Request for Continued Examination
May 06, 2026
Response after Non-Final Action
Sep 14, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12740407
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
4y 0m to grant Granted Sep 15, 2026
Patent 12733198
Semiconductor Device and Method of Manufacture
4y 1m to grant Granted Sep 08, 2026
Patent 12727524
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR APPARATUS MANUFACTURING METHOD
4y 1m to grant Granted Sep 01, 2026
Patent 12721170
PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME
4y 1m to grant Granted Aug 25, 2026
Patent 12721148
SEMICONDUCTOR DEVICE WITH POWER SUPPLY DISTRIBUTION NETWORKS ON FRONTSIDE AND BACKSIDE OF A CIRCUIT
3y 8m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+26.1%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 50 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month