DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed on 10/17/2025 has been entered. Claims 1-11, 17-18 and 20-25 remain pending in the application. Claims 12-16 and 19 have been cancelled.
Claim Objections
Claim 21 objected to because of the following informalities: “each multiple plate of the multiple first plates” should read “each
Claim 24 objected to because of the following informalities: “a centermost plate of the multiple plates” should read “a centermost plate of the multiple first plates”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 7 and 25 recite the limitation “the minimum width specified by a design rule check”. There is insufficient antecedent basis for this limitation. Claims 1 and 17, on which claims 7 and 25 depend on, respectively, do not define a minimum width specified by a design rule check. For the purpose of examination, claim 7 will be interpreted as: “The capacitor of claim 1 wherein the gap has a width that is at least a ”, and claim 25 will be interpreted as “The method of claim 17 wherein the gap has a width that is at least a
Claims 5 and 23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites a second configuration of the capacitor that is a further limitation of the first configuration of claim 4. The first configuration, as recited in claim 4, requires the two signals of claim 5 to be identical since they are part of the plurality of signals claimed as identical in claim 4, on which claim 5 depends on. This requires the first signal to be identical with the second signal and also a full-scale periodic signal, according to claim 4, to also be inactive. Furthermore, an inactive signal may have a constant value and therefore not be periodic. Therefore claim 5 fails to particularly point out the subject matter. For the purpose of examination, claim 5 will be interpreted as: “The capacitor of claim 3 wherein, in a second configuration of the capacitor a first signal of the plurality of signals is a full-scale periodic signal and a second signal of the plurality of signals is inactive”.
Claim 23 recites a similar limitation as the one in claim 5 and therefore same arguments apply. For the purpose of examination, claim 23 will be interpreted as: “The method of claim 21 wherein, in a second configuration of the capacitor, a first signal of the plurality of signals is a full-scale periodic signal and a second signal of the plurality of signals is inactive”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Chow (United States Patent Application Publication Number, US 2009/0176450 A1) hereinafter referenced as Chow, in view of Dominique Ho et al., (United States Patent Application Publication Number, US 2017/0098604 A1), hereinafter referenced as Ho.
Regarding claim 1, Chow teaches an isolated communication channel (Fig.4) comprising: a capacitor including a first plate, and multiple second plates (Fig.4, the capacitor in the TX chip includes a first plate, element #44 and multiple second plates, elements #42, paragraph [0061], rows 3-4), each second plate of the multiple second plates being separated from a next adjacent second plate by a gap (Fig.4, elements #42 are separated by a gap) and a transmitter circuit (Fig.4, element #40) including a first driver coupled to a first second plate of the multiple second plates, and the transmitter circuit further including a second driver coupled to a second second plate of the multiple second plates (Fig.4, elements #10 are drivers connected to elements #42).
Chow teaches the capacitor is a MIM capacitor integrated on a chip (paragraph [0061], rows 5-6). Chow does not teach the capacitor including a first plate formed in a first conductive integrated circuit layer, and multiple second plates formed in a second conductive integrated circuit layer, each second plate of the multiple second plates being separated from a next adjacent second plate by a gap in the second conductive integrated circuit layer, the multiple second plates being concentric. Ho teaches a capacitor including a first plate (Fig.2A, element #225, paragraph [0099], rows 1-2) formed in a first conductive integrated circuit layer (Fig.2A, layer element #251, paragraph [0099], rows 1-2), and multiple second plates (Fig.2A, elements #222 and #229, paragraph [0077], row 2-4) formed in a second conductive integrated circuit layer (Fig.2A, element #259, paragraph [0081], rows 2-3), each second plate of the multiple second plates being separated from a next adjacent second plate by a gap in the second conductive integrated circuit layer, the multiple second plates being concentric (Fig.2C, elements #222 and #229 are separated by a gap and are concentric). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose the capacitor including a first plate formed in a first conductive integrated circuit layer, and multiple second plates formed in a second conductive integrated circuit layer, each second plate of the multiple second plates being separated from a next adjacent second plate by a gap in the second conductive integrated circuit layer, the multiple second plates being concentric. As disclosed by Ho, forming the capacitor as part of an integrated circuit, where the first and second plates are formed in different conductive layers allows the manufacture of isolators that can operate at very high voltages (paragraph [0057], rows 13-20).
Regarding claim 2, the combination of Chow and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow does not teach the capacitor of claim 1 wherein the multiple second plates are radially symmetrical. Ho teaches the capacitor of claim 1 wherein the multiple second plates are radially symmetrical (Fig.2C, elements #222 and #229 are radially symmetrical). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose wherein the multiple second plates are radially symmetrical. Having the second plates radially symmetrical results in a radially uniform electric field, which enhances energy transfer efficiency and ensures consistent behavior and performance across different capacitor configurations.
Regarding claim 3, the combination of Chow and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 1 wherein each second plate of the multiple second plates is responsive to a corresponding signal of a plurality of signals generated by a transmitter circuit (Fig.4, each plate is connected to a driver, element #10 and therefore is responsive to signals generated by the transmitter circuit).
Regarding claim 4, combination of Chow and Ho teaches the isolated communication channel of claim 1 and the capacitor of claim 3 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 3 wherein the plurality of signals are identical, full-scale periodic signals in a first configuration of the capacitor (the claim recites the intended use of the capacitor, and a recitation with respect to the manner in which a claimed capacitor is intended to be used does not differentiate it from the structure disclosed by the combination of Chow and Ho, which teaches all the structural limitations of the claim).
Regarding claim 5, the combination of Chow and Ho teaches the isolated communication channel of claim 1 and the capacitor of claim 3 as set forth in the obviousness rejection. Chow further teaches the capacitor of claim 3 wherein in a second configuration of the capacitor, a first signal of the plurality of signals is a full-scale periodic signal and a second signal of the plurality of signals is inactive (the claim recites the intended use of the capacitor, and a recitation with respect to the manner in which a claimed capacitor is intended to be used does not differentiate it from the structure disclosed by the combination of Chow and Ho, which teaches all the structural limitations of the claim).
Regarding claim 7, the combination of Chow and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. The combination of Chow and Ho teaches the capacitor of claim 1 wherein the gap has a width that is at least a (in any manufacturing technology there are design rules that specify minimum dimensions/widths, and for the capacitor to pass the design rule check, and therefore be manufactured, the gap has to be at least a minimum width).
Regarding claim 8, the combination of Chow and Ho teaches the isolated communication channel of claim 1 as set forth in the obviousness rejection. Cho further teaches the capacitor of claim 1 wherein a ratio of a first area of a second plate of the multiple second plates to a total area of the multiple second plates determines a voltage level of a signal transmitted using the capacitor (the structure of claim 1 has an inherent ratio of a first area of a second plate of the multiple second plates to a total area of the multiple second plates. The ratio between the areas determines the structure capacitance, which affects the impedance and therefore determines the signal amplitude).
Regarding claim 9, the combination of Chow and Ho teaches isolated communication channel of claim 1 as set forth in the obviousness rejection. Cho further teaches the capacitor of claim 1 wherein the first plate overlaps each conductive plate of the multiple second plates (Fig.4, element #44 overlaps with elements #42 in the vertical direction).
Regarding claim 11, the combination of Chow and Ho teaches isolated communication channel of claim 1 as set forth in the obviousness rejection. Chow teaches the capacitor is a MIM capacitor integrated on a chip (paragraph [0061], rows 5-6), therefore comprises a dielectric layer separating the two conductive layers that from the first and second plates. Cho does not teach the capacitor of claim 1 further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer by a first width greater than a second width of the gap. Ho further teaches the capacitor of claim 1 further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer (Fig.2A, layers #251 and #259 are separated by dielectric material, elements #214-246, paragraph [0079], row 2-3) by a first width greater than a second width of the gap (Fig.2A, the vertical width on the dielectric material between element #225 and #222 is larger than the horizontal gap between elements #222 and #229). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose the capacitor further comprising a dielectric integrated circuit layer separating the first conductive integrated circuit layer and the second conductive integrated circuit layer by a first width greater than a second width of the gap. As disclosed by Ho, the thickness of dielectric layer determines the breakdown voltage of the capacitor (paragraph [0091], rows 1-6), where a thicker dielectric layer allows the application of higher voltages on the capacitor. Furthermore, a large width of the gap will increase the size of the capacitor in a plane parallel to the conductive layers where the plates reside. Therefore, it would have been obvious to someone ordinary skilled in the art, before the effective date of the claimed invention, to optimize the ratio of the two widths through routine experimentation (MPEP 2144.05). The ratio is a result effective variable because it is important to assure that the capacitor can operate at the desired voltage value while also maintaining a small footprint.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Ho, and in view of Andreas Kurz et al., (United States Patent Application Publication Number, US 2013/0062728 A1) hereinafter referenced as Kurz.
Regarding claim 6, the combination of Chow and Ho teaches the isolated communication channel of claim 1, as set forth in the obviousness rejection. Ho further teaches the capacitor of claim 1 wherein a centermost second plate of the multiple second plates is circular-shaped and each other of the multiple second plates has an annular circular shape and surrounds the centermost second plate (Fig.2C, elements #222 and #229). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose wherein a centermost second plate of the multiple second plates is circular-shaped and each other of the multiple second plates has an annular circular shape and surrounds the centermost second plate. Making the centermost plate circular and the other second plates annular eliminates edge effects due to sharp corners, while the radial symmetry results in a radially uniform electric field, which enhances energy transfer efficiency and ensures consistent behavior and performance across different capacitor configurations.
The combination of Chow and Ho does not teach the wherein a centermost second plate of the multiple second plates is stadium-shaped and each other of the multiple second plates has an annular stadium shape and surrounds the centermost second plate. Kurz teaches wherein a centermost second plate of the multiple second plates is stadium-shaped (Fig.1A, element #121, paragraph [0027], row 4) and each other of the multiple second plates has an annular stadium shape and surrounds the centermost second plate (Fig.1A, element #119, paragraph [0027], row 4). Note that stadium shape is interpreted as the shape shown in Figures 12A and 12B of the current application. Thus, both references, Ho and Kurz, teach a centermost plate and each other of the multiple second plates has an annular shape and surrounds the centermost plate. A person skilled in the art, before the effective filing date of the claimed invention, would have recognized that the circular-shaped plates disclosed by Ho could have been replaced for the stadium-shaped plates disclosed by Kurz, because both plates have curved shapes which eliminate edge effects due to sharp corners. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing plates that have curved shapes which eliminate edge effects due to sharp corners.
Claims 10 is rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Ho and in view of Elizabeth Steward et al., (United States Patent Application Publication Number, US 2019/0378892 A1) hereinafter referenced as Steward.
Regarding claim 10, the combination of Chow and Ho teaches the isolated communication channel of claim 1, as set forth in the obviousness rejection. Chow teaches the first plate is a single large pad (paragraph [0061], row 4). The combination of Chow and Ho does not teach the capacitor of claim 1 wherein the first plate is a continuous conductive structure. Steward teaches wherein the first plate is a continuous conductive structure (element #104, paragraph [0018], rows 22-23). It would have been obvious for someone of ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Steward and disclose wherein the first plate is a continuous conductive structure. Making the plate continuous provides a uniform electric field and charge distribution across the plate, which reduces the risk of breakdown.
Claims 17, 18, 20-23 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Ho, and in view of William French et al. (United States Patent Application Publication Number, US 2013/0037909 A1), hereinafter referenced as French.
Regarding claim 17, Chow teaches a method of manufacturing an isolation communication channel, the method comprising: forming multiple first plates of a capacitor (Fig.4, element #42), each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive layer (Fig.3, elements #12 equivalent to element #42 in Fig.4 are separated by a gap), connecting a first plate of the multiple first plates to a first driver of a transmitter circuit; and connecting a second first plate of the multiple first plates to a second driver of a transmitter circuit (Fig.4, elements #10 are drivers connected to elements #42).
Chow does not teach forming a conductive integrated circuit layer using a substrate and patterning the conductive integrated circuit layer to form multiple first plates of a capacitor, each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer, the multiple first plates being concentric; forming an insulating layer using the substrate; forming a second conductive integrated circuit layer using the substrate, the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer; and patterning the second conductive integrated circuit layer to form a second plate of the capacitor at least partially overlapping each of the multiple first plates.
Ho teaches forming a conductive integrated circuit layer using a substrate (Fig.2A, element #259, paragraph [0081], rows 2-3 is formed on the substrate, element #210) and forming multiple first plates of a capacitor (Fig.2A, element #222 and #292, paragraph [0077], row 2-4), each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer, the multiple first plates being concentric (Fig.2B, element #222 and #229 are concentric and separated by a gap), forming an insulating layer using the substrate (Fig.2A, element #240, paragraph [0077], row 4, formed on substrate element #210); forming a second conductive integrated circuit layer using the substrate (Fig.2A, element #251, paragraph [0099], rows 1-2), the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer (Fig.2A, element #240 is formed between elements #251 and #259); forming a second plate of the capacitor at least partially overlapping each of the multiple first plates (Fig.2A, element #225, paragraph [0099], rows 1-2). It would have been obvious for someone of ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teaching of Ho and disclose forming a conductive integrated circuit layer using a substrate, forming multiple first plates of a capacitor, each plate of the multiple first plates being separated from a next adjacent plate by a gap in the conductive integrated circuit layer, the multiple first plates being concentric; forming an insulating layer using the substrate; forming a second conductive integrated circuit layer using the substrate, the insulating layer being formed between the conductive integrated circuit layer and the second conductive integrated circuit layer; and forming a second plate of the capacitor at least partially overlapping each of the multiple first plates. As disclosed by Ho, forming the capacitor as part of an integrated circuit, where the first and second plates are formed in different conductive layers allows the manufacture of isolators that can operate at very high voltages (paragraph [0057], rows 13-20).
Ho further teaches forming the metal plates can be achieved by depositing and etching, which, for someone skilled in the art means patterning (paragraph [0053], rows 7-11). However, the combination of Chow and Ho does not explicitly teach patterning the conductive integrated circuit layers to form the metal plates. French teaches patterning the conductive integrated circuit layer to form the metal plates (Fig.5J and Fig. 5K, elements #550 and #552paragraph [0052], rows 8-12, paragraph [0053], rows 1-4). It would have been obvious for someone of ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teaching of French and disclose patterning the conductive integrated circuit layer to form the metal plates. Patterning of conductive layers to form conductive patterns (i.e. plates) is well known in the art and therefore a prima facie case of obviousness exists (MPEP 2144.03).
Regarding claim 18, the combination of Chow, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow does not teach the method of claim 17 wherein the multiple first plates are radially symmetrical. Ho wherein the multiple first plates are radially symmetrical (Fig.2C, elements #222 and #229 are radially symmetrical). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose wherein the multiple first plates are radially symmetrical. Having the first plates radially symmetrical results in a radially uniform electric field, which enhances energy transfer efficiency and ensures consistent behavior and performance across different capacitor configurations.
Regarding claim 20, the combination of Chow, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. The combination of Chow and Ho further teaches, an isolator product manufactured by the method of claim 17 (the combination of Chow and Ho teaches the isolator product of claim 1, as set forth in the above obviousness rejection, and the isolator of claim 1 can be manufactured using the method of claim 17)
Regarding claim 21, the combination of Chow, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow further teaches the method of claim 17 wherein each first plates is responsive to a corresponding signal of a plurality of signals generated by a transmitter circuit (Fig.4, each plate is connected to a driver, element #10 and therefore is responsive to signals generated by the transmitter circuit).
Regarding claim 22, the combination of Chow, Ho and French teaches the method of claims 17 and 21 as set forth in the obviousness rejection. Chow further teaches the method of claim 21 wherein the plurality of signals are identical, full-scale periodic signals in a first configuration of the capacitor (the claim recites the intended use of the structure build by the method, and a recitation with respect to the manner in which the structure is intended to be used does not differentiate it from the structure disclosed by the combination of Chow, Ho and French, which teaches all the structural limitations of the claim).
Regarding claim 23, the combination of Chow Ho and French teaches the method of claims 17 and 21 as set forth in the obviousness rejection. Chow further teaches the method of claim 21 wherein in a second configuration of the capacitor a first signal of the plurality of signals is a full-scale periodic signal and a second signal of the plurality of signals is inactive (the claim recites the intended use of the structure build by the method, and a recitation with respect to the manner in which the structure is intended to be used does not differentiate it from the structure disclosed by the combination of Chow, Ho and French, which teaches all the structural limitations of the claim).
Regarding claim 25, the combination of Chow, Ho and French teaches the method of claim 17 as set forth in the obviousness rejection. Chow teaches wherein the gap has a width that is at least a (in any manufacturing technology there are design rules that specify minimum dimensions/widths, and for the capacitor to pass the design rule check, and therefore be manufactured, the gap has to be at least a minimum width).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Chow in view of Ho, French and in view of Andreas Kurz.
Regarding claim 24, the combination of Chow, Ho and French teaches the method of claim 17, as set forth in the obviousness rejection. Ho further teaches the method of claim 17 wherein a centermost plate of the multiple first plates is circular-shaped and each other of the multiple first plates has an annular circular shape and surrounds the centermost plate (Fig.2B, elements #222 and #229). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Ho and disclose wherein a centermost plate of the multiple first plates is circular-shaped and each other of the multiple first plates has an annular circular shape and surrounds the centermost plate. Making the centermost plate circular and the other first plates annular eliminates edge effects due to sharp corners, while the radial symmetry results in a radially uniform electric field, which enhances energy transfer efficiency and ensures consistent behavior and performance across different capacitor configurations.
The combination of Chow, Ho and French does not teach the wherein a centermost plate of the multiple first plates is stadium-shaped and each other of the multiple first plates has an annular stadium shape and surrounds the centermost plate. Kurz teaches wherein a centermost plate of the multiple first plates is stadium-shaped (Fig.1A, element #121, paragraph [0027], row 4) and each other of the multiple first plates has an annular stadium shape and surrounds the centermost plate (Fig.1A, element #119, paragraph [0027], row 4). Note that stadium shape is interpreted as the shape shown in Figures 12A and 12B of the current application. Thus, both references, Ho and Kurz, teach a centermost plate and each other of the multiple first plates has an annular shape and surrounds the centermost plate. A person skilled in the art, before the effective filing date of the claimed invention, would have recognized that the circular-shaped plates disclosed by Ho could have been replaced for the stadium-shaped plates disclosed by Kurz, because both plates have curved shapes which eliminate edge effects due to sharp corners. Furthermore, a person skilled in the art would have been able to carry out the substitution. Finally, the substitution achieves the predictable result of providing plates that have curved shapes which eliminate edge effects due to sharp corners.
Response to Arguments
Applicant' s arguments regarding 112(b) rejection of claims 5, 7, 23 and 25 filed on 10/17/2025 have been fully considered.
The amendments made to claim 11 overcome the 112(b) rejection made in the Non-final Rejection, filed on 06/17/2025.
The amendments made to claims 7 and 25 overcome the initial 112(b) rejection, however the new limitations raise new 112(b) issues as noted in the above 112(b) rejection.
The amendments made to claims 5 and 23 are a reordering of words of the previous limitations that do not change the content and meaning of the claims. As noted in the 112(b) rejection of claims 5 and 23 of the current office action, a first and a second signals of the plurality of signals may not satisfy the limitations of both claims 5 and 4 (since claim 5 depends on claim 4) or the limitations of both claims 23 and 22 (since claim 23 depends on claim 22), respectively. Therefore, the rejection of claims 5 and 23 is maintained.
Applicant' s arguments regarding 102 and 103 rejections, filed on 10/17/2025, have been fully considered but they are not persuasive. Applicant' s arguments with respect to claims 1 and 17 have been considered but are moot because the new grounds of rejection does not rely on any reference as applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Greene Charles et al. (WIPO Publication Number WO 2009/089146 A1) teaches a capacitor with multiple second plates radially symmetrical, wherein each second plate of the multiple second plates is responsive to a corresponding signal of a plurality of signals generated by a transmitter circuit and connecting the second plates to the same driver (Fig.13 and 15).
Hironobu Takahashi et al. (United States Patent Application Publication Number, US 2015/0372540 A1, and United States Patent Number, US 9,461,507 B2) teaches a capacitor with multiple second plates radially symmetrical, wherein each second plate of the multiple second plates is responsive to a corresponding signal of a plurality of signals generated by a transmitter circuit and connecting the second plates to the same driver (Fig.2, 3 and 6).
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899